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Searched
refs:DstIsDead
(Results
1 - 3
of
3
) sorted by null
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
ARMExpandPseudoInsts.cpp
421
bool
DstIsDead
= MI.getOperand(OpIdx).isDead();
425
MIB.addReg(D0, RegState::Define | getDeadRegState(
DstIsDead
))
426
.addReg(D1, RegState::Define | getDeadRegState(
DstIsDead
));
428
MIB.addReg(D2, RegState::Define | getDeadRegState(
DstIsDead
));
430
MIB.addReg(D3, RegState::Define | getDeadRegState(
DstIsDead
));
461
MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(
DstIsDead
));
547
bool
DstIsDead
= false;
549
DstIsDead
= MI.getOperand(OpIdx).isDead();
552
MIB.addReg(D0, RegState::Define | getDeadRegState(
DstIsDead
));
554
MIB.addReg(D1, RegState::Define | getDeadRegState(
DstIsDead
));
[
all
...]
/external/llvm/lib/Target/AArch64/
AArch64ExpandPseudoInsts.cpp
128
const bool
DstIsDead
= MI.getOperand(0).isDead();
131
.addReg(DstReg, RegState::Define | getDeadRegState(
DstIsDead
))
193
const bool
DstIsDead
= MI.getOperand(0).isDead();
209
RegState::Define | getDeadRegState(
DstIsDead
&& CountThree))
233
.addReg(DstReg, RegState::Define | getDeadRegState(
DstIsDead
))
376
const bool
DstIsDead
= MI.getOperand(0).isDead();
383
RegState::Define | getDeadRegState(
DstIsDead
&& SingleMovk))
399
.addReg(DstReg, RegState::Define | getDeadRegState(
DstIsDead
))
552
bool
DstIsDead
= MI.getOperand(0).isDead();
556
getDeadRegState(
DstIsDead
&& Shift == LastShift)
[
all
...]
/external/llvm/lib/Target/ARM/
ARMExpandPseudoInsts.cpp
405
bool
DstIsDead
= MI.getOperand(OpIdx).isDead();
409
MIB.addReg(D0, RegState::Define | getDeadRegState(
DstIsDead
));
411
MIB.addReg(D1, RegState::Define | getDeadRegState(
DstIsDead
));
413
MIB.addReg(D2, RegState::Define | getDeadRegState(
DstIsDead
));
415
MIB.addReg(D3, RegState::Define | getDeadRegState(
DstIsDead
));
446
MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(
DstIsDead
));
537
bool
DstIsDead
= false;
539
DstIsDead
= MI.getOperand(OpIdx).isDead();
542
MIB.addReg(D0, RegState::Define | getDeadRegState(
DstIsDead
));
544
MIB.addReg(D1, RegState::Define | getDeadRegState(
DstIsDead
));
[
all
...]
Completed in 145 milliseconds