/device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Include/Library/ |
PlatformPciLib.h | 28 #define PCI_HB0RB0_PCI_BASE FixedPcdGet64(PciHb0Rb0Base)
29 #define PCI_HB0RB1_PCI_BASE FixedPcdGet64(PciHb0Rb1Base)
30 #define PCI_HB0RB2_PCI_BASE FixedPcdGet64(PciHb0Rb2Base)
31 #define PCI_HB0RB3_PCI_BASE FixedPcdGet64(PciHb0Rb3Base)
32 #define PCI_HB0RB4_PCI_BASE FixedPcdGet64(PciHb0Rb4Base)
33 #define PCI_HB0RB5_PCI_BASE FixedPcdGet64(PciHb0Rb5Base)
34 #define PCI_HB0RB6_PCI_BASE FixedPcdGet64(PciHb0Rb6Base)
35 #define PCI_HB0RB7_PCI_BASE FixedPcdGet64(PciHb0Rb7Base)
37 #define PCI_HB1RB0_PCI_BASE FixedPcdGet64(PciHb1Rb0Base)
38 #define PCI_HB1RB1_PCI_BASE FixedPcdGet64(PciHb1Rb1Base) [all...] |
/device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Pv660/Pv660AcpiTables/ |
Madt.aslc | 68 0, 0, PLATFORM_GET_MPID(0, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
69 FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x100000 /* GicRBase */),
71 1, 1, PLATFORM_GET_MPID(0, 1), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
72 FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x130000 /* GicRBase */),
74 2, 2, PLATFORM_GET_MPID(0, 2), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
75 FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, (…) [all...] |
Spcr.aslc | 39 FixedPcdGet64(PcdSerialRegisterBase)
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/device/linaro/bootloader/OpenPlatformPkg/Platforms/ARM/Juno/AcpiTables/ |
Madt.aslc | 58 EFI_ACPI_5_0_GIC_STRUCTURE_INIT(2, 0, EFI_ACPI_5_0_GIC_ENABLED, 50, FixedPcdGet64 (PcdGicInterruptInterfaceBase)), // A53-0
59 EFI_ACPI_5_0_GIC_STRUCTURE_INIT(3, 1, EFI_ACPI_5_0_GIC_ENABLED, 54, FixedPcdGet64 (PcdGicInterruptInterfaceBase)), // A53-1
60 EFI_ACPI_5_0_GIC_STRUCTURE_INIT(4, 2, EFI_ACPI_5_0_GIC_ENABLED, 58, FixedPcdGet64 (PcdGicInterruptInterfaceBase)), // A53-2
61 EFI_ACPI_5_0_GIC_STRUCTURE_INIT(5, 3, EFI_ACPI_5_0_GIC_ENABLED, 62, FixedPcdGet64 (PcdGicInterruptInterfaceBase)), // A53-3
62 EFI_ACPI_5_0_GIC_STRUCTURE_INIT(0, 4, EFI_ACPI_5_0_GIC_ENABLED, 34, FixedPcdGet64 (PcdGicInterruptInterfaceBase)), // A57-0
63 EFI_ACPI_5_0_GIC_STRUCTURE_INIT(1, 5, EFI_ACPI_5_0_GIC_ENABLED, 38, FixedPcdGet64 (PcdGicInterruptInterfaceBase)) // A57-1
65 EFI_ACPI_5_0_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet64 (PcdGicDistributorBase), 0)
103 2, 0, GET_MPID(1, 0), EFI_ACPI_5_0_GIC_ENABLED, 50, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
106 3, 1, GET_MPID(1, 1), EFI_ACPI_5_0_GIC_ENABLED, 54, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
109 4, 2, GET_MPID(1, 2), EFI_ACPI_5_0_GIC_ENABLED, 58, FixedPcdGet64 (PcdGicInterruptInterfaceBase), [all...] |
Spcr.aslc | 48 ARM_GAS32 (FixedPcdGet64 (PcdSerialRegisterBase)),
56 #if (FixedPcdGet64 (PcdUartDefaultBaudRate) == 9600)
58 #elif (FixedPcdGet64 (PcdUartDefaultBaudRate) == 19200)
60 #elif (FixedPcdGet64 (PcdUartDefaultBaudRate) == 57600)
62 #elif (FixedPcdGet64 (PcdUartDefaultBaudRate) == 115200)
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/device/linaro/bootloader/edk2/ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/ |
XPressRich3.h | 22 #define PCI_ECAM_BASE FixedPcdGet64 (PcdPciConfigurationSpaceBaseAddress)
23 #define PCI_ECAM_SIZE FixedPcdGet64 (PcdPciConfigurationSpaceSize)
24 #define PCI_IO_BASE FixedPcdGet64 (PcdPciIoBase)
25 #define PCI_IO_SIZE FixedPcdGet64 (PcdPciIoSize)
26 #define PCI_MEM32_BASE FixedPcdGet64 (PcdPciMmio32Base)
27 #define PCI_MEM32_SIZE FixedPcdGet64 (PcdPciMmio32Size)
28 #define PCI_MEM64_BASE FixedPcdGet64 (PcdPciMmio64Base)
29 #define PCI_MEM64_SIZE FixedPcdGet64 (PcdPciMmio64Size)
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PciHostBridgeResourceAllocation.c | 103 BaseAddress = FixedPcdGet64 (PcdPciMmio32Base) + FixedPcdGet64 (PcdPciMmio32Size);
116 if (!EFI_ERROR (Status) && (BaseAddress >= FixedPcdGet64 (PcdPciMmio32Base))) {
125 BaseAddress = FixedPcdGet64 (PcdPciMmio32Base) + FixedPcdGet64 (PcdPciMmio32Size);
138 if (!EFI_ERROR (Status) && (BaseAddress >= FixedPcdGet64 (PcdPciMmio32Base))) {
147 BaseAddress = FixedPcdGet64 (PcdPciMmio64Base) + FixedPcdGet64 (PcdPciMmio64Size);
160 if (!EFI_ERROR (Status) && (BaseAddress >= FixedPcdGet64 (PcdPciMmio64Base))) {
169 BaseAddress = FixedPcdGet64 (PcdPciMmio64Base) + FixedPcdGet64 (PcdPciMmio64Size); [all...] |
/device/linaro/bootloader/edk2/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/ |
SecRamInitData.c | 18 ((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchAddress) + FixedPcdGet32 (PcdFlashMicroCodeOffset)),
19 ((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchRegionSize) - FixedPcdGet32 (PcdFlashMicroCodeOffset)),
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/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/FspSupport/Library/SecFspPlatformSecLibVlv2/ |
SecRamInitData.c | 18 ((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchAddress) + FixedPcdGet32 (PcdFlashMicroCodeOffset)),
19 ((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchRegionSize) - FixedPcdGet32 (PcdFlashMicroCodeOffset)),
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/device/linaro/bootloader/OpenPlatformPkg/Platforms/ARM/VExpress/AcpiTables/ |
Madt.aslc | 52 0, 0, GET_MPID(0, 0), EFI_ACPI_6_0_GIC_ENABLED, 0, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
55 1, 1, GET_MPID(0, 1), EFI_ACPI_6_0_GIC_ENABLED, 0, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
58 2, 2, GET_MPID(0, 2), EFI_ACPI_6_0_GIC_ENABLED, 0, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
61 3, 3, GET_MPID(0, 3), EFI_ACPI_6_0_GIC_ENABLED, 0, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
64 4, 4, GET_MPID(1, 0), EFI_ACPI_6_0_GIC_ENABLED, 0, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
67 5, 5, GET_MPID(1, 1), EFI_ACPI_6_0_GIC_ENABLED, 0, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
70 6, 6, GET_MPID(1, 2), EFI_ACPI_6_0_GIC_ENABLED, 0, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
73 7, 7, GET_MPID(1, 3), EFI_ACPI_6_0_GIC_ENABLED, 0, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
76 EFI_ACPI_6_0_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet64 (PcdGicDistributorBase), 0, 3),
82 FixedPcdGet64 (PcdGicRedistributorsBase), // UINT64 DiscoveryRangeBaseAddress [all...] |
/device/linaro/bootloader/OpenPlatformPkg/Platforms/AMD/Styx/AcpiTables/ |
Gtdt.c | 28 #define CNT_CONTROL_BASE_ADDRESS FixedPcdGet64(PcdCntControlBase)
29 #define CNT_READ_BASE_ADDRESS FixedPcdGet64(PcdCntReadBase)
30 #define CNT_CTL_BASE_ADDRESS FixedPcdGet64(PcdCntCTLBase)
31 #define CNT_BASE0_ADDRESS FixedPcdGet64(PcdCntBase0)
32 #define CNT_EL0_BASE0_ADDRESS FixedPcdGet64(PcdCntEL0Base0)
33 #define SBSA_WATCHDOG_REFRESH_BASE FixedPcdGet64(PcdSbsaWatchDogRefreshBase)
34 #define SBSA_WATCHDOG_CONTROL_BASE FixedPcdGet64(PcdSbsaWatchDogControlBase)
35 #define SBSA_WAKEUP_GSIV FixedPcdGet64(PcdSbsaWakeUpGSIV)
36 #define SBSA_WATCHDOG_GSIV FixedPcdGet64(PcdSbsaWatchDogGSIV)
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Spcr.c | 44 AMD_GASN(FixedPcdGet64(PcdSerialRegisterBase)),
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Madt.c | 37 #define GIC_BASE (FixedPcdGet64 (PcdGicInterruptInterfaceBase))
38 #define GICD_BASE (FixedPcdGet64 (PcdGicDistributorBase))
39 #define GICV_BASE (FixedPcdGet64 (PcdGicVirtualInterruptInterfaceBase))
40 #define GICH_BASE (FixedPcdGet64 (PcdGicHypervisorInterruptInterfaceBase))
42 #define GICVR_BASE (FixedPcdGet64 (PcdGicVirtualRegisterInterfaceBase))
43 #define GIC_MSI_FRAME (FixedPcdGet64 (PcdGicMSIFrameBase))
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/device/linaro/bootloader/edk2/ArmPlatformPkg/Library/PL011SerialPortLib/ |
PL011SerialPortLib.c | 44 BaudRate = FixedPcdGet64 (PcdUartDefaultBaudRate);
51 (UINTN)FixedPcdGet64 (PcdSerialRegisterBase),
78 return PL011UartWrite ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);
98 return PL011UartRead ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);
114 return PL011UartPoll ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase));
159 (UINTN)FixedPcdGet64 (PcdSerialRegisterBase),
201 return PL011UartSetControl ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Control);
242 return PL011UartGetControl ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Control);
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/device/linaro/bootloader/edk2/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/ |
SecRamInitData.c | 39 ((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchAddress) + FixedPcdGet32 (PcdFlashMicrocodeOffset)),
40 ((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchRegionSize) - FixedPcdGet32 (PcdFlashMicrocodeOffset)),
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/device/linaro/bootloader/OpenPlatformPkg/Platforms/Hisilicon/D05/EarlyConfigPeim/ |
EarlyConfigPeimD05.c | 34 MmioWrite64(FixedPcdGet64(PcdMailBoxAddress), 0x0);
35 (VOID)WriteBackInvalidateDataCacheRange((VOID *) FixedPcdGet64(PcdMailBoxAddress), 8);
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/device/linaro/bootloader/edk2/ArmPlatformPkg/PrePi/ |
PrePi.c | 32 #define IS_XIP() (((UINT64)FixedPcdGet64 (PcdFdBaseAddress) > mSystemMemoryEnd) || \
33 ((FixedPcdGet64 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) < FixedPcdGet64 (PcdSystemMemoryBase)))
35 UINT64 mSystemMemoryEnd = FixedPcdGet64(PcdSystemMemoryBase) +
36 FixedPcdGet64(PcdSystemMemorySize) - 1;
92 ((FixedPcdGet64 (PcdFdBaseAddress) >= FixedPcdGet64 (PcdSystemMemoryBase)) &&
93 ((UINT64)(FixedPcdGet64 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) <= (UINT64)mSystemMemoryEnd)));
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/device/linaro/bootloader/OpenPlatformPkg/Platforms/Hisilicon/HiKey960/Library/HiKey960Lib/ |
HiKey960.c | 123 if (FixedPcdGet64 (PcdSerialDbgRegisterBase)) {
129 BaudRate = (UINTN)FixedPcdGet64 (PcdSerialDbgUartBaudRate);
131 (UINTN)FixedPcdGet64 (PcdSerialDbgRegisterBase),
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/device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Hi1616/D05AcpiTables/ |
D05Spcr.aslc | 40 ARM_GAS32 (FixedPcdGet64 (PcdSerialRegisterBase)),
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/device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Pv660/Drivers/IoInitDxe/ |
IoInitDxe.c | 26 {FixedPcdGet64 (PcdM3SmmuBaseAddress), 0},
27 {FixedPcdGet64 (PcdPcieSmmuBaseAddress), 0},
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/device/linaro/bootloader/OpenPlatformPkg/Platforms/Hisilicon/D02/EarlyConfigPeim/ |
EarlyConfigPeim.c | 63 MmioWrite64(FixedPcdGet64(PcdMailBoxAddress), 0x0);
64 (void)WriteBackInvalidateDataCacheRange((VOID *) FixedPcdGet64(PcdMailBoxAddress), 8);
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/device/linaro/bootloader/edk2/ArmPlatformPkg/PrePeiCore/AArch64/ |
PrePeiCoreEntryPoint.S | 48 MOV64 (x1, FixedPcdGet64(PcdCPUCoresStackBase) + FixedPcdGet32(PcdCPUCorePrimaryStackSize))
72 MOV64 (x2, FixedPcdGet64(PcdFvBaseAddress))
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/device/linaro/bootloader/edk2/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/ |
ArmJuno.c | 129 if (FixedPcdGet64 (PcdSerialDbgRegisterBase)) {
135 BaudRate = (UINTN)FixedPcdGet64 (PcdSerialDbgUartBaudRate);
137 (UINTN)FixedPcdGet64 (PcdSerialDbgRegisterBase),
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/device/linaro/bootloader/edk2/ArmPlatformPkg/PrePeiCore/Arm/ |
PrePeiCoreEntryPoint.S | 29 MOV32 (r1, FixedPcdGet64(PcdCPUCoresStackBase) + FixedPcdGet32(PcdCPUCorePrimaryStackSize))
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/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Include/Pcd/ |
EdkIIGluePcd.h | 32 #define FixedPcdGet64(TokenName) __EDKII_GLUE_PCD_##TokenName##__
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