1 /** @file 2 * 3 * Copyright (c) 2013-2016, ARM Limited. All rights reserved. 4 * 5 * This program and the accompanying materials 6 * are licensed and made available under the terms and conditions of the BSD License 7 * which accompanies this distribution. The full text of the license may be found at 8 * http://opensource.org/licenses/bsd-license.php 9 * 10 * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 * 13 **/ 14 15 #include <Drivers/PL011Uart.h> 16 17 #include <Library/IoLib.h> 18 #include <Library/ArmPlatformLib.h> 19 #include <Library/DebugLib.h> 20 #include <Library/PcdLib.h> 21 22 #include <Ppi/ArmMpCoreInfo.h> 23 24 #include <ArmPlatform.h> 25 26 ARM_CORE_INFO mJunoInfoTable[] = { 27 { 28 // Cluster 0, Core 0 29 0x0, 0x0, 30 31 // MP Core MailBox Set/Get/Clear Addresses and Clear Value 32 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG, 33 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG, 34 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG, 35 (UINT64)0xFFFFFFFF 36 }, 37 { 38 // Cluster 0, Core 1 39 0x0, 0x1, 40 41 // MP Core MailBox Set/Get/Clear Addresses and Clear Value 42 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG, 43 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG, 44 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG, 45 (UINT64)0xFFFFFFFF 46 }, 47 { 48 // Cluster 1, Core 0 49 0x1, 0x0, 50 51 // MP Core MailBox Set/Get/Clear Addresses and Clear Value 52 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG, 53 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG, 54 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG, 55 (UINT64)0xFFFFFFFF 56 }, 57 { 58 // Cluster 1, Core 1 59 0x1, 0x1, 60 61 // MP Core MailBox Set/Get/Clear Addresses and Clear Value 62 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG, 63 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG, 64 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG, 65 (UINT64)0xFFFFFFFF 66 }, 67 { 68 // Cluster 1, Core 2 69 0x1, 0x2, 70 71 // MP Core MailBox Set/Get/Clear Addresses and Clear Value 72 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG, 73 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG, 74 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG, 75 (UINT64)0xFFFFFFFF 76 }, 77 { 78 // Cluster 1, Core 3 79 0x1, 0x3, 80 81 // MP Core MailBox Set/Get/Clear Addresses and Clear Value 82 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG, 83 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG, 84 (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG, 85 (UINT64)0xFFFFFFFF 86 } 87 }; 88 89 /** 90 Return the current Boot Mode 91 92 This function returns the boot reason on the platform 93 94 @return Return the current Boot Mode of the platform 95 96 **/ 97 EFI_BOOT_MODE 98 ArmPlatformGetBootMode ( 99 VOID 100 ) 101 { 102 return BOOT_WITH_FULL_CONFIGURATION; 103 } 104 105 /** 106 Initialize controllers that must setup in the normal world 107 108 This function is called by the ArmPlatformPkg/Pei or ArmPlatformPkg/Pei/PlatformPeim 109 in the PEI phase. 110 111 **/ 112 RETURN_STATUS 113 ArmPlatformInitialize ( 114 IN UINTN MpId 115 ) 116 { 117 RETURN_STATUS Status; 118 UINT64 BaudRate; 119 UINT32 ReceiveFifoDepth; 120 EFI_PARITY_TYPE Parity; 121 UINT8 DataBits; 122 EFI_STOP_BITS_TYPE StopBits; 123 124 Status = RETURN_SUCCESS; 125 126 // 127 // Initialize the Serial Debug UART 128 // 129 if (FixedPcdGet64 (PcdSerialDbgRegisterBase)) { 130 ReceiveFifoDepth = 0; // Use the default value for FIFO depth 131 Parity = (EFI_PARITY_TYPE)FixedPcdGet8 (PcdUartDefaultParity); 132 DataBits = FixedPcdGet8 (PcdUartDefaultDataBits); 133 StopBits = (EFI_STOP_BITS_TYPE)FixedPcdGet8 (PcdUartDefaultStopBits); 134 135 BaudRate = (UINTN)FixedPcdGet64 (PcdSerialDbgUartBaudRate); 136 Status = PL011UartInitializePort ( 137 (UINTN)FixedPcdGet64 (PcdSerialDbgRegisterBase), 138 FixedPcdGet32 (PcdSerialDbgUartClkInHz), 139 &BaudRate, 140 &ReceiveFifoDepth, 141 &Parity, 142 &DataBits, 143 &StopBits 144 ); 145 } 146 147 return Status; 148 } 149 150 /** 151 Initialize the system (or sometimes called permanent) memory 152 153 This memory is generally represented by the DRAM. 154 155 **/ 156 VOID 157 ArmPlatformInitializeSystemMemory ( 158 VOID 159 ) 160 { 161 } 162 163 EFI_STATUS 164 PrePeiCoreGetMpCoreInfo ( 165 OUT UINTN *CoreCount, 166 OUT ARM_CORE_INFO **ArmCoreTable 167 ) 168 { 169 // Only support one cluster 170 *CoreCount = sizeof(mJunoInfoTable) / sizeof(ARM_CORE_INFO); 171 *ArmCoreTable = mJunoInfoTable; 172 return EFI_SUCCESS; 173 } 174 175 ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo }; 176 177 EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = { 178 { 179 EFI_PEI_PPI_DESCRIPTOR_PPI, 180 &gArmMpCoreInfoPpiGuid, 181 &mMpCoreInfoPpi 182 } 183 }; 184 185 VOID 186 ArmPlatformGetPlatformPpiList ( 187 OUT UINTN *PpiListSize, 188 OUT EFI_PEI_PPI_DESCRIPTOR **PpiList 189 ) 190 { 191 *PpiListSize = sizeof(gPlatformPpiTable); 192 *PpiList = gPlatformPpiTable; 193 } 194
