1 /* Generated automatically by the program `genflags' 2 from the machine description file `md'. */ 3 4 #ifndef GCC_INSN_FLAGS_H 5 #define GCC_INSN_FLAGS_H 6 7 #define HAVE_x86_fnstsw_1 (TARGET_80387) 8 #define HAVE_x86_sahf_1 (TARGET_SAHF) 9 #define HAVE_swapsi 1 10 #define HAVE_swapdi (TARGET_64BIT) 11 #define HAVE_swapxf (TARGET_80387) 12 #define HAVE_zero_extendqidi2 (TARGET_64BIT) 13 #define HAVE_zero_extendhidi2 (TARGET_64BIT) 14 #define HAVE_zero_extendqisi2_and (TARGET_ZERO_EXTEND_WITH_AND && optimize_function_for_speed_p (cfun)) 15 #define HAVE_zero_extendhisi2_and (TARGET_ZERO_EXTEND_WITH_AND && optimize_function_for_speed_p (cfun)) 16 #define HAVE_zero_extendqihi2_and (TARGET_ZERO_EXTEND_WITH_AND && optimize_function_for_speed_p (cfun)) 17 #define HAVE_extendsidi2_1 (!TARGET_64BIT) 18 #define HAVE_extendqidi2 (TARGET_64BIT) 19 #define HAVE_extendhidi2 (TARGET_64BIT) 20 #define HAVE_extendhisi2 1 21 #define HAVE_extendqisi2 1 22 #define HAVE_extendqihi2 1 23 #define HAVE_truncxfsf2_i387_noop (TARGET_80387 && flag_unsafe_math_optimizations) 24 #define HAVE_truncxfdf2_i387_noop (TARGET_80387 && flag_unsafe_math_optimizations) 25 #define HAVE_fix_truncsfsi_sse (SSE_FLOAT_MODE_P (SFmode) \ 26 && (!TARGET_FISTTP || TARGET_SSE_MATH)) 27 #define HAVE_fix_truncsfdi_sse ((SSE_FLOAT_MODE_P (SFmode) \ 28 && (!TARGET_FISTTP || TARGET_SSE_MATH)) && (TARGET_64BIT)) 29 #define HAVE_fix_truncdfsi_sse (SSE_FLOAT_MODE_P (DFmode) \ 30 && (!TARGET_FISTTP || TARGET_SSE_MATH)) 31 #define HAVE_fix_truncdfdi_sse ((SSE_FLOAT_MODE_P (DFmode) \ 32 && (!TARGET_FISTTP || TARGET_SSE_MATH)) && (TARGET_64BIT)) 33 #define HAVE_fix_trunchi_fisttp_i387_1 (X87_FLOAT_MODE_P (GET_MODE (operands[1])) \ 34 && TARGET_FISTTP \ 35 && !((SSE_FLOAT_MODE_P (GET_MODE (operands[1])) \ 36 && (TARGET_64BIT || HImode != DImode)) \ 37 && TARGET_SSE_MATH) \ 38 && can_create_pseudo_p ()) 39 #define HAVE_fix_truncsi_fisttp_i387_1 (X87_FLOAT_MODE_P (GET_MODE (operands[1])) \ 40 && TARGET_FISTTP \ 41 && !((SSE_FLOAT_MODE_P (GET_MODE (operands[1])) \ 42 && (TARGET_64BIT || SImode != DImode)) \ 43 && TARGET_SSE_MATH) \ 44 && can_create_pseudo_p ()) 45 #define HAVE_fix_truncdi_fisttp_i387_1 (X87_FLOAT_MODE_P (GET_MODE (operands[1])) \ 46 && TARGET_FISTTP \ 47 && !((SSE_FLOAT_MODE_P (GET_MODE (operands[1])) \ 48 && (TARGET_64BIT || DImode != DImode)) \ 49 && TARGET_SSE_MATH) \ 50 && can_create_pseudo_p ()) 51 #define HAVE_fix_trunchi_i387_fisttp (X87_FLOAT_MODE_P (GET_MODE (operands[1])) \ 52 && TARGET_FISTTP \ 53 && !((SSE_FLOAT_MODE_P (GET_MODE (operands[1])) \ 54 && (TARGET_64BIT || HImode != DImode)) \ 55 && TARGET_SSE_MATH)) 56 #define HAVE_fix_truncsi_i387_fisttp (X87_FLOAT_MODE_P (GET_MODE (operands[1])) \ 57 && TARGET_FISTTP \ 58 && !((SSE_FLOAT_MODE_P (GET_MODE (operands[1])) \ 59 && (TARGET_64BIT || SImode != DImode)) \ 60 && TARGET_SSE_MATH)) 61 #define HAVE_fix_truncdi_i387_fisttp (X87_FLOAT_MODE_P (GET_MODE (operands[1])) \ 62 && TARGET_FISTTP \ 63 && !((SSE_FLOAT_MODE_P (GET_MODE (operands[1])) \ 64 && (TARGET_64BIT || DImode != DImode)) \ 65 && TARGET_SSE_MATH)) 66 #define HAVE_fix_trunchi_i387_fisttp_with_temp (X87_FLOAT_MODE_P (GET_MODE (operands[1])) \ 67 && TARGET_FISTTP \ 68 && !((SSE_FLOAT_MODE_P (GET_MODE (operands[1])) \ 69 && (TARGET_64BIT || HImode != DImode)) \ 70 && TARGET_SSE_MATH)) 71 #define HAVE_fix_truncsi_i387_fisttp_with_temp (X87_FLOAT_MODE_P (GET_MODE (operands[1])) \ 72 && TARGET_FISTTP \ 73 && !((SSE_FLOAT_MODE_P (GET_MODE (operands[1])) \ 74 && (TARGET_64BIT || SImode != DImode)) \ 75 && TARGET_SSE_MATH)) 76 #define HAVE_fix_truncdi_i387_fisttp_with_temp (X87_FLOAT_MODE_P (GET_MODE (operands[1])) \ 77 && TARGET_FISTTP \ 78 && !((SSE_FLOAT_MODE_P (GET_MODE (operands[1])) \ 79 && (TARGET_64BIT || DImode != DImode)) \ 80 && TARGET_SSE_MATH)) 81 #define HAVE_fix_truncdi_i387 (X87_FLOAT_MODE_P (GET_MODE (operands[1])) \ 82 && !TARGET_FISTTP \ 83 && !(TARGET_64BIT && SSE_FLOAT_MODE_P (GET_MODE (operands[1])))) 84 #define HAVE_fix_truncdi_i387_with_temp (X87_FLOAT_MODE_P (GET_MODE (operands[1])) \ 85 && !TARGET_FISTTP \ 86 && !(TARGET_64BIT && SSE_FLOAT_MODE_P (GET_MODE (operands[1])))) 87 #define HAVE_fix_trunchi_i387 (X87_FLOAT_MODE_P (GET_MODE (operands[1])) \ 88 && !TARGET_FISTTP \ 89 && !SSE_FLOAT_MODE_P (GET_MODE (operands[1]))) 90 #define HAVE_fix_truncsi_i387 (X87_FLOAT_MODE_P (GET_MODE (operands[1])) \ 91 && !TARGET_FISTTP \ 92 && !SSE_FLOAT_MODE_P (GET_MODE (operands[1]))) 93 #define HAVE_fix_trunchi_i387_with_temp (X87_FLOAT_MODE_P (GET_MODE (operands[1])) \ 94 && !TARGET_FISTTP \ 95 && !SSE_FLOAT_MODE_P (GET_MODE (operands[1]))) 96 #define HAVE_fix_truncsi_i387_with_temp (X87_FLOAT_MODE_P (GET_MODE (operands[1])) \ 97 && !TARGET_FISTTP \ 98 && !SSE_FLOAT_MODE_P (GET_MODE (operands[1]))) 99 #define HAVE_x86_fnstcw_1 (TARGET_80387) 100 #define HAVE_x86_fldcw_1 (TARGET_80387) 101 #define HAVE_floatdisf2_i387_with_xmm (TARGET_80387 && X87_ENABLE_FLOAT (SFmode, DImode) \ 102 && TARGET_SSE2 && TARGET_INTER_UNIT_MOVES \ 103 && !TARGET_64BIT && optimize_function_for_speed_p (cfun)) 104 #define HAVE_floatdidf2_i387_with_xmm (TARGET_80387 && X87_ENABLE_FLOAT (DFmode, DImode) \ 105 && TARGET_SSE2 && TARGET_INTER_UNIT_MOVES \ 106 && !TARGET_64BIT && optimize_function_for_speed_p (cfun)) 107 #define HAVE_floatdixf2_i387_with_xmm (TARGET_80387 && X87_ENABLE_FLOAT (XFmode, DImode) \ 108 && TARGET_SSE2 && TARGET_INTER_UNIT_MOVES \ 109 && !TARGET_64BIT && optimize_function_for_speed_p (cfun)) 110 #define HAVE_addqi3_cc (ix86_binary_operator_ok (PLUS, QImode, operands)) 111 #define HAVE_addsi_1_zext (TARGET_64BIT && ix86_binary_operator_ok (PLUS, SImode, operands)) 112 #define HAVE_addqi_ext_1 (!TARGET_64BIT) 113 #define HAVE_adcxsi3 (TARGET_ADX && ix86_binary_operator_ok (PLUS, SImode, operands)) 114 #define HAVE_adcxdi3 ((TARGET_ADX && ix86_binary_operator_ok (PLUS, DImode, operands)) && (TARGET_64BIT)) 115 #define HAVE_divmodsi4_1 1 116 #define HAVE_divmoddi4_1 (TARGET_64BIT) 117 #define HAVE_divmodhiqi3 (TARGET_QIMODE_MATH) 118 #define HAVE_udivmodsi4_1 1 119 #define HAVE_udivmoddi4_1 (TARGET_64BIT) 120 #define HAVE_udivmodhiqi3 (TARGET_QIMODE_MATH) 121 #define HAVE_andqi_ext_0 1 122 #define HAVE_copysignsf3_const ((SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 123 || (TARGET_SSE && (SFmode == TFmode))) 124 #define HAVE_copysigndf3_const ((SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 125 || (TARGET_SSE && (DFmode == TFmode))) 126 #define HAVE_copysigntf3_const ((SSE_FLOAT_MODE_P (TFmode) && TARGET_SSE_MATH) \ 127 || (TARGET_SSE && (TFmode == TFmode))) 128 #define HAVE_copysignsf3_var ((SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 129 || (TARGET_SSE && (SFmode == TFmode))) 130 #define HAVE_copysigndf3_var ((SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 131 || (TARGET_SSE && (DFmode == TFmode))) 132 #define HAVE_copysigntf3_var ((SSE_FLOAT_MODE_P (TFmode) && TARGET_SSE_MATH) \ 133 || (TARGET_SSE && (TFmode == TFmode))) 134 #define HAVE_x86_64_shld (TARGET_64BIT) 135 #define HAVE_x86_shld 1 136 #define HAVE_x86_64_shrd (TARGET_64BIT) 137 #define HAVE_x86_shrd 1 138 #define HAVE_ashrdi3_cvt (TARGET_64BIT && INTVAL (operands[2]) == 63 \ 139 && (TARGET_USE_CLTD || optimize_function_for_size_p (cfun)) \ 140 && ix86_binary_operator_ok (ASHIFTRT, DImode, operands)) 141 #define HAVE_ashrsi3_cvt (INTVAL (operands[2]) == 31 \ 142 && (TARGET_USE_CLTD || optimize_function_for_size_p (cfun)) \ 143 && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)) 144 #define HAVE_ix86_rotldi3_doubleword (!TARGET_64BIT) 145 #define HAVE_ix86_rotlti3_doubleword (TARGET_64BIT) 146 #define HAVE_ix86_rotrdi3_doubleword (!TARGET_64BIT) 147 #define HAVE_ix86_rotrti3_doubleword (TARGET_64BIT) 148 #define HAVE_setcc_sf_sse (SSE_FLOAT_MODE_P (SFmode)) 149 #define HAVE_setcc_df_sse (SSE_FLOAT_MODE_P (DFmode)) 150 #define HAVE_jump 1 151 #define HAVE_blockage 1 152 #define HAVE_prologue_use 1 153 #define HAVE_simple_return_internal (reload_completed) 154 #define HAVE_simple_return_internal_long (reload_completed) 155 #define HAVE_simple_return_pop_internal (reload_completed) 156 #define HAVE_simple_return_indirect_internal (reload_completed) 157 #define HAVE_nop 1 158 #define HAVE_nops (reload_completed) 159 #define HAVE_pad 1 160 #define HAVE_set_got (!TARGET_64BIT) 161 #define HAVE_set_got_labelled (!TARGET_64BIT) 162 #define HAVE_set_got_rex64 (TARGET_64BIT) 163 #define HAVE_set_rip_rex64 (TARGET_64BIT) 164 #define HAVE_set_got_offset_rex64 (TARGET_LP64) 165 #define HAVE_eh_return_internal 1 166 #define HAVE_leave (!TARGET_64BIT) 167 #define HAVE_leave_rex64 (TARGET_64BIT) 168 #define HAVE_split_stack_return 1 169 #define HAVE_ffssi2_no_cmove (!TARGET_CMOVE) 170 #define HAVE_ctzhi2 1 171 #define HAVE_ctzsi2 1 172 #define HAVE_ctzdi2 (TARGET_64BIT) 173 #define HAVE_clzhi2_lzcnt (TARGET_LZCNT) 174 #define HAVE_clzsi2_lzcnt (TARGET_LZCNT) 175 #define HAVE_clzdi2_lzcnt ((TARGET_LZCNT) && (TARGET_64BIT)) 176 #define HAVE_bmi_bextr_si (TARGET_BMI) 177 #define HAVE_bmi_bextr_di ((TARGET_BMI) && (TARGET_64BIT)) 178 #define HAVE_bmi2_bzhi_si3 (TARGET_BMI2) 179 #define HAVE_bmi2_bzhi_di3 ((TARGET_BMI2) && (TARGET_64BIT)) 180 #define HAVE_bmi2_pdep_si3 (TARGET_BMI2) 181 #define HAVE_bmi2_pdep_di3 ((TARGET_BMI2) && (TARGET_64BIT)) 182 #define HAVE_bmi2_pext_si3 (TARGET_BMI2) 183 #define HAVE_bmi2_pext_di3 ((TARGET_BMI2) && (TARGET_64BIT)) 184 #define HAVE_tbm_bextri_si (TARGET_TBM) 185 #define HAVE_tbm_bextri_di ((TARGET_TBM) && (TARGET_64BIT)) 186 #define HAVE_bsr_rex64 (TARGET_64BIT) 187 #define HAVE_bsr 1 188 #define HAVE_popcounthi2 (TARGET_POPCNT) 189 #define HAVE_popcountsi2 (TARGET_POPCNT) 190 #define HAVE_popcountdi2 ((TARGET_POPCNT) && (TARGET_64BIT)) 191 #define HAVE_bswaphi_lowpart 1 192 #define HAVE_paritydi2_cmp (! TARGET_POPCNT) 193 #define HAVE_paritysi2_cmp (! TARGET_POPCNT) 194 #define HAVE_truncxfsf2_i387_noop_unspec (TARGET_USE_FANCY_MATH_387) 195 #define HAVE_truncxfdf2_i387_noop_unspec (TARGET_USE_FANCY_MATH_387) 196 #define HAVE_sqrtxf2 (TARGET_USE_FANCY_MATH_387) 197 #define HAVE_sqrt_extendsfxf2_i387 (TARGET_USE_FANCY_MATH_387) 198 #define HAVE_sqrt_extenddfxf2_i387 (TARGET_USE_FANCY_MATH_387) 199 #define HAVE_fpremxf4_i387 (TARGET_USE_FANCY_MATH_387) 200 #define HAVE_fprem1xf4_i387 (TARGET_USE_FANCY_MATH_387) 201 #define HAVE_sincosxf3 (TARGET_USE_FANCY_MATH_387 \ 202 && flag_unsafe_math_optimizations) 203 #define HAVE_sincos_extendsfxf3_i387 (TARGET_USE_FANCY_MATH_387 \ 204 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 205 || TARGET_MIX_SSE_I387) \ 206 && flag_unsafe_math_optimizations) 207 #define HAVE_sincos_extenddfxf3_i387 (TARGET_USE_FANCY_MATH_387 \ 208 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 209 || TARGET_MIX_SSE_I387) \ 210 && flag_unsafe_math_optimizations) 211 #define HAVE_fptanxf4_i387 (TARGET_USE_FANCY_MATH_387 \ 212 && flag_unsafe_math_optimizations \ 213 && standard_80387_constant_p (operands[3]) == 2) 214 #define HAVE_fptan_extendsfxf4_i387 (TARGET_USE_FANCY_MATH_387 \ 215 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 216 || TARGET_MIX_SSE_I387) \ 217 && flag_unsafe_math_optimizations \ 218 && standard_80387_constant_p (operands[3]) == 2) 219 #define HAVE_fptan_extenddfxf4_i387 (TARGET_USE_FANCY_MATH_387 \ 220 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 221 || TARGET_MIX_SSE_I387) \ 222 && flag_unsafe_math_optimizations \ 223 && standard_80387_constant_p (operands[3]) == 2) 224 #define HAVE_fpatan_extendsfxf3_i387 (TARGET_USE_FANCY_MATH_387 \ 225 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 226 || TARGET_MIX_SSE_I387) \ 227 && flag_unsafe_math_optimizations) 228 #define HAVE_fpatan_extenddfxf3_i387 (TARGET_USE_FANCY_MATH_387 \ 229 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 230 || TARGET_MIX_SSE_I387) \ 231 && flag_unsafe_math_optimizations) 232 #define HAVE_fyl2xxf3_i387 (TARGET_USE_FANCY_MATH_387 \ 233 && flag_unsafe_math_optimizations) 234 #define HAVE_fyl2x_extendsfxf3_i387 (TARGET_USE_FANCY_MATH_387 \ 235 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 236 || TARGET_MIX_SSE_I387) \ 237 && flag_unsafe_math_optimizations) 238 #define HAVE_fyl2x_extenddfxf3_i387 (TARGET_USE_FANCY_MATH_387 \ 239 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 240 || TARGET_MIX_SSE_I387) \ 241 && flag_unsafe_math_optimizations) 242 #define HAVE_fyl2xp1xf3_i387 (TARGET_USE_FANCY_MATH_387 \ 243 && flag_unsafe_math_optimizations) 244 #define HAVE_fyl2xp1_extendsfxf3_i387 (TARGET_USE_FANCY_MATH_387 \ 245 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 246 || TARGET_MIX_SSE_I387) \ 247 && flag_unsafe_math_optimizations) 248 #define HAVE_fyl2xp1_extenddfxf3_i387 (TARGET_USE_FANCY_MATH_387 \ 249 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 250 || TARGET_MIX_SSE_I387) \ 251 && flag_unsafe_math_optimizations) 252 #define HAVE_fxtractxf3_i387 (TARGET_USE_FANCY_MATH_387 \ 253 && flag_unsafe_math_optimizations) 254 #define HAVE_fxtract_extendsfxf3_i387 (TARGET_USE_FANCY_MATH_387 \ 255 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 256 || TARGET_MIX_SSE_I387) \ 257 && flag_unsafe_math_optimizations) 258 #define HAVE_fxtract_extenddfxf3_i387 (TARGET_USE_FANCY_MATH_387 \ 259 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 260 || TARGET_MIX_SSE_I387) \ 261 && flag_unsafe_math_optimizations) 262 #define HAVE_sse4_1_roundsf2 (TARGET_ROUND) 263 #define HAVE_sse4_1_rounddf2 (TARGET_ROUND) 264 #define HAVE_rintxf2 (TARGET_USE_FANCY_MATH_387 \ 265 && flag_unsafe_math_optimizations) 266 #define HAVE_fistdi2 (TARGET_USE_FANCY_MATH_387) 267 #define HAVE_fistdi2_with_temp (TARGET_USE_FANCY_MATH_387) 268 #define HAVE_fisthi2 (TARGET_USE_FANCY_MATH_387) 269 #define HAVE_fistsi2 (TARGET_USE_FANCY_MATH_387) 270 #define HAVE_fisthi2_with_temp (TARGET_USE_FANCY_MATH_387) 271 #define HAVE_fistsi2_with_temp (TARGET_USE_FANCY_MATH_387) 272 #define HAVE_frndintxf2_floor (TARGET_USE_FANCY_MATH_387 \ 273 && flag_unsafe_math_optimizations \ 274 && can_create_pseudo_p ()) 275 #define HAVE_frndintxf2_ceil (TARGET_USE_FANCY_MATH_387 \ 276 && flag_unsafe_math_optimizations \ 277 && can_create_pseudo_p ()) 278 #define HAVE_frndintxf2_trunc (TARGET_USE_FANCY_MATH_387 \ 279 && flag_unsafe_math_optimizations \ 280 && can_create_pseudo_p ()) 281 #define HAVE_frndintxf2_floor_i387 (TARGET_USE_FANCY_MATH_387 \ 282 && flag_unsafe_math_optimizations) 283 #define HAVE_frndintxf2_ceil_i387 (TARGET_USE_FANCY_MATH_387 \ 284 && flag_unsafe_math_optimizations) 285 #define HAVE_frndintxf2_trunc_i387 (TARGET_USE_FANCY_MATH_387 \ 286 && flag_unsafe_math_optimizations) 287 #define HAVE_frndintxf2_mask_pm (TARGET_USE_FANCY_MATH_387 \ 288 && flag_unsafe_math_optimizations \ 289 && can_create_pseudo_p ()) 290 #define HAVE_frndintxf2_mask_pm_i387 (TARGET_USE_FANCY_MATH_387 \ 291 && flag_unsafe_math_optimizations) 292 #define HAVE_fistdi2_floor (TARGET_USE_FANCY_MATH_387 \ 293 && flag_unsafe_math_optimizations) 294 #define HAVE_fistdi2_ceil (TARGET_USE_FANCY_MATH_387 \ 295 && flag_unsafe_math_optimizations) 296 #define HAVE_fistdi2_floor_with_temp (TARGET_USE_FANCY_MATH_387 \ 297 && flag_unsafe_math_optimizations) 298 #define HAVE_fistdi2_ceil_with_temp (TARGET_USE_FANCY_MATH_387 \ 299 && flag_unsafe_math_optimizations) 300 #define HAVE_fisthi2_floor (TARGET_USE_FANCY_MATH_387 \ 301 && flag_unsafe_math_optimizations) 302 #define HAVE_fisthi2_ceil (TARGET_USE_FANCY_MATH_387 \ 303 && flag_unsafe_math_optimizations) 304 #define HAVE_fistsi2_floor (TARGET_USE_FANCY_MATH_387 \ 305 && flag_unsafe_math_optimizations) 306 #define HAVE_fistsi2_ceil (TARGET_USE_FANCY_MATH_387 \ 307 && flag_unsafe_math_optimizations) 308 #define HAVE_fisthi2_floor_with_temp (TARGET_USE_FANCY_MATH_387 \ 309 && flag_unsafe_math_optimizations) 310 #define HAVE_fisthi2_ceil_with_temp (TARGET_USE_FANCY_MATH_387 \ 311 && flag_unsafe_math_optimizations) 312 #define HAVE_fistsi2_floor_with_temp (TARGET_USE_FANCY_MATH_387 \ 313 && flag_unsafe_math_optimizations) 314 #define HAVE_fistsi2_ceil_with_temp (TARGET_USE_FANCY_MATH_387 \ 315 && flag_unsafe_math_optimizations) 316 #define HAVE_fxamsf2_i387 (TARGET_USE_FANCY_MATH_387) 317 #define HAVE_fxamdf2_i387 (TARGET_USE_FANCY_MATH_387) 318 #define HAVE_fxamxf2_i387 (TARGET_USE_FANCY_MATH_387) 319 #define HAVE_fxamsf2_i387_with_temp (TARGET_USE_FANCY_MATH_387 \ 320 && can_create_pseudo_p ()) 321 #define HAVE_fxamdf2_i387_with_temp (TARGET_USE_FANCY_MATH_387 \ 322 && can_create_pseudo_p ()) 323 #define HAVE_movmsk_df (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) 324 #define HAVE_cld 1 325 #define HAVE_smaxsf3 (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) 326 #define HAVE_sminsf3 (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) 327 #define HAVE_smaxdf3 (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) 328 #define HAVE_smindf3 (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) 329 #define HAVE_pro_epilogue_adjust_stack_si_add (Pmode == SImode) 330 #define HAVE_pro_epilogue_adjust_stack_di_add (Pmode == DImode) 331 #define HAVE_pro_epilogue_adjust_stack_si_sub (Pmode == SImode) 332 #define HAVE_pro_epilogue_adjust_stack_di_sub (Pmode == DImode) 333 #define HAVE_allocate_stack_worker_probe_si ((ix86_target_stack_probe ()) && (Pmode == SImode)) 334 #define HAVE_allocate_stack_worker_probe_di ((ix86_target_stack_probe ()) && (Pmode == DImode)) 335 #define HAVE_adjust_stack_and_probesi (Pmode == SImode) 336 #define HAVE_adjust_stack_and_probedi (Pmode == DImode) 337 #define HAVE_probe_stack_rangesi (Pmode == SImode) 338 #define HAVE_probe_stack_rangedi (Pmode == DImode) 339 #define HAVE_trap 1 340 #define HAVE_stack_protect_set_si ((!TARGET_HAS_BIONIC) && (ptr_mode == SImode)) 341 #define HAVE_stack_protect_set_di ((!TARGET_HAS_BIONIC) && (ptr_mode == DImode)) 342 #define HAVE_stack_tls_protect_set_si (ptr_mode == SImode) 343 #define HAVE_stack_tls_protect_set_di (ptr_mode == DImode) 344 #define HAVE_stack_protect_test_si ((!TARGET_HAS_BIONIC) && (ptr_mode == SImode)) 345 #define HAVE_stack_protect_test_di ((!TARGET_HAS_BIONIC) && (ptr_mode == DImode)) 346 #define HAVE_stack_tls_protect_test_si (ptr_mode == SImode) 347 #define HAVE_stack_tls_protect_test_di (ptr_mode == DImode) 348 #define HAVE_sse4_2_crc32qi (TARGET_SSE4_2 || TARGET_CRC32) 349 #define HAVE_sse4_2_crc32hi (TARGET_SSE4_2 || TARGET_CRC32) 350 #define HAVE_sse4_2_crc32si (TARGET_SSE4_2 || TARGET_CRC32) 351 #define HAVE_sse4_2_crc32di (TARGET_64BIT && (TARGET_SSE4_2 || TARGET_CRC32)) 352 #define HAVE_rdpmc (!TARGET_64BIT) 353 #define HAVE_rdpmc_rex64 (TARGET_64BIT) 354 #define HAVE_rdtsc (!TARGET_64BIT) 355 #define HAVE_rdtsc_rex64 (TARGET_64BIT) 356 #define HAVE_rdtscp (!TARGET_64BIT) 357 #define HAVE_rdtscp_rex64 (TARGET_64BIT) 358 #define HAVE_fxsave (TARGET_FXSR) 359 #define HAVE_fxsave64 (TARGET_64BIT && TARGET_FXSR) 360 #define HAVE_fxrstor (TARGET_FXSR) 361 #define HAVE_fxrstor64 (TARGET_64BIT && TARGET_FXSR) 362 #define HAVE_xsave (!TARGET_64BIT && TARGET_XSAVE) 363 #define HAVE_xsaveopt ((!TARGET_64BIT && TARGET_XSAVE) && (TARGET_XSAVEOPT)) 364 #define HAVE_xsave_rex64 (TARGET_64BIT && TARGET_XSAVE) 365 #define HAVE_xsaveopt_rex64 ((TARGET_64BIT && TARGET_XSAVE) && (TARGET_XSAVEOPT)) 366 #define HAVE_xsave64 (TARGET_64BIT && TARGET_XSAVE) 367 #define HAVE_xsaveopt64 ((TARGET_64BIT && TARGET_XSAVE) && (TARGET_XSAVEOPT)) 368 #define HAVE_xrstor (!TARGET_64BIT && TARGET_XSAVE) 369 #define HAVE_xrstor_rex64 (TARGET_64BIT && TARGET_XSAVE) 370 #define HAVE_xrstor64 (TARGET_64BIT && TARGET_XSAVE) 371 #define HAVE_lwp_slwpcbsi ((TARGET_LWP) && (Pmode == SImode)) 372 #define HAVE_lwp_slwpcbdi ((TARGET_LWP) && (Pmode == DImode)) 373 #define HAVE_rdfsbasesi (TARGET_64BIT && TARGET_FSGSBASE) 374 #define HAVE_rdgsbasesi (TARGET_64BIT && TARGET_FSGSBASE) 375 #define HAVE_rdfsbasedi ((TARGET_64BIT && TARGET_FSGSBASE) && (TARGET_64BIT)) 376 #define HAVE_rdgsbasedi ((TARGET_64BIT && TARGET_FSGSBASE) && (TARGET_64BIT)) 377 #define HAVE_wrfsbasesi (TARGET_64BIT && TARGET_FSGSBASE) 378 #define HAVE_wrgsbasesi (TARGET_64BIT && TARGET_FSGSBASE) 379 #define HAVE_wrfsbasedi ((TARGET_64BIT && TARGET_FSGSBASE) && (TARGET_64BIT)) 380 #define HAVE_wrgsbasedi ((TARGET_64BIT && TARGET_FSGSBASE) && (TARGET_64BIT)) 381 #define HAVE_rdrandhi_1 (TARGET_RDRND) 382 #define HAVE_rdrandsi_1 (TARGET_RDRND) 383 #define HAVE_rdranddi_1 ((TARGET_RDRND) && (TARGET_64BIT)) 384 #define HAVE_rdseedhi_1 (TARGET_RDSEED) 385 #define HAVE_rdseedsi_1 (TARGET_RDSEED) 386 #define HAVE_rdseeddi_1 ((TARGET_RDSEED) && (TARGET_64BIT)) 387 #define HAVE_xbegin_1 (TARGET_RTM) 388 #define HAVE_xend (TARGET_RTM) 389 #define HAVE_xabort (TARGET_RTM) 390 #define HAVE_xtest_1 (TARGET_RTM) 391 #define HAVE_sse_movntq (TARGET_SSE || TARGET_3DNOW_A) 392 #define HAVE_mmx_rcpv2sf2 (TARGET_3DNOW) 393 #define HAVE_mmx_rcpit1v2sf3 (TARGET_3DNOW) 394 #define HAVE_mmx_rcpit2v2sf3 (TARGET_3DNOW) 395 #define HAVE_mmx_rsqrtv2sf2 (TARGET_3DNOW) 396 #define HAVE_mmx_rsqit1v2sf3 (TARGET_3DNOW) 397 #define HAVE_mmx_haddv2sf3 (TARGET_3DNOW) 398 #define HAVE_mmx_hsubv2sf3 (TARGET_3DNOW_A) 399 #define HAVE_mmx_addsubv2sf3 (TARGET_3DNOW_A) 400 #define HAVE_mmx_gtv2sf3 (TARGET_3DNOW) 401 #define HAVE_mmx_gev2sf3 (TARGET_3DNOW) 402 #define HAVE_mmx_pf2id (TARGET_3DNOW) 403 #define HAVE_mmx_pf2iw (TARGET_3DNOW_A) 404 #define HAVE_mmx_pi2fw (TARGET_3DNOW_A) 405 #define HAVE_mmx_floatv2si2 (TARGET_3DNOW) 406 #define HAVE_mmx_pswapdv2sf2 (TARGET_3DNOW_A) 407 #define HAVE_mmx_ashrv4hi3 (TARGET_MMX) 408 #define HAVE_mmx_ashrv2si3 (TARGET_MMX) 409 #define HAVE_mmx_ashlv4hi3 (TARGET_MMX) 410 #define HAVE_mmx_lshrv4hi3 (TARGET_MMX) 411 #define HAVE_mmx_ashlv2si3 (TARGET_MMX) 412 #define HAVE_mmx_lshrv2si3 (TARGET_MMX) 413 #define HAVE_mmx_ashlv1di3 (TARGET_MMX) 414 #define HAVE_mmx_lshrv1di3 (TARGET_MMX) 415 #define HAVE_mmx_gtv8qi3 (TARGET_MMX) 416 #define HAVE_mmx_gtv4hi3 (TARGET_MMX) 417 #define HAVE_mmx_gtv2si3 (TARGET_MMX) 418 #define HAVE_mmx_andnotv8qi3 (TARGET_MMX) 419 #define HAVE_mmx_andnotv4hi3 (TARGET_MMX) 420 #define HAVE_mmx_andnotv2si3 (TARGET_MMX) 421 #define HAVE_mmx_packsswb (TARGET_MMX) 422 #define HAVE_mmx_packssdw (TARGET_MMX) 423 #define HAVE_mmx_packuswb (TARGET_MMX) 424 #define HAVE_mmx_punpckhbw (TARGET_MMX) 425 #define HAVE_mmx_punpcklbw (TARGET_MMX) 426 #define HAVE_mmx_punpckhwd (TARGET_MMX) 427 #define HAVE_mmx_punpcklwd (TARGET_MMX) 428 #define HAVE_mmx_punpckhdq (TARGET_MMX) 429 #define HAVE_mmx_punpckldq (TARGET_MMX) 430 #define HAVE_mmx_pextrw (TARGET_SSE || TARGET_3DNOW_A) 431 #define HAVE_mmx_pshufw_1 (TARGET_SSE || TARGET_3DNOW_A) 432 #define HAVE_mmx_pswapdv2si2 (TARGET_3DNOW_A) 433 #define HAVE_mmx_psadbw (TARGET_SSE || TARGET_3DNOW_A) 434 #define HAVE_mmx_pmovmskb (TARGET_SSE || TARGET_3DNOW_A) 435 #define HAVE_sse2_movq128 (TARGET_SSE2) 436 #define HAVE_movdi_to_sse (!TARGET_64BIT && TARGET_SSE2 && TARGET_INTER_UNIT_MOVES) 437 #define HAVE_avx_loadups256 ((TARGET_SSE) && (TARGET_AVX)) 438 #define HAVE_sse_loadups (TARGET_SSE) 439 #define HAVE_avx_loadupd256 ((TARGET_SSE) && (TARGET_AVX)) 440 #define HAVE_sse2_loadupd ((TARGET_SSE) && (TARGET_SSE2)) 441 #define HAVE_avx_storeups256 ((TARGET_SSE) && (TARGET_AVX)) 442 #define HAVE_sse_storeups (TARGET_SSE) 443 #define HAVE_avx_storeupd256 ((TARGET_SSE) && (TARGET_AVX)) 444 #define HAVE_sse2_storeupd ((TARGET_SSE) && (TARGET_SSE2)) 445 #define HAVE_avx_loaddqu256 ((TARGET_SSE2) && (TARGET_AVX)) 446 #define HAVE_sse2_loaddqu (TARGET_SSE2) 447 #define HAVE_avx_storedqu256 ((TARGET_SSE2) && (TARGET_AVX)) 448 #define HAVE_sse2_storedqu (TARGET_SSE2) 449 #define HAVE_avx_lddqu256 ((TARGET_SSE3) && (TARGET_AVX)) 450 #define HAVE_sse3_lddqu (TARGET_SSE3) 451 #define HAVE_sse2_movntisi (TARGET_SSE2) 452 #define HAVE_sse2_movntidi ((TARGET_SSE2) && (TARGET_64BIT)) 453 #define HAVE_avx_movntv8sf ((TARGET_SSE) && (TARGET_AVX)) 454 #define HAVE_sse_movntv4sf (TARGET_SSE) 455 #define HAVE_avx_movntv4df ((TARGET_SSE) && (TARGET_AVX)) 456 #define HAVE_sse2_movntv2df ((TARGET_SSE) && (TARGET_SSE2)) 457 #define HAVE_avx_movntv4di ((TARGET_SSE2) && (TARGET_AVX)) 458 #define HAVE_sse2_movntv2di (TARGET_SSE2) 459 #define HAVE_sse_vmaddv4sf3 (TARGET_SSE) 460 #define HAVE_sse_vmsubv4sf3 (TARGET_SSE) 461 #define HAVE_sse2_vmaddv2df3 ((TARGET_SSE) && (TARGET_SSE2)) 462 #define HAVE_sse2_vmsubv2df3 ((TARGET_SSE) && (TARGET_SSE2)) 463 #define HAVE_sse_vmmulv4sf3 (TARGET_SSE) 464 #define HAVE_sse2_vmmulv2df3 ((TARGET_SSE) && (TARGET_SSE2)) 465 #define HAVE_avx_divv8sf3 ((TARGET_SSE) && (TARGET_AVX)) 466 #define HAVE_sse_divv4sf3 (TARGET_SSE) 467 #define HAVE_avx_divv4df3 ((TARGET_SSE) && (TARGET_AVX)) 468 #define HAVE_sse2_divv2df3 ((TARGET_SSE) && (TARGET_SSE2)) 469 #define HAVE_sse_vmdivv4sf3 (TARGET_SSE) 470 #define HAVE_sse2_vmdivv2df3 ((TARGET_SSE) && (TARGET_SSE2)) 471 #define HAVE_avx_rcpv8sf2 ((TARGET_SSE) && (TARGET_AVX)) 472 #define HAVE_sse_rcpv4sf2 (TARGET_SSE) 473 #define HAVE_sse_vmrcpv4sf2 (TARGET_SSE) 474 #define HAVE_avx_sqrtv8sf2 ((TARGET_SSE) && (TARGET_AVX)) 475 #define HAVE_sse_sqrtv4sf2 (TARGET_SSE) 476 #define HAVE_avx_sqrtv4df2 ((TARGET_SSE) && (TARGET_AVX)) 477 #define HAVE_sse2_sqrtv2df2 ((TARGET_SSE) && (TARGET_SSE2)) 478 #define HAVE_sse_vmsqrtv4sf2 (TARGET_SSE) 479 #define HAVE_sse2_vmsqrtv2df2 ((TARGET_SSE) && (TARGET_SSE2)) 480 #define HAVE_avx_rsqrtv8sf2 ((TARGET_SSE) && (TARGET_AVX)) 481 #define HAVE_sse_rsqrtv4sf2 (TARGET_SSE) 482 #define HAVE_sse_vmrsqrtv4sf2 (TARGET_SSE) 483 #define HAVE_sse_vmsmaxv4sf3 (TARGET_SSE) 484 #define HAVE_sse_vmsminv4sf3 (TARGET_SSE) 485 #define HAVE_sse2_vmsmaxv2df3 ((TARGET_SSE) && (TARGET_SSE2)) 486 #define HAVE_sse2_vmsminv2df3 ((TARGET_SSE) && (TARGET_SSE2)) 487 #define HAVE_avx_addsubv4df3 (TARGET_AVX) 488 #define HAVE_sse3_addsubv2df3 (TARGET_SSE3) 489 #define HAVE_avx_addsubv8sf3 (TARGET_AVX) 490 #define HAVE_sse3_addsubv4sf3 (TARGET_SSE3) 491 #define HAVE_avx_haddv4df3 (TARGET_AVX) 492 #define HAVE_avx_hsubv4df3 (TARGET_AVX) 493 #define HAVE_sse3_hsubv2df3 (TARGET_SSE3) 494 #define HAVE_avx_haddv8sf3 (TARGET_AVX) 495 #define HAVE_avx_hsubv8sf3 (TARGET_AVX) 496 #define HAVE_sse3_haddv4sf3 (TARGET_SSE3) 497 #define HAVE_sse3_hsubv4sf3 (TARGET_SSE3) 498 #define HAVE_avx_cmpv8sf3 (TARGET_AVX) 499 #define HAVE_avx_cmpv4sf3 (TARGET_AVX) 500 #define HAVE_avx_cmpv4df3 (TARGET_AVX) 501 #define HAVE_avx_cmpv2df3 ((TARGET_AVX) && (TARGET_SSE2)) 502 #define HAVE_avx_vmcmpv4sf3 (TARGET_AVX) 503 #define HAVE_avx_vmcmpv2df3 ((TARGET_AVX) && (TARGET_SSE2)) 504 #define HAVE_avx_maskcmpv8sf3 ((TARGET_SSE) && (TARGET_AVX)) 505 #define HAVE_sse_maskcmpv4sf3 (TARGET_SSE) 506 #define HAVE_avx_maskcmpv4df3 ((TARGET_SSE) && (TARGET_AVX)) 507 #define HAVE_sse2_maskcmpv2df3 ((TARGET_SSE) && (TARGET_SSE2)) 508 #define HAVE_sse_vmmaskcmpv4sf3 (TARGET_SSE) 509 #define HAVE_sse2_vmmaskcmpv2df3 ((TARGET_SSE) && (TARGET_SSE2)) 510 #define HAVE_sse_comi (SSE_FLOAT_MODE_P (SFmode)) 511 #define HAVE_sse2_comi (SSE_FLOAT_MODE_P (DFmode)) 512 #define HAVE_sse_ucomi (SSE_FLOAT_MODE_P (SFmode)) 513 #define HAVE_sse2_ucomi (SSE_FLOAT_MODE_P (DFmode)) 514 #define HAVE_avx_andnotv8sf3 ((TARGET_SSE) && (TARGET_AVX)) 515 #define HAVE_sse_andnotv4sf3 (TARGET_SSE) 516 #define HAVE_avx_andnotv4df3 ((TARGET_SSE) && (TARGET_AVX)) 517 #define HAVE_sse2_andnotv2df3 ((TARGET_SSE) && (TARGET_SSE2)) 518 #define HAVE_sse_cvtpi2ps (TARGET_SSE) 519 #define HAVE_sse_cvtps2pi (TARGET_SSE) 520 #define HAVE_sse_cvttps2pi (TARGET_SSE) 521 #define HAVE_sse_cvtsi2ss (TARGET_SSE) 522 #define HAVE_sse_cvtsi2ssq (TARGET_SSE && TARGET_64BIT) 523 #define HAVE_sse_cvtss2si (TARGET_SSE) 524 #define HAVE_sse_cvtss2si_2 (TARGET_SSE) 525 #define HAVE_sse_cvtss2siq (TARGET_SSE && TARGET_64BIT) 526 #define HAVE_sse_cvtss2siq_2 (TARGET_SSE && TARGET_64BIT) 527 #define HAVE_sse_cvttss2si (TARGET_SSE) 528 #define HAVE_sse_cvttss2siq (TARGET_SSE && TARGET_64BIT) 529 #define HAVE_floatv8siv8sf2 ((TARGET_SSE2) && (TARGET_AVX)) 530 #define HAVE_floatv4siv4sf2 (TARGET_SSE2) 531 #define HAVE_avx_cvtps2dq256 (TARGET_AVX) 532 #define HAVE_sse2_cvtps2dq (TARGET_SSE2) 533 #define HAVE_fix_truncv8sfv8si2 (TARGET_AVX) 534 #define HAVE_fix_truncv4sfv4si2 (TARGET_SSE2) 535 #define HAVE_sse2_cvtpi2pd (TARGET_SSE2) 536 #define HAVE_sse2_cvtpd2pi (TARGET_SSE2) 537 #define HAVE_sse2_cvttpd2pi (TARGET_SSE2) 538 #define HAVE_sse2_cvtsi2sd (TARGET_SSE2) 539 #define HAVE_sse2_cvtsi2sdq (TARGET_SSE2 && TARGET_64BIT) 540 #define HAVE_sse2_cvtsd2si (TARGET_SSE2) 541 #define HAVE_sse2_cvtsd2si_2 (TARGET_SSE2) 542 #define HAVE_sse2_cvtsd2siq (TARGET_SSE2 && TARGET_64BIT) 543 #define HAVE_sse2_cvtsd2siq_2 (TARGET_SSE2 && TARGET_64BIT) 544 #define HAVE_sse2_cvttsd2si (TARGET_SSE2) 545 #define HAVE_sse2_cvttsd2siq (TARGET_SSE2 && TARGET_64BIT) 546 #define HAVE_floatv4siv4df2 (TARGET_AVX) 547 #define HAVE_avx_cvtdq2pd256_2 (TARGET_AVX) 548 #define HAVE_sse2_cvtdq2pd (TARGET_SSE2) 549 #define HAVE_avx_cvtpd2dq256 (TARGET_AVX) 550 #define HAVE_fix_truncv4dfv4si2 (TARGET_AVX) 551 #define HAVE_sse2_cvtsd2ss (TARGET_SSE2) 552 #define HAVE_sse2_cvtss2sd (TARGET_SSE2) 553 #define HAVE_avx_cvtpd2ps256 (TARGET_AVX) 554 #define HAVE_avx_cvtps2pd256 (TARGET_AVX) 555 #define HAVE_sse2_cvtps2pd (TARGET_SSE2) 556 #define HAVE_sse_movhlps (TARGET_SSE && !(MEM_P (operands[1]) && MEM_P (operands[2]))) 557 #define HAVE_sse_movlhps (TARGET_SSE && ix86_binary_operator_ok (UNKNOWN, V4SFmode, operands)) 558 #define HAVE_avx_unpckhps256 (TARGET_AVX) 559 #define HAVE_vec_interleave_highv4sf (TARGET_SSE) 560 #define HAVE_avx_unpcklps256 (TARGET_AVX) 561 #define HAVE_vec_interleave_lowv4sf (TARGET_SSE) 562 #define HAVE_avx_movshdup256 (TARGET_AVX) 563 #define HAVE_sse3_movshdup (TARGET_SSE3) 564 #define HAVE_avx_movsldup256 (TARGET_AVX) 565 #define HAVE_sse3_movsldup (TARGET_SSE3) 566 #define HAVE_avx_shufps256_1 (TARGET_AVX \ 567 && (INTVAL (operands[3]) == (INTVAL (operands[7]) - 4) \ 568 && INTVAL (operands[4]) == (INTVAL (operands[8]) - 4) \ 569 && INTVAL (operands[5]) == (INTVAL (operands[9]) - 4) \ 570 && INTVAL (operands[6]) == (INTVAL (operands[10]) - 4))) 571 #define HAVE_sse_shufps_v4si (TARGET_SSE) 572 #define HAVE_sse_shufps_v4sf (TARGET_SSE) 573 #define HAVE_sse_storehps (TARGET_SSE) 574 #define HAVE_sse_loadhps (TARGET_SSE) 575 #define HAVE_sse_storelps (TARGET_SSE) 576 #define HAVE_sse_loadlps (TARGET_SSE) 577 #define HAVE_sse_movss (TARGET_SSE) 578 #define HAVE_avx2_vec_dupv8sf ((TARGET_AVX2) && (TARGET_AVX)) 579 #define HAVE_avx2_vec_dupv4sf (TARGET_AVX2) 580 #define HAVE_avx2_vec_dupv8sf_1 (TARGET_AVX2) 581 #define HAVE_vec_dupv4sf (TARGET_SSE) 582 #define HAVE_vec_setv4si_0 (TARGET_SSE) 583 #define HAVE_vec_setv4sf_0 (TARGET_SSE) 584 #define HAVE_sse4_1_insertps (TARGET_SSE4_1) 585 #define HAVE_vec_extract_lo_v4di (TARGET_AVX && !(MEM_P (operands[0]) && MEM_P (operands[1]))) 586 #define HAVE_vec_extract_lo_v4df (TARGET_AVX && !(MEM_P (operands[0]) && MEM_P (operands[1]))) 587 #define HAVE_vec_extract_hi_v4di (TARGET_AVX) 588 #define HAVE_vec_extract_hi_v4df (TARGET_AVX) 589 #define HAVE_vec_extract_lo_v8si (TARGET_AVX && !(MEM_P (operands[0]) && MEM_P (operands[1]))) 590 #define HAVE_vec_extract_lo_v8sf (TARGET_AVX && !(MEM_P (operands[0]) && MEM_P (operands[1]))) 591 #define HAVE_vec_extract_hi_v8si (TARGET_AVX) 592 #define HAVE_vec_extract_hi_v8sf (TARGET_AVX) 593 #define HAVE_vec_extract_lo_v16hi (TARGET_AVX && !(MEM_P (operands[0]) && MEM_P (operands[1]))) 594 #define HAVE_vec_extract_hi_v16hi (TARGET_AVX) 595 #define HAVE_vec_extract_lo_v32qi (TARGET_AVX && !(MEM_P (operands[0]) && MEM_P (operands[1]))) 596 #define HAVE_vec_extract_hi_v32qi (TARGET_AVX) 597 #define HAVE_avx_unpckhpd256 (TARGET_AVX) 598 #define HAVE_avx_shufpd256_1 (TARGET_AVX) 599 #define HAVE_avx2_interleave_highv4di (TARGET_AVX2) 600 #define HAVE_vec_interleave_highv2di (TARGET_SSE2) 601 #define HAVE_avx2_interleave_lowv4di (TARGET_AVX2) 602 #define HAVE_vec_interleave_lowv2di (TARGET_SSE2) 603 #define HAVE_sse2_shufpd_v2di (TARGET_SSE2) 604 #define HAVE_sse2_shufpd_v2df (TARGET_SSE2) 605 #define HAVE_sse2_storehpd (TARGET_SSE2 && !(MEM_P (operands[0]) && MEM_P (operands[1]))) 606 #define HAVE_sse2_storelpd (TARGET_SSE2 && !(MEM_P (operands[0]) && MEM_P (operands[1]))) 607 #define HAVE_sse2_loadhpd (TARGET_SSE2 && !(MEM_P (operands[1]) && MEM_P (operands[2]))) 608 #define HAVE_sse2_loadlpd (TARGET_SSE2 && !(MEM_P (operands[1]) && MEM_P (operands[2]))) 609 #define HAVE_sse2_movsd (TARGET_SSE2) 610 #define HAVE_vec_dupv2df (TARGET_SSE2) 611 #define HAVE_ashrv16hi3 ((TARGET_SSE2) && (TARGET_AVX2)) 612 #define HAVE_ashrv8hi3 (TARGET_SSE2) 613 #define HAVE_ashrv8si3 ((TARGET_SSE2) && (TARGET_AVX2)) 614 #define HAVE_ashrv4si3 (TARGET_SSE2) 615 #define HAVE_ashlv16hi3 ((TARGET_SSE2) && (TARGET_AVX2)) 616 #define HAVE_lshrv16hi3 ((TARGET_SSE2) && (TARGET_AVX2)) 617 #define HAVE_ashlv8hi3 (TARGET_SSE2) 618 #define HAVE_lshrv8hi3 (TARGET_SSE2) 619 #define HAVE_ashlv8si3 ((TARGET_SSE2) && (TARGET_AVX2)) 620 #define HAVE_lshrv8si3 ((TARGET_SSE2) && (TARGET_AVX2)) 621 #define HAVE_ashlv4si3 (TARGET_SSE2) 622 #define HAVE_lshrv4si3 (TARGET_SSE2) 623 #define HAVE_ashlv4di3 ((TARGET_SSE2) && (TARGET_AVX2)) 624 #define HAVE_lshrv4di3 ((TARGET_SSE2) && (TARGET_AVX2)) 625 #define HAVE_ashlv2di3 (TARGET_SSE2) 626 #define HAVE_lshrv2di3 (TARGET_SSE2) 627 #define HAVE_avx2_ashlv2ti3 ((TARGET_SSE2) && (TARGET_AVX2)) 628 #define HAVE_sse2_ashlv1ti3 (TARGET_SSE2) 629 #define HAVE_avx2_lshrv2ti3 ((TARGET_SSE2) && (TARGET_AVX2)) 630 #define HAVE_sse2_lshrv1ti3 (TARGET_SSE2) 631 #define HAVE_sse4_2_gtv2di3 (TARGET_SSE4_2) 632 #define HAVE_avx2_gtv32qi3 (TARGET_AVX2) 633 #define HAVE_avx2_gtv16hi3 (TARGET_AVX2) 634 #define HAVE_avx2_gtv8si3 (TARGET_AVX2) 635 #define HAVE_avx2_gtv4di3 (TARGET_AVX2) 636 #define HAVE_sse2_gtv16qi3 (TARGET_SSE2 && !TARGET_XOP) 637 #define HAVE_sse2_gtv8hi3 (TARGET_SSE2 && !TARGET_XOP) 638 #define HAVE_sse2_gtv4si3 (TARGET_SSE2 && !TARGET_XOP) 639 #define HAVE_avx2_packsswb ((TARGET_SSE2) && (TARGET_AVX2)) 640 #define HAVE_sse2_packsswb (TARGET_SSE2) 641 #define HAVE_avx2_packssdw ((TARGET_SSE2) && (TARGET_AVX2)) 642 #define HAVE_sse2_packssdw (TARGET_SSE2) 643 #define HAVE_avx2_packuswb ((TARGET_SSE2) && (TARGET_AVX2)) 644 #define HAVE_sse2_packuswb (TARGET_SSE2) 645 #define HAVE_avx2_interleave_highv32qi (TARGET_AVX2) 646 #define HAVE_vec_interleave_highv16qi (TARGET_SSE2) 647 #define HAVE_avx2_interleave_lowv32qi (TARGET_AVX2) 648 #define HAVE_vec_interleave_lowv16qi (TARGET_SSE2) 649 #define HAVE_avx2_interleave_highv16hi (TARGET_AVX2) 650 #define HAVE_vec_interleave_highv8hi (TARGET_SSE2) 651 #define HAVE_avx2_interleave_lowv16hi (TARGET_AVX2) 652 #define HAVE_vec_interleave_lowv8hi (TARGET_SSE2) 653 #define HAVE_avx2_interleave_highv8si (TARGET_AVX2) 654 #define HAVE_vec_interleave_highv4si (TARGET_SSE2) 655 #define HAVE_avx2_interleave_lowv8si (TARGET_AVX2) 656 #define HAVE_vec_interleave_lowv4si (TARGET_SSE2) 657 #define HAVE_sse4_1_pinsrb ((TARGET_SSE2 \ 658 && ((unsigned) exact_log2 (INTVAL (operands[3])) \ 659 < GET_MODE_NUNITS (V16QImode))) && (TARGET_SSE4_1)) 660 #define HAVE_sse2_pinsrw (TARGET_SSE2 \ 661 && ((unsigned) exact_log2 (INTVAL (operands[3])) \ 662 < GET_MODE_NUNITS (V8HImode))) 663 #define HAVE_sse4_1_pinsrd ((TARGET_SSE2 \ 664 && ((unsigned) exact_log2 (INTVAL (operands[3])) \ 665 < GET_MODE_NUNITS (V4SImode))) && (TARGET_SSE4_1)) 666 #define HAVE_sse4_1_pinsrq ((TARGET_SSE2 \ 667 && ((unsigned) exact_log2 (INTVAL (operands[3])) \ 668 < GET_MODE_NUNITS (V2DImode))) && (TARGET_SSE4_1 && TARGET_64BIT)) 669 #define HAVE_avx2_pshufd_1 (TARGET_AVX2 \ 670 && INTVAL (operands[2]) + 4 == INTVAL (operands[6]) \ 671 && INTVAL (operands[3]) + 4 == INTVAL (operands[7]) \ 672 && INTVAL (operands[4]) + 4 == INTVAL (operands[8]) \ 673 && INTVAL (operands[5]) + 4 == INTVAL (operands[9])) 674 #define HAVE_sse2_pshufd_1 (TARGET_SSE2) 675 #define HAVE_avx2_pshuflw_1 (TARGET_AVX2 \ 676 && INTVAL (operands[2]) + 8 == INTVAL (operands[6]) \ 677 && INTVAL (operands[3]) + 8 == INTVAL (operands[7]) \ 678 && INTVAL (operands[4]) + 8 == INTVAL (operands[8]) \ 679 && INTVAL (operands[5]) + 8 == INTVAL (operands[9])) 680 #define HAVE_sse2_pshuflw_1 (TARGET_SSE2) 681 #define HAVE_avx2_pshufhw_1 (TARGET_AVX2 \ 682 && INTVAL (operands[2]) + 8 == INTVAL (operands[6]) \ 683 && INTVAL (operands[3]) + 8 == INTVAL (operands[7]) \ 684 && INTVAL (operands[4]) + 8 == INTVAL (operands[8]) \ 685 && INTVAL (operands[5]) + 8 == INTVAL (operands[9])) 686 #define HAVE_sse2_pshufhw_1 (TARGET_SSE2) 687 #define HAVE_sse2_loadld (TARGET_SSE) 688 #define HAVE_sse2_stored (TARGET_SSE) 689 #define HAVE_vec_concatv2di (!TARGET_64BIT && TARGET_SSE) 690 #define HAVE_avx2_psadbw ((TARGET_SSE2) && (TARGET_AVX2)) 691 #define HAVE_sse2_psadbw (TARGET_SSE2) 692 #define HAVE_avx_movmskps256 ((TARGET_SSE) && (TARGET_AVX)) 693 #define HAVE_sse_movmskps (TARGET_SSE) 694 #define HAVE_avx_movmskpd256 ((TARGET_SSE) && (TARGET_AVX)) 695 #define HAVE_sse2_movmskpd ((TARGET_SSE) && (TARGET_SSE2)) 696 #define HAVE_avx2_pmovmskb (TARGET_AVX2) 697 #define HAVE_sse2_pmovmskb (TARGET_SSE2) 698 #define HAVE_sse_ldmxcsr (TARGET_SSE) 699 #define HAVE_sse_stmxcsr (TARGET_SSE) 700 #define HAVE_sse2_clflush (TARGET_SSE2) 701 #define HAVE_sse3_mwait (TARGET_SSE3) 702 #define HAVE_sse3_monitor_si ((TARGET_SSE3) && (Pmode == SImode)) 703 #define HAVE_sse3_monitor_di ((TARGET_SSE3) && (Pmode == DImode)) 704 #define HAVE_avx2_phaddwv16hi3 (TARGET_AVX2) 705 #define HAVE_avx2_phaddswv16hi3 (TARGET_AVX2) 706 #define HAVE_avx2_phsubwv16hi3 (TARGET_AVX2) 707 #define HAVE_avx2_phsubswv16hi3 (TARGET_AVX2) 708 #define HAVE_ssse3_phaddwv8hi3 (TARGET_SSSE3) 709 #define HAVE_ssse3_phaddswv8hi3 (TARGET_SSSE3) 710 #define HAVE_ssse3_phsubwv8hi3 (TARGET_SSSE3) 711 #define HAVE_ssse3_phsubswv8hi3 (TARGET_SSSE3) 712 #define HAVE_ssse3_phaddwv4hi3 (TARGET_SSSE3) 713 #define HAVE_ssse3_phaddswv4hi3 (TARGET_SSSE3) 714 #define HAVE_ssse3_phsubwv4hi3 (TARGET_SSSE3) 715 #define HAVE_ssse3_phsubswv4hi3 (TARGET_SSSE3) 716 #define HAVE_avx2_phadddv8si3 (TARGET_AVX2) 717 #define HAVE_avx2_phsubdv8si3 (TARGET_AVX2) 718 #define HAVE_ssse3_phadddv4si3 (TARGET_SSSE3) 719 #define HAVE_ssse3_phsubdv4si3 (TARGET_SSSE3) 720 #define HAVE_ssse3_phadddv2si3 (TARGET_SSSE3) 721 #define HAVE_ssse3_phsubdv2si3 (TARGET_SSSE3) 722 #define HAVE_avx2_pmaddubsw256 (TARGET_AVX2) 723 #define HAVE_ssse3_pmaddubsw128 (TARGET_SSSE3) 724 #define HAVE_ssse3_pmaddubsw (TARGET_SSSE3) 725 #define HAVE_avx2_pshufbv32qi3 ((TARGET_SSSE3) && (TARGET_AVX2)) 726 #define HAVE_ssse3_pshufbv16qi3 (TARGET_SSSE3) 727 #define HAVE_ssse3_pshufbv8qi3 (TARGET_SSSE3) 728 #define HAVE_avx2_psignv32qi3 ((TARGET_SSSE3) && (TARGET_AVX2)) 729 #define HAVE_ssse3_psignv16qi3 (TARGET_SSSE3) 730 #define HAVE_avx2_psignv16hi3 ((TARGET_SSSE3) && (TARGET_AVX2)) 731 #define HAVE_ssse3_psignv8hi3 (TARGET_SSSE3) 732 #define HAVE_avx2_psignv8si3 ((TARGET_SSSE3) && (TARGET_AVX2)) 733 #define HAVE_ssse3_psignv4si3 (TARGET_SSSE3) 734 #define HAVE_ssse3_psignv8qi3 (TARGET_SSSE3) 735 #define HAVE_ssse3_psignv4hi3 (TARGET_SSSE3) 736 #define HAVE_ssse3_psignv2si3 (TARGET_SSSE3) 737 #define HAVE_avx2_palignrv2ti ((TARGET_SSSE3) && (TARGET_AVX2)) 738 #define HAVE_ssse3_palignrti (TARGET_SSSE3) 739 #define HAVE_ssse3_palignrdi (TARGET_SSSE3) 740 #define HAVE_absv32qi2 ((TARGET_SSSE3) && (TARGET_AVX2)) 741 #define HAVE_absv16qi2 (TARGET_SSSE3) 742 #define HAVE_absv16hi2 ((TARGET_SSSE3) && (TARGET_AVX2)) 743 #define HAVE_absv8hi2 (TARGET_SSSE3) 744 #define HAVE_absv8si2 ((TARGET_SSSE3) && (TARGET_AVX2)) 745 #define HAVE_absv4si2 (TARGET_SSSE3) 746 #define HAVE_absv8qi2 (TARGET_SSSE3) 747 #define HAVE_absv4hi2 (TARGET_SSSE3) 748 #define HAVE_absv2si2 (TARGET_SSSE3) 749 #define HAVE_sse4a_movntsf (TARGET_SSE4A) 750 #define HAVE_sse4a_movntdf (TARGET_SSE4A) 751 #define HAVE_sse4a_vmmovntv4sf (TARGET_SSE4A) 752 #define HAVE_sse4a_vmmovntv2df ((TARGET_SSE4A) && (TARGET_SSE2)) 753 #define HAVE_sse4a_extrqi (TARGET_SSE4A) 754 #define HAVE_sse4a_extrq (TARGET_SSE4A) 755 #define HAVE_sse4a_insertqi (TARGET_SSE4A) 756 #define HAVE_sse4a_insertq (TARGET_SSE4A) 757 #define HAVE_avx_blendps256 ((TARGET_SSE4_1) && (TARGET_AVX)) 758 #define HAVE_sse4_1_blendps (TARGET_SSE4_1) 759 #define HAVE_avx_blendpd256 ((TARGET_SSE4_1) && (TARGET_AVX)) 760 #define HAVE_sse4_1_blendpd ((TARGET_SSE4_1) && (TARGET_SSE2)) 761 #define HAVE_avx_blendvps256 ((TARGET_SSE4_1) && (TARGET_AVX)) 762 #define HAVE_sse4_1_blendvps (TARGET_SSE4_1) 763 #define HAVE_avx_blendvpd256 ((TARGET_SSE4_1) && (TARGET_AVX)) 764 #define HAVE_sse4_1_blendvpd ((TARGET_SSE4_1) && (TARGET_SSE2)) 765 #define HAVE_avx_dpps256 ((TARGET_SSE4_1) && (TARGET_AVX)) 766 #define HAVE_sse4_1_dpps (TARGET_SSE4_1) 767 #define HAVE_avx_dppd256 ((TARGET_SSE4_1) && (TARGET_AVX)) 768 #define HAVE_sse4_1_dppd ((TARGET_SSE4_1) && (TARGET_SSE2)) 769 #define HAVE_avx2_movntdqa ((TARGET_SSE4_1) && (TARGET_AVX2)) 770 #define HAVE_sse4_1_movntdqa (TARGET_SSE4_1) 771 #define HAVE_avx2_mpsadbw ((TARGET_SSE4_1) && (TARGET_AVX2)) 772 #define HAVE_sse4_1_mpsadbw (TARGET_SSE4_1) 773 #define HAVE_avx2_packusdw (TARGET_AVX2) 774 #define HAVE_sse4_1_packusdw (TARGET_SSE4_1) 775 #define HAVE_avx2_pblendvb ((TARGET_SSE4_1) && (TARGET_AVX2)) 776 #define HAVE_sse4_1_pblendvb (TARGET_SSE4_1) 777 #define HAVE_sse4_1_pblendw (TARGET_SSE4_1) 778 #define HAVE_avx2_pblenddv8si (TARGET_AVX2) 779 #define HAVE_avx2_pblenddv4si (TARGET_AVX2) 780 #define HAVE_sse4_1_phminposuw (TARGET_SSE4_1) 781 #define HAVE_avx2_sign_extendv16qiv16hi2 (TARGET_AVX2) 782 #define HAVE_avx2_zero_extendv16qiv16hi2 (TARGET_AVX2) 783 #define HAVE_sse4_1_sign_extendv8qiv8hi2 (TARGET_SSE4_1) 784 #define HAVE_sse4_1_zero_extendv8qiv8hi2 (TARGET_SSE4_1) 785 #define HAVE_avx2_sign_extendv8qiv8si2 (TARGET_AVX2) 786 #define HAVE_avx2_zero_extendv8qiv8si2 (TARGET_AVX2) 787 #define HAVE_sse4_1_sign_extendv4qiv4si2 (TARGET_SSE4_1) 788 #define HAVE_sse4_1_zero_extendv4qiv4si2 (TARGET_SSE4_1) 789 #define HAVE_avx2_sign_extendv8hiv8si2 (TARGET_AVX2) 790 #define HAVE_avx2_zero_extendv8hiv8si2 (TARGET_AVX2) 791 #define HAVE_sse4_1_sign_extendv4hiv4si2 (TARGET_SSE4_1) 792 #define HAVE_sse4_1_zero_extendv4hiv4si2 (TARGET_SSE4_1) 793 #define HAVE_avx2_sign_extendv4qiv4di2 (TARGET_AVX2) 794 #define HAVE_avx2_zero_extendv4qiv4di2 (TARGET_AVX2) 795 #define HAVE_sse4_1_sign_extendv2qiv2di2 (TARGET_SSE4_1) 796 #define HAVE_sse4_1_zero_extendv2qiv2di2 (TARGET_SSE4_1) 797 #define HAVE_avx2_sign_extendv4hiv4di2 (TARGET_AVX2) 798 #define HAVE_avx2_zero_extendv4hiv4di2 (TARGET_AVX2) 799 #define HAVE_sse4_1_sign_extendv2hiv2di2 (TARGET_SSE4_1) 800 #define HAVE_sse4_1_zero_extendv2hiv2di2 (TARGET_SSE4_1) 801 #define HAVE_avx2_sign_extendv4siv4di2 (TARGET_AVX2) 802 #define HAVE_avx2_zero_extendv4siv4di2 (TARGET_AVX2) 803 #define HAVE_sse4_1_sign_extendv2siv2di2 (TARGET_SSE4_1) 804 #define HAVE_sse4_1_zero_extendv2siv2di2 (TARGET_SSE4_1) 805 #define HAVE_avx_vtestps256 (TARGET_AVX) 806 #define HAVE_avx_vtestps (TARGET_AVX) 807 #define HAVE_avx_vtestpd256 (TARGET_AVX) 808 #define HAVE_avx_vtestpd ((TARGET_AVX) && (TARGET_SSE2)) 809 #define HAVE_avx_ptest256 (TARGET_AVX) 810 #define HAVE_sse4_1_ptest (TARGET_SSE4_1) 811 #define HAVE_avx_roundps256 ((TARGET_ROUND) && (TARGET_AVX)) 812 #define HAVE_sse4_1_roundps (TARGET_ROUND) 813 #define HAVE_avx_roundpd256 ((TARGET_ROUND) && (TARGET_AVX)) 814 #define HAVE_sse4_1_roundpd ((TARGET_ROUND) && (TARGET_SSE2)) 815 #define HAVE_sse4_1_roundss (TARGET_ROUND) 816 #define HAVE_sse4_1_roundsd ((TARGET_ROUND) && (TARGET_SSE2)) 817 #define HAVE_sse4_2_pcmpestr (TARGET_SSE4_2 \ 818 && can_create_pseudo_p ()) 819 #define HAVE_sse4_2_pcmpestri (TARGET_SSE4_2) 820 #define HAVE_sse4_2_pcmpestrm (TARGET_SSE4_2) 821 #define HAVE_sse4_2_pcmpestr_cconly (TARGET_SSE4_2) 822 #define HAVE_sse4_2_pcmpistr (TARGET_SSE4_2 \ 823 && can_create_pseudo_p ()) 824 #define HAVE_sse4_2_pcmpistri (TARGET_SSE4_2) 825 #define HAVE_sse4_2_pcmpistrm (TARGET_SSE4_2) 826 #define HAVE_sse4_2_pcmpistr_cconly (TARGET_SSE4_2) 827 #define HAVE_xop_pmacsww (TARGET_XOP) 828 #define HAVE_xop_pmacssww (TARGET_XOP) 829 #define HAVE_xop_pmacsdd (TARGET_XOP) 830 #define HAVE_xop_pmacssdd (TARGET_XOP) 831 #define HAVE_xop_pmacsdql (TARGET_XOP) 832 #define HAVE_xop_pmacssdql (TARGET_XOP) 833 #define HAVE_xop_pmacsdqh (TARGET_XOP) 834 #define HAVE_xop_pmacssdqh (TARGET_XOP) 835 #define HAVE_xop_pmacswd (TARGET_XOP) 836 #define HAVE_xop_pmacsswd (TARGET_XOP) 837 #define HAVE_xop_pmadcswd (TARGET_XOP) 838 #define HAVE_xop_pmadcsswd (TARGET_XOP) 839 #define HAVE_xop_pcmov_v32qi256 ((TARGET_XOP) && (TARGET_AVX)) 840 #define HAVE_xop_pcmov_v16qi (TARGET_XOP) 841 #define HAVE_xop_pcmov_v16hi256 ((TARGET_XOP) && (TARGET_AVX)) 842 #define HAVE_xop_pcmov_v8hi (TARGET_XOP) 843 #define HAVE_xop_pcmov_v8si256 ((TARGET_XOP) && (TARGET_AVX)) 844 #define HAVE_xop_pcmov_v4si (TARGET_XOP) 845 #define HAVE_xop_pcmov_v4di256 ((TARGET_XOP) && (TARGET_AVX)) 846 #define HAVE_xop_pcmov_v2di (TARGET_XOP) 847 #define HAVE_xop_pcmov_v8sf256 ((TARGET_XOP) && (TARGET_AVX)) 848 #define HAVE_xop_pcmov_v4sf (TARGET_XOP) 849 #define HAVE_xop_pcmov_v4df256 ((TARGET_XOP) && (TARGET_AVX)) 850 #define HAVE_xop_pcmov_v2df ((TARGET_XOP) && (TARGET_SSE2)) 851 #define HAVE_xop_phaddbw (TARGET_XOP) 852 #define HAVE_xop_phaddubw (TARGET_XOP) 853 #define HAVE_xop_phaddbd (TARGET_XOP) 854 #define HAVE_xop_phaddubd (TARGET_XOP) 855 #define HAVE_xop_phaddbq (TARGET_XOP) 856 #define HAVE_xop_phaddubq (TARGET_XOP) 857 #define HAVE_xop_phaddwd (TARGET_XOP) 858 #define HAVE_xop_phadduwd (TARGET_XOP) 859 #define HAVE_xop_phaddwq (TARGET_XOP) 860 #define HAVE_xop_phadduwq (TARGET_XOP) 861 #define HAVE_xop_phadddq (TARGET_XOP) 862 #define HAVE_xop_phaddudq (TARGET_XOP) 863 #define HAVE_xop_phsubbw (TARGET_XOP) 864 #define HAVE_xop_phsubwd (TARGET_XOP) 865 #define HAVE_xop_phsubdq (TARGET_XOP) 866 #define HAVE_xop_pperm (TARGET_XOP && !(MEM_P (operands[2]) && MEM_P (operands[3]))) 867 #define HAVE_xop_pperm_pack_v2di_v4si (TARGET_XOP && !(MEM_P (operands[2]) && MEM_P (operands[3]))) 868 #define HAVE_xop_pperm_pack_v4si_v8hi (TARGET_XOP && !(MEM_P (operands[2]) && MEM_P (operands[3]))) 869 #define HAVE_xop_pperm_pack_v8hi_v16qi (TARGET_XOP && !(MEM_P (operands[2]) && MEM_P (operands[3]))) 870 #define HAVE_xop_rotlv16qi3 (TARGET_XOP) 871 #define HAVE_xop_rotlv8hi3 (TARGET_XOP) 872 #define HAVE_xop_rotlv4si3 (TARGET_XOP) 873 #define HAVE_xop_rotlv2di3 (TARGET_XOP) 874 #define HAVE_xop_rotrv16qi3 (TARGET_XOP) 875 #define HAVE_xop_rotrv8hi3 (TARGET_XOP) 876 #define HAVE_xop_rotrv4si3 (TARGET_XOP) 877 #define HAVE_xop_rotrv2di3 (TARGET_XOP) 878 #define HAVE_xop_vrotlv16qi3 (TARGET_XOP && !(MEM_P (operands[1]) && MEM_P (operands[2]))) 879 #define HAVE_xop_vrotlv8hi3 (TARGET_XOP && !(MEM_P (operands[1]) && MEM_P (operands[2]))) 880 #define HAVE_xop_vrotlv4si3 (TARGET_XOP && !(MEM_P (operands[1]) && MEM_P (operands[2]))) 881 #define HAVE_xop_vrotlv2di3 (TARGET_XOP && !(MEM_P (operands[1]) && MEM_P (operands[2]))) 882 #define HAVE_xop_shav16qi3 (TARGET_XOP && !(MEM_P (operands[1]) && MEM_P (operands[2]))) 883 #define HAVE_xop_shav8hi3 (TARGET_XOP && !(MEM_P (operands[1]) && MEM_P (operands[2]))) 884 #define HAVE_xop_shav4si3 (TARGET_XOP && !(MEM_P (operands[1]) && MEM_P (operands[2]))) 885 #define HAVE_xop_shav2di3 (TARGET_XOP && !(MEM_P (operands[1]) && MEM_P (operands[2]))) 886 #define HAVE_xop_shlv16qi3 (TARGET_XOP && !(MEM_P (operands[1]) && MEM_P (operands[2]))) 887 #define HAVE_xop_shlv8hi3 (TARGET_XOP && !(MEM_P (operands[1]) && MEM_P (operands[2]))) 888 #define HAVE_xop_shlv4si3 (TARGET_XOP && !(MEM_P (operands[1]) && MEM_P (operands[2]))) 889 #define HAVE_xop_shlv2di3 (TARGET_XOP && !(MEM_P (operands[1]) && MEM_P (operands[2]))) 890 #define HAVE_xop_frczsf2 (TARGET_XOP) 891 #define HAVE_xop_frczdf2 (TARGET_XOP) 892 #define HAVE_xop_frczv4sf2 (TARGET_XOP) 893 #define HAVE_xop_frczv2df2 (TARGET_XOP) 894 #define HAVE_xop_frczv8sf2 (TARGET_XOP) 895 #define HAVE_xop_frczv4df2 (TARGET_XOP) 896 #define HAVE_xop_maskcmpv16qi3 (TARGET_XOP) 897 #define HAVE_xop_maskcmpv8hi3 (TARGET_XOP) 898 #define HAVE_xop_maskcmpv4si3 (TARGET_XOP) 899 #define HAVE_xop_maskcmpv2di3 (TARGET_XOP) 900 #define HAVE_xop_maskcmp_unsv16qi3 (TARGET_XOP) 901 #define HAVE_xop_maskcmp_unsv8hi3 (TARGET_XOP) 902 #define HAVE_xop_maskcmp_unsv4si3 (TARGET_XOP) 903 #define HAVE_xop_maskcmp_unsv2di3 (TARGET_XOP) 904 #define HAVE_xop_maskcmp_uns2v16qi3 (TARGET_XOP) 905 #define HAVE_xop_maskcmp_uns2v8hi3 (TARGET_XOP) 906 #define HAVE_xop_maskcmp_uns2v4si3 (TARGET_XOP) 907 #define HAVE_xop_maskcmp_uns2v2di3 (TARGET_XOP) 908 #define HAVE_xop_pcom_tfv16qi3 (TARGET_XOP) 909 #define HAVE_xop_pcom_tfv8hi3 (TARGET_XOP) 910 #define HAVE_xop_pcom_tfv4si3 (TARGET_XOP) 911 #define HAVE_xop_pcom_tfv2di3 (TARGET_XOP) 912 #define HAVE_xop_vpermil2v8sf3 ((TARGET_XOP) && (TARGET_AVX)) 913 #define HAVE_xop_vpermil2v4sf3 (TARGET_XOP) 914 #define HAVE_xop_vpermil2v4df3 ((TARGET_XOP) && (TARGET_AVX)) 915 #define HAVE_xop_vpermil2v2df3 ((TARGET_XOP) && (TARGET_SSE2)) 916 #define HAVE_aesenc (TARGET_AES) 917 #define HAVE_aesenclast (TARGET_AES) 918 #define HAVE_aesdec (TARGET_AES) 919 #define HAVE_aesdeclast (TARGET_AES) 920 #define HAVE_aesimc (TARGET_AES) 921 #define HAVE_aeskeygenassist (TARGET_AES) 922 #define HAVE_pclmulqdq (TARGET_PCLMUL) 923 #define HAVE_avx_vzeroupper (TARGET_AVX) 924 #define HAVE_avx2_pbroadcastv32qi ((TARGET_AVX2) && (TARGET_AVX)) 925 #define HAVE_avx2_pbroadcastv16qi (TARGET_AVX2) 926 #define HAVE_avx2_pbroadcastv16hi ((TARGET_AVX2) && (TARGET_AVX)) 927 #define HAVE_avx2_pbroadcastv8hi (TARGET_AVX2) 928 #define HAVE_avx2_pbroadcastv8si ((TARGET_AVX2) && (TARGET_AVX)) 929 #define HAVE_avx2_pbroadcastv4si (TARGET_AVX2) 930 #define HAVE_avx2_pbroadcastv4di ((TARGET_AVX2) && (TARGET_AVX)) 931 #define HAVE_avx2_pbroadcastv2di (TARGET_AVX2) 932 #define HAVE_avx2_pbroadcastv32qi_1 (TARGET_AVX2) 933 #define HAVE_avx2_pbroadcastv16hi_1 (TARGET_AVX2) 934 #define HAVE_avx2_pbroadcastv8si_1 (TARGET_AVX2) 935 #define HAVE_avx2_pbroadcastv4di_1 (TARGET_AVX2) 936 #define HAVE_avx2_permvarv8si (TARGET_AVX2) 937 #define HAVE_avx2_permvarv8sf (TARGET_AVX2) 938 #define HAVE_avx2_permv4di_1 (TARGET_AVX2) 939 #define HAVE_avx2_permv4df_1 (TARGET_AVX2) 940 #define HAVE_avx2_permv2ti (TARGET_AVX2) 941 #define HAVE_avx2_vec_dupv4df (TARGET_AVX2) 942 #define HAVE_vec_dupv8si (TARGET_AVX) 943 #define HAVE_vec_dupv8sf (TARGET_AVX) 944 #define HAVE_vec_dupv4di (TARGET_AVX) 945 #define HAVE_vec_dupv4df (TARGET_AVX) 946 #define HAVE_avx2_vbroadcasti128_v32qi (TARGET_AVX2) 947 #define HAVE_avx2_vbroadcasti128_v16hi (TARGET_AVX2) 948 #define HAVE_avx2_vbroadcasti128_v8si (TARGET_AVX2) 949 #define HAVE_avx2_vbroadcasti128_v4di (TARGET_AVX2) 950 #define HAVE_avx_vbroadcastf128_v32qi (TARGET_AVX) 951 #define HAVE_avx_vbroadcastf128_v16hi (TARGET_AVX) 952 #define HAVE_avx_vbroadcastf128_v8si (TARGET_AVX) 953 #define HAVE_avx_vbroadcastf128_v4di (TARGET_AVX) 954 #define HAVE_avx_vbroadcastf128_v8sf (TARGET_AVX) 955 #define HAVE_avx_vbroadcastf128_v4df (TARGET_AVX) 956 #define HAVE_avx_vpermilvarv8sf3 (TARGET_AVX) 957 #define HAVE_avx_vpermilvarv4sf3 (TARGET_AVX) 958 #define HAVE_avx_vpermilvarv4df3 (TARGET_AVX) 959 #define HAVE_avx_vpermilvarv2df3 ((TARGET_AVX) && (TARGET_SSE2)) 960 #define HAVE_avx2_vec_set_lo_v4di (TARGET_AVX2) 961 #define HAVE_avx2_vec_set_hi_v4di (TARGET_AVX2) 962 #define HAVE_vec_set_lo_v4di (TARGET_AVX) 963 #define HAVE_vec_set_lo_v4df (TARGET_AVX) 964 #define HAVE_vec_set_hi_v4di (TARGET_AVX) 965 #define HAVE_vec_set_hi_v4df (TARGET_AVX) 966 #define HAVE_vec_set_lo_v8si (TARGET_AVX) 967 #define HAVE_vec_set_lo_v8sf (TARGET_AVX) 968 #define HAVE_vec_set_hi_v8si (TARGET_AVX) 969 #define HAVE_vec_set_hi_v8sf (TARGET_AVX) 970 #define HAVE_vec_set_lo_v16hi (TARGET_AVX) 971 #define HAVE_vec_set_hi_v16hi (TARGET_AVX) 972 #define HAVE_vec_set_lo_v32qi (TARGET_AVX) 973 #define HAVE_vec_set_hi_v32qi (TARGET_AVX) 974 #define HAVE_avx_maskloadps (TARGET_AVX) 975 #define HAVE_avx_maskloadpd (TARGET_AVX) 976 #define HAVE_avx_maskloadps256 (TARGET_AVX) 977 #define HAVE_avx_maskloadpd256 (TARGET_AVX) 978 #define HAVE_avx2_maskloadd ((TARGET_AVX) && (TARGET_AVX2)) 979 #define HAVE_avx2_maskloadq ((TARGET_AVX) && (TARGET_AVX2)) 980 #define HAVE_avx2_maskloadd256 ((TARGET_AVX) && (TARGET_AVX2)) 981 #define HAVE_avx2_maskloadq256 ((TARGET_AVX) && (TARGET_AVX2)) 982 #define HAVE_avx_maskstoreps (TARGET_AVX) 983 #define HAVE_avx_maskstorepd (TARGET_AVX) 984 #define HAVE_avx_maskstoreps256 (TARGET_AVX) 985 #define HAVE_avx_maskstorepd256 (TARGET_AVX) 986 #define HAVE_avx2_maskstored ((TARGET_AVX) && (TARGET_AVX2)) 987 #define HAVE_avx2_maskstoreq ((TARGET_AVX) && (TARGET_AVX2)) 988 #define HAVE_avx2_maskstored256 ((TARGET_AVX) && (TARGET_AVX2)) 989 #define HAVE_avx2_maskstoreq256 ((TARGET_AVX) && (TARGET_AVX2)) 990 #define HAVE_avx_si256_si (TARGET_AVX) 991 #define HAVE_avx_ps256_ps (TARGET_AVX) 992 #define HAVE_avx_pd256_pd (TARGET_AVX) 993 #define HAVE_avx2_ashrvv8si (TARGET_AVX2) 994 #define HAVE_avx2_ashrvv4si (TARGET_AVX2) 995 #define HAVE_avx2_ashlvv8si (TARGET_AVX2) 996 #define HAVE_avx2_lshrvv8si (TARGET_AVX2) 997 #define HAVE_avx2_ashlvv4si (TARGET_AVX2) 998 #define HAVE_avx2_lshrvv4si (TARGET_AVX2) 999 #define HAVE_avx2_ashlvv4di (TARGET_AVX2) 1000 #define HAVE_avx2_lshrvv4di (TARGET_AVX2) 1001 #define HAVE_avx2_ashlvv2di (TARGET_AVX2) 1002 #define HAVE_avx2_lshrvv2di (TARGET_AVX2) 1003 #define HAVE_avx_vec_concatv32qi (TARGET_AVX) 1004 #define HAVE_avx_vec_concatv16hi (TARGET_AVX) 1005 #define HAVE_avx_vec_concatv8si (TARGET_AVX) 1006 #define HAVE_avx_vec_concatv4di (TARGET_AVX) 1007 #define HAVE_avx_vec_concatv8sf (TARGET_AVX) 1008 #define HAVE_avx_vec_concatv4df (TARGET_AVX) 1009 #define HAVE_vcvtph2ps (TARGET_F16C) 1010 #define HAVE_vcvtph2ps256 (TARGET_F16C) 1011 #define HAVE_vcvtps2ph256 (TARGET_F16C) 1012 #define HAVE_mfence_sse2 (TARGET_64BIT || TARGET_SSE2) 1013 #define HAVE_mfence_nosse (!(TARGET_64BIT || TARGET_SSE2)) 1014 #define HAVE_atomic_loaddi_fpu (!TARGET_64BIT && (TARGET_80387 || TARGET_SSE)) 1015 #define HAVE_atomic_storeqi_1 1 1016 #define HAVE_atomic_storehi_1 1 1017 #define HAVE_atomic_storesi_1 1 1018 #define HAVE_atomic_storedi_1 (TARGET_64BIT) 1019 #define HAVE_atomic_storedi_fpu (!TARGET_64BIT && (TARGET_80387 || TARGET_SSE)) 1020 #define HAVE_loaddi_via_fpu (TARGET_80387) 1021 #define HAVE_storedi_via_fpu (TARGET_80387) 1022 #define HAVE_atomic_compare_and_swapqi_1 (TARGET_CMPXCHG) 1023 #define HAVE_atomic_compare_and_swaphi_1 (TARGET_CMPXCHG) 1024 #define HAVE_atomic_compare_and_swapsi_1 (TARGET_CMPXCHG) 1025 #define HAVE_atomic_compare_and_swapdi_1 ((TARGET_CMPXCHG) && (TARGET_64BIT)) 1026 #define HAVE_atomic_compare_and_swapdi_doubleword ((TARGET_CMPXCHG8B) && (!TARGET_64BIT)) 1027 #define HAVE_atomic_compare_and_swapti_doubleword ((TARGET_CMPXCHG16B) && (TARGET_64BIT)) 1028 #define HAVE_atomic_fetch_addqi (TARGET_XADD) 1029 #define HAVE_atomic_fetch_addhi (TARGET_XADD) 1030 #define HAVE_atomic_fetch_addsi (TARGET_XADD) 1031 #define HAVE_atomic_fetch_adddi ((TARGET_XADD) && (TARGET_64BIT)) 1032 #define HAVE_atomic_exchangeqi 1 1033 #define HAVE_atomic_exchangehi 1 1034 #define HAVE_atomic_exchangesi 1 1035 #define HAVE_atomic_exchangedi (TARGET_64BIT) 1036 #define HAVE_atomic_addqi 1 1037 #define HAVE_atomic_addhi 1 1038 #define HAVE_atomic_addsi 1 1039 #define HAVE_atomic_adddi (TARGET_64BIT) 1040 #define HAVE_atomic_subqi 1 1041 #define HAVE_atomic_subhi 1 1042 #define HAVE_atomic_subsi 1 1043 #define HAVE_atomic_subdi (TARGET_64BIT) 1044 #define HAVE_atomic_andqi 1 1045 #define HAVE_atomic_orqi 1 1046 #define HAVE_atomic_xorqi 1 1047 #define HAVE_atomic_andhi 1 1048 #define HAVE_atomic_orhi 1 1049 #define HAVE_atomic_xorhi 1 1050 #define HAVE_atomic_andsi 1 1051 #define HAVE_atomic_orsi 1 1052 #define HAVE_atomic_xorsi 1 1053 #define HAVE_atomic_anddi (TARGET_64BIT) 1054 #define HAVE_atomic_ordi (TARGET_64BIT) 1055 #define HAVE_atomic_xordi (TARGET_64BIT) 1056 #define HAVE_cbranchqi4 (TARGET_QIMODE_MATH) 1057 #define HAVE_cbranchhi4 (TARGET_HIMODE_MATH) 1058 #define HAVE_cbranchsi4 1 1059 #define HAVE_cbranchdi4 1 1060 #define HAVE_cbranchti4 (TARGET_64BIT) 1061 #define HAVE_cstoreqi4 (TARGET_QIMODE_MATH) 1062 #define HAVE_cstorehi4 (TARGET_HIMODE_MATH) 1063 #define HAVE_cstoresi4 1 1064 #define HAVE_cstoredi4 (TARGET_64BIT) 1065 #define HAVE_cmpsi_1 1 1066 #define HAVE_cmpdi_1 (TARGET_64BIT) 1067 #define HAVE_cmpqi_ext_3 1 1068 #define HAVE_cbranchxf4 (TARGET_80387) 1069 #define HAVE_cstorexf4 (TARGET_80387) 1070 #define HAVE_cbranchsf4 (TARGET_80387 || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH)) 1071 #define HAVE_cbranchdf4 (TARGET_80387 || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)) 1072 #define HAVE_cstoresf4 (TARGET_80387 || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH)) 1073 #define HAVE_cstoredf4 (TARGET_80387 || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)) 1074 #define HAVE_cbranchcc4 1 1075 #define HAVE_cstorecc4 1 1076 #define HAVE_movoi (TARGET_AVX) 1077 #define HAVE_movti (TARGET_64BIT || TARGET_SSE) 1078 #define HAVE_movcdi 1 1079 #define HAVE_movqi 1 1080 #define HAVE_movhi 1 1081 #define HAVE_movsi 1 1082 #define HAVE_movdi 1 1083 #define HAVE_reload_noff_store (TARGET_64BIT) 1084 #define HAVE_reload_noff_load (TARGET_64BIT) 1085 #define HAVE_movstrictqi 1 1086 #define HAVE_movstricthi 1 1087 #define HAVE_movsi_insv_1 1 1088 #define HAVE_movdi_insv_1 (TARGET_64BIT) 1089 #define HAVE_movtf (TARGET_64BIT || TARGET_SSE) 1090 #define HAVE_movsf 1 1091 #define HAVE_movdf 1 1092 #define HAVE_movxf 1 1093 #define HAVE_zero_extendsidi2 1 1094 #define HAVE_zero_extendqisi2 1 1095 #define HAVE_zero_extendhisi2 1 1096 #define HAVE_zero_extendqihi2 1 1097 #define HAVE_extendsidi2 1 1098 #define HAVE_extendsfdf2 (TARGET_80387 || (TARGET_SSE2 && TARGET_SSE_MATH)) 1099 #define HAVE_extendsfxf2 (TARGET_80387) 1100 #define HAVE_extenddfxf2 (TARGET_80387) 1101 #define HAVE_truncdfsf2 (TARGET_80387 || (TARGET_SSE2 && TARGET_SSE_MATH)) 1102 #define HAVE_truncdfsf2_with_temp 1 1103 #define HAVE_truncxfsf2 (TARGET_80387) 1104 #define HAVE_truncxfdf2 (TARGET_80387) 1105 #define HAVE_fix_truncxfdi2 (TARGET_80387) 1106 #define HAVE_fix_truncsfdi2 (TARGET_80387 || (TARGET_64BIT && SSE_FLOAT_MODE_P (SFmode))) 1107 #define HAVE_fix_truncdfdi2 (TARGET_80387 || (TARGET_64BIT && SSE_FLOAT_MODE_P (DFmode))) 1108 #define HAVE_fix_truncxfsi2 (TARGET_80387) 1109 #define HAVE_fix_truncsfsi2 (TARGET_80387 || SSE_FLOAT_MODE_P (SFmode)) 1110 #define HAVE_fix_truncdfsi2 (TARGET_80387 || SSE_FLOAT_MODE_P (DFmode)) 1111 #define HAVE_fix_truncsfhi2 (TARGET_80387 \ 1112 && !(SSE_FLOAT_MODE_P (SFmode) && (!TARGET_FISTTP || TARGET_SSE_MATH))) 1113 #define HAVE_fix_truncdfhi2 (TARGET_80387 \ 1114 && !(SSE_FLOAT_MODE_P (DFmode) && (!TARGET_FISTTP || TARGET_SSE_MATH))) 1115 #define HAVE_fix_truncxfhi2 (TARGET_80387 \ 1116 && !(SSE_FLOAT_MODE_P (XFmode) && (!TARGET_FISTTP || TARGET_SSE_MATH))) 1117 #define HAVE_fixuns_truncsfsi2 (!TARGET_64BIT && TARGET_SSE2 && TARGET_SSE_MATH) 1118 #define HAVE_fixuns_truncdfsi2 (!TARGET_64BIT && TARGET_SSE2 && TARGET_SSE_MATH) 1119 #define HAVE_fixuns_truncsfhi2 (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) 1120 #define HAVE_fixuns_truncdfhi2 (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) 1121 #define HAVE_floathisf2 (TARGET_80387 \ 1122 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 1123 || TARGET_MIX_SSE_I387)) 1124 #define HAVE_floathidf2 (TARGET_80387 \ 1125 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 1126 || TARGET_MIX_SSE_I387)) 1127 #define HAVE_floathixf2 (TARGET_80387 \ 1128 && (!(SSE_FLOAT_MODE_P (XFmode) && TARGET_SSE_MATH) \ 1129 || TARGET_MIX_SSE_I387)) 1130 #define HAVE_floatsisf2 (TARGET_80387 \ 1131 || ((SImode != DImode || TARGET_64BIT) \ 1132 && SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH)) 1133 #define HAVE_floatsidf2 (TARGET_80387 \ 1134 || ((SImode != DImode || TARGET_64BIT) \ 1135 && SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)) 1136 #define HAVE_floatsixf2 (TARGET_80387 \ 1137 || ((SImode != DImode || TARGET_64BIT) \ 1138 && SSE_FLOAT_MODE_P (XFmode) && TARGET_SSE_MATH)) 1139 #define HAVE_floatdisf2 (TARGET_80387 \ 1140 || ((DImode != DImode || TARGET_64BIT) \ 1141 && SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH)) 1142 #define HAVE_floatdidf2 (TARGET_80387 \ 1143 || ((DImode != DImode || TARGET_64BIT) \ 1144 && SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)) 1145 #define HAVE_floatdixf2 (TARGET_80387 \ 1146 || ((DImode != DImode || TARGET_64BIT) \ 1147 && SSE_FLOAT_MODE_P (XFmode) && TARGET_SSE_MATH)) 1148 #define HAVE_floatunssisf2 (!TARGET_64BIT \ 1149 && ((TARGET_80387 && X87_ENABLE_FLOAT (SFmode, DImode) \ 1150 && TARGET_SSE) \ 1151 || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH))) 1152 #define HAVE_floatunssidf2 (!TARGET_64BIT \ 1153 && ((TARGET_80387 && X87_ENABLE_FLOAT (DFmode, DImode) \ 1154 && TARGET_SSE) \ 1155 || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH))) 1156 #define HAVE_floatunssixf2 (!TARGET_64BIT \ 1157 && ((TARGET_80387 && X87_ENABLE_FLOAT (XFmode, DImode) \ 1158 && TARGET_SSE) \ 1159 || (SSE_FLOAT_MODE_P (XFmode) && TARGET_SSE_MATH))) 1160 #define HAVE_floatunsdisf2 (TARGET_64BIT && TARGET_SSE_MATH) 1161 #define HAVE_floatunsdidf2 ((TARGET_64BIT || TARGET_KEEPS_VECTOR_ALIGNED_STACK) \ 1162 && TARGET_SSE2 && TARGET_SSE_MATH) 1163 #define HAVE_addqi3 (TARGET_QIMODE_MATH) 1164 #define HAVE_addhi3 (TARGET_HIMODE_MATH) 1165 #define HAVE_addsi3 1 1166 #define HAVE_adddi3 1 1167 #define HAVE_addti3 (TARGET_64BIT) 1168 #define HAVE_subqi3 (TARGET_QIMODE_MATH) 1169 #define HAVE_subhi3 (TARGET_HIMODE_MATH) 1170 #define HAVE_subsi3 1 1171 #define HAVE_subdi3 1 1172 #define HAVE_subti3 (TARGET_64BIT) 1173 #define HAVE_addqi3_carry (ix86_binary_operator_ok (PLUS, QImode, operands)) 1174 #define HAVE_subqi3_carry (ix86_binary_operator_ok (MINUS, QImode, operands)) 1175 #define HAVE_addhi3_carry (ix86_binary_operator_ok (PLUS, HImode, operands)) 1176 #define HAVE_subhi3_carry (ix86_binary_operator_ok (MINUS, HImode, operands)) 1177 #define HAVE_addsi3_carry (ix86_binary_operator_ok (PLUS, SImode, operands)) 1178 #define HAVE_subsi3_carry (ix86_binary_operator_ok (MINUS, SImode, operands)) 1179 #define HAVE_adddi3_carry ((ix86_binary_operator_ok (PLUS, DImode, operands)) && (TARGET_64BIT)) 1180 #define HAVE_subdi3_carry ((ix86_binary_operator_ok (MINUS, DImode, operands)) && (TARGET_64BIT)) 1181 #define HAVE_addxf3 (TARGET_80387) 1182 #define HAVE_subxf3 (TARGET_80387) 1183 #define HAVE_addsf3 ((TARGET_80387 && X87_ENABLE_ARITH (SFmode)) \ 1184 || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH)) 1185 #define HAVE_subsf3 ((TARGET_80387 && X87_ENABLE_ARITH (SFmode)) \ 1186 || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH)) 1187 #define HAVE_adddf3 ((TARGET_80387 && X87_ENABLE_ARITH (DFmode)) \ 1188 || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)) 1189 #define HAVE_subdf3 ((TARGET_80387 && X87_ENABLE_ARITH (DFmode)) \ 1190 || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)) 1191 #define HAVE_mulhi3 (TARGET_HIMODE_MATH) 1192 #define HAVE_mulsi3 1 1193 #define HAVE_muldi3 (TARGET_64BIT) 1194 #define HAVE_mulqi3 (TARGET_QIMODE_MATH) 1195 #define HAVE_mulsidi3 (!TARGET_64BIT) 1196 #define HAVE_umulsidi3 (!TARGET_64BIT) 1197 #define HAVE_mulditi3 (TARGET_64BIT) 1198 #define HAVE_umulditi3 (TARGET_64BIT) 1199 #define HAVE_mulqihi3 (TARGET_QIMODE_MATH) 1200 #define HAVE_umulqihi3 (TARGET_QIMODE_MATH) 1201 #define HAVE_smulsi3_highpart 1 1202 #define HAVE_umulsi3_highpart 1 1203 #define HAVE_smuldi3_highpart (TARGET_64BIT) 1204 #define HAVE_umuldi3_highpart (TARGET_64BIT) 1205 #define HAVE_mulxf3 (TARGET_80387) 1206 #define HAVE_mulsf3 ((TARGET_80387 && X87_ENABLE_ARITH (SFmode)) \ 1207 || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH)) 1208 #define HAVE_muldf3 ((TARGET_80387 && X87_ENABLE_ARITH (DFmode)) \ 1209 || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)) 1210 #define HAVE_divxf3 (TARGET_80387) 1211 #define HAVE_divdf3 ((TARGET_80387 && X87_ENABLE_ARITH (DFmode)) \ 1212 || (TARGET_SSE2 && TARGET_SSE_MATH)) 1213 #define HAVE_divsf3 ((TARGET_80387 && X87_ENABLE_ARITH (SFmode)) \ 1214 || TARGET_SSE_MATH) 1215 #define HAVE_divmodhi4 (TARGET_HIMODE_MATH) 1216 #define HAVE_divmodsi4 1 1217 #define HAVE_divmoddi4 (TARGET_64BIT) 1218 #define HAVE_divmodqi4 (TARGET_QIMODE_MATH) 1219 #define HAVE_udivmodhi4 (TARGET_HIMODE_MATH) 1220 #define HAVE_udivmodsi4 1 1221 #define HAVE_udivmoddi4 (TARGET_64BIT) 1222 #define HAVE_udivmodqi4 (TARGET_QIMODE_MATH) 1223 #define HAVE_testsi_ccno_1 1 1224 #define HAVE_testqi_ccz_1 1 1225 #define HAVE_testdi_ccno_1 (TARGET_64BIT && !(MEM_P (operands[0]) && MEM_P (operands[1]))) 1226 #define HAVE_testqi_ext_ccno_0 1 1227 #define HAVE_andqi3 (TARGET_QIMODE_MATH) 1228 #define HAVE_andhi3 (TARGET_HIMODE_MATH) 1229 #define HAVE_andsi3 1 1230 #define HAVE_anddi3 (TARGET_64BIT) 1231 #define HAVE_iorqi3 (TARGET_QIMODE_MATH) 1232 #define HAVE_xorqi3 (TARGET_QIMODE_MATH) 1233 #define HAVE_iorhi3 (TARGET_HIMODE_MATH) 1234 #define HAVE_xorhi3 (TARGET_HIMODE_MATH) 1235 #define HAVE_iorsi3 1 1236 #define HAVE_xorsi3 1 1237 #define HAVE_iordi3 (TARGET_64BIT) 1238 #define HAVE_xordi3 (TARGET_64BIT) 1239 #define HAVE_xorqi_cc_ext_1 1 1240 #define HAVE_negqi2 (TARGET_QIMODE_MATH) 1241 #define HAVE_neghi2 (TARGET_HIMODE_MATH) 1242 #define HAVE_negsi2 1 1243 #define HAVE_negdi2 1 1244 #define HAVE_negti2 (TARGET_64BIT) 1245 #define HAVE_abssf2 (TARGET_80387 || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH)) 1246 #define HAVE_negsf2 (TARGET_80387 || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH)) 1247 #define HAVE_absdf2 (TARGET_80387 || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)) 1248 #define HAVE_negdf2 (TARGET_80387 || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)) 1249 #define HAVE_absxf2 (TARGET_80387 || (SSE_FLOAT_MODE_P (XFmode) && TARGET_SSE_MATH)) 1250 #define HAVE_negxf2 (TARGET_80387 || (SSE_FLOAT_MODE_P (XFmode) && TARGET_SSE_MATH)) 1251 #define HAVE_abstf2 (TARGET_SSE) 1252 #define HAVE_negtf2 (TARGET_SSE) 1253 #define HAVE_copysignsf3 ((SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 1254 || (TARGET_SSE && (SFmode == TFmode))) 1255 #define HAVE_copysigndf3 ((SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 1256 || (TARGET_SSE && (DFmode == TFmode))) 1257 #define HAVE_copysigntf3 ((SSE_FLOAT_MODE_P (TFmode) && TARGET_SSE_MATH) \ 1258 || (TARGET_SSE && (TFmode == TFmode))) 1259 #define HAVE_one_cmplqi2 (TARGET_QIMODE_MATH) 1260 #define HAVE_one_cmplhi2 (TARGET_HIMODE_MATH) 1261 #define HAVE_one_cmplsi2 1 1262 #define HAVE_one_cmpldi2 (TARGET_64BIT) 1263 #define HAVE_ashlqi3 (TARGET_QIMODE_MATH) 1264 #define HAVE_ashlhi3 (TARGET_HIMODE_MATH) 1265 #define HAVE_ashlsi3 1 1266 #define HAVE_ashldi3 1 1267 #define HAVE_ashlti3 (TARGET_64BIT) 1268 #define HAVE_x86_shiftsi_adj_1 (TARGET_CMOVE) 1269 #define HAVE_x86_shiftdi_adj_1 ((TARGET_CMOVE) && (TARGET_64BIT)) 1270 #define HAVE_x86_shiftsi_adj_2 1 1271 #define HAVE_x86_shiftdi_adj_2 (TARGET_64BIT) 1272 #define HAVE_lshrqi3 (TARGET_QIMODE_MATH) 1273 #define HAVE_ashrqi3 (TARGET_QIMODE_MATH) 1274 #define HAVE_lshrhi3 (TARGET_HIMODE_MATH) 1275 #define HAVE_ashrhi3 (TARGET_HIMODE_MATH) 1276 #define HAVE_lshrsi3 1 1277 #define HAVE_ashrsi3 1 1278 #define HAVE_lshrdi3 1 1279 #define HAVE_ashrdi3 1 1280 #define HAVE_lshrti3 (TARGET_64BIT) 1281 #define HAVE_ashrti3 (TARGET_64BIT) 1282 #define HAVE_x86_shiftsi_adj_3 1 1283 #define HAVE_x86_shiftdi_adj_3 (TARGET_64BIT) 1284 #define HAVE_rotlti3 (TARGET_64BIT) 1285 #define HAVE_rotrti3 (TARGET_64BIT) 1286 #define HAVE_rotldi3 1 1287 #define HAVE_rotrdi3 1 1288 #define HAVE_rotlqi3 (TARGET_QIMODE_MATH) 1289 #define HAVE_rotrqi3 (TARGET_QIMODE_MATH) 1290 #define HAVE_rotlhi3 (TARGET_HIMODE_MATH) 1291 #define HAVE_rotrhi3 (TARGET_HIMODE_MATH) 1292 #define HAVE_rotlsi3 1 1293 #define HAVE_rotrsi3 1 1294 #define HAVE_extv 1 1295 #define HAVE_extzv 1 1296 #define HAVE_insv 1 1297 #define HAVE_indirect_jump 1 1298 #define HAVE_tablejump 1 1299 #define HAVE_call 1 1300 #define HAVE_sibcall 1 1301 #define HAVE_call_pop (!TARGET_64BIT) 1302 #define HAVE_call_value 1 1303 #define HAVE_sibcall_value 1 1304 #define HAVE_call_value_pop (!TARGET_64BIT) 1305 #define HAVE_untyped_call 1 1306 #define HAVE_memory_blockage 1 1307 #define HAVE_return (ix86_can_use_return_insn_p ()) 1308 #define HAVE_simple_return (!TARGET_SEH) 1309 #define HAVE_prologue 1 1310 #define HAVE_epilogue 1 1311 #define HAVE_sibcall_epilogue 1 1312 #define HAVE_eh_return 1 1313 #define HAVE_split_stack_prologue 1 1314 #define HAVE_split_stack_space_check 1 1315 #define HAVE_ffssi2 1 1316 #define HAVE_ffsdi2 (TARGET_64BIT) 1317 #define HAVE_clzhi2 1 1318 #define HAVE_clzsi2 1 1319 #define HAVE_clzdi2 (TARGET_64BIT) 1320 #define HAVE_bswapdi2 (TARGET_64BIT) 1321 #define HAVE_bswapsi2 1 1322 #define HAVE_paritydi2 (! TARGET_POPCNT) 1323 #define HAVE_paritysi2 (! TARGET_POPCNT) 1324 #define HAVE_tls_global_dynamic_32 1 1325 #define HAVE_tls_global_dynamic_64_si ((TARGET_64BIT) && (Pmode == SImode)) 1326 #define HAVE_tls_global_dynamic_64_di ((TARGET_64BIT) && (Pmode == DImode)) 1327 #define HAVE_tls_local_dynamic_base_32 1 1328 #define HAVE_tls_local_dynamic_base_64_si ((TARGET_64BIT) && (Pmode == SImode)) 1329 #define HAVE_tls_local_dynamic_base_64_di ((TARGET_64BIT) && (Pmode == DImode)) 1330 #define HAVE_tls_dynamic_gnu2_32 (!TARGET_64BIT && TARGET_GNU2_TLS) 1331 #define HAVE_tls_dynamic_gnu2_64 (TARGET_64BIT && TARGET_GNU2_TLS) 1332 #define HAVE_rsqrtsf2 (TARGET_SSE_MATH) 1333 #define HAVE_sqrtsf2 ((TARGET_USE_FANCY_MATH_387 && X87_ENABLE_ARITH (SFmode)) \ 1334 || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH)) 1335 #define HAVE_sqrtdf2 ((TARGET_USE_FANCY_MATH_387 && X87_ENABLE_ARITH (DFmode)) \ 1336 || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)) 1337 #define HAVE_fmodxf3 (TARGET_USE_FANCY_MATH_387) 1338 #define HAVE_fmodsf3 (TARGET_USE_FANCY_MATH_387) 1339 #define HAVE_fmoddf3 (TARGET_USE_FANCY_MATH_387) 1340 #define HAVE_remainderxf3 (TARGET_USE_FANCY_MATH_387) 1341 #define HAVE_remaindersf3 (TARGET_USE_FANCY_MATH_387) 1342 #define HAVE_remainderdf3 (TARGET_USE_FANCY_MATH_387) 1343 #define HAVE_sincossf3 (TARGET_USE_FANCY_MATH_387 \ 1344 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 1345 || TARGET_MIX_SSE_I387) \ 1346 && flag_unsafe_math_optimizations) 1347 #define HAVE_sincosdf3 (TARGET_USE_FANCY_MATH_387 \ 1348 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 1349 || TARGET_MIX_SSE_I387) \ 1350 && flag_unsafe_math_optimizations) 1351 #define HAVE_tanxf2 (TARGET_USE_FANCY_MATH_387 \ 1352 && flag_unsafe_math_optimizations) 1353 #define HAVE_tansf2 (TARGET_USE_FANCY_MATH_387 \ 1354 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 1355 || TARGET_MIX_SSE_I387) \ 1356 && flag_unsafe_math_optimizations) 1357 #define HAVE_tandf2 (TARGET_USE_FANCY_MATH_387 \ 1358 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 1359 || TARGET_MIX_SSE_I387) \ 1360 && flag_unsafe_math_optimizations) 1361 #define HAVE_atan2xf3 (TARGET_USE_FANCY_MATH_387 \ 1362 && flag_unsafe_math_optimizations) 1363 #define HAVE_atan2sf3 (TARGET_USE_FANCY_MATH_387 \ 1364 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 1365 || TARGET_MIX_SSE_I387) \ 1366 && flag_unsafe_math_optimizations) 1367 #define HAVE_atan2df3 (TARGET_USE_FANCY_MATH_387 \ 1368 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 1369 || TARGET_MIX_SSE_I387) \ 1370 && flag_unsafe_math_optimizations) 1371 #define HAVE_atanxf2 (TARGET_USE_FANCY_MATH_387 \ 1372 && flag_unsafe_math_optimizations) 1373 #define HAVE_atansf2 (TARGET_USE_FANCY_MATH_387 \ 1374 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 1375 || TARGET_MIX_SSE_I387) \ 1376 && flag_unsafe_math_optimizations) 1377 #define HAVE_atandf2 (TARGET_USE_FANCY_MATH_387 \ 1378 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 1379 || TARGET_MIX_SSE_I387) \ 1380 && flag_unsafe_math_optimizations) 1381 #define HAVE_asinxf2 (TARGET_USE_FANCY_MATH_387 \ 1382 && flag_unsafe_math_optimizations) 1383 #define HAVE_asinsf2 (TARGET_USE_FANCY_MATH_387 \ 1384 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 1385 || TARGET_MIX_SSE_I387) \ 1386 && flag_unsafe_math_optimizations) 1387 #define HAVE_asindf2 (TARGET_USE_FANCY_MATH_387 \ 1388 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 1389 || TARGET_MIX_SSE_I387) \ 1390 && flag_unsafe_math_optimizations) 1391 #define HAVE_acosxf2 (TARGET_USE_FANCY_MATH_387 \ 1392 && flag_unsafe_math_optimizations) 1393 #define HAVE_acossf2 (TARGET_USE_FANCY_MATH_387 \ 1394 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 1395 || TARGET_MIX_SSE_I387) \ 1396 && flag_unsafe_math_optimizations) 1397 #define HAVE_acosdf2 (TARGET_USE_FANCY_MATH_387 \ 1398 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 1399 || TARGET_MIX_SSE_I387) \ 1400 && flag_unsafe_math_optimizations) 1401 #define HAVE_logxf2 (TARGET_USE_FANCY_MATH_387 \ 1402 && flag_unsafe_math_optimizations) 1403 #define HAVE_logsf2 (TARGET_USE_FANCY_MATH_387 \ 1404 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 1405 || TARGET_MIX_SSE_I387) \ 1406 && flag_unsafe_math_optimizations) 1407 #define HAVE_logdf2 (TARGET_USE_FANCY_MATH_387 \ 1408 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 1409 || TARGET_MIX_SSE_I387) \ 1410 && flag_unsafe_math_optimizations) 1411 #define HAVE_log10xf2 (TARGET_USE_FANCY_MATH_387 \ 1412 && flag_unsafe_math_optimizations) 1413 #define HAVE_log10sf2 (TARGET_USE_FANCY_MATH_387 \ 1414 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 1415 || TARGET_MIX_SSE_I387) \ 1416 && flag_unsafe_math_optimizations) 1417 #define HAVE_log10df2 (TARGET_USE_FANCY_MATH_387 \ 1418 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 1419 || TARGET_MIX_SSE_I387) \ 1420 && flag_unsafe_math_optimizations) 1421 #define HAVE_log2xf2 (TARGET_USE_FANCY_MATH_387 \ 1422 && flag_unsafe_math_optimizations) 1423 #define HAVE_log2sf2 (TARGET_USE_FANCY_MATH_387 \ 1424 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 1425 || TARGET_MIX_SSE_I387) \ 1426 && flag_unsafe_math_optimizations) 1427 #define HAVE_log2df2 (TARGET_USE_FANCY_MATH_387 \ 1428 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 1429 || TARGET_MIX_SSE_I387) \ 1430 && flag_unsafe_math_optimizations) 1431 #define HAVE_log1pxf2 (TARGET_USE_FANCY_MATH_387 \ 1432 && flag_unsafe_math_optimizations) 1433 #define HAVE_log1psf2 (TARGET_USE_FANCY_MATH_387 \ 1434 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 1435 || TARGET_MIX_SSE_I387) \ 1436 && flag_unsafe_math_optimizations) 1437 #define HAVE_log1pdf2 (TARGET_USE_FANCY_MATH_387 \ 1438 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 1439 || TARGET_MIX_SSE_I387) \ 1440 && flag_unsafe_math_optimizations) 1441 #define HAVE_logbxf2 (TARGET_USE_FANCY_MATH_387 \ 1442 && flag_unsafe_math_optimizations) 1443 #define HAVE_logbsf2 (TARGET_USE_FANCY_MATH_387 \ 1444 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 1445 || TARGET_MIX_SSE_I387) \ 1446 && flag_unsafe_math_optimizations) 1447 #define HAVE_logbdf2 (TARGET_USE_FANCY_MATH_387 \ 1448 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 1449 || TARGET_MIX_SSE_I387) \ 1450 && flag_unsafe_math_optimizations) 1451 #define HAVE_ilogbxf2 (TARGET_USE_FANCY_MATH_387 \ 1452 && flag_unsafe_math_optimizations) 1453 #define HAVE_ilogbsf2 (TARGET_USE_FANCY_MATH_387 \ 1454 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 1455 || TARGET_MIX_SSE_I387) \ 1456 && flag_unsafe_math_optimizations) 1457 #define HAVE_ilogbdf2 (TARGET_USE_FANCY_MATH_387 \ 1458 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 1459 || TARGET_MIX_SSE_I387) \ 1460 && flag_unsafe_math_optimizations) 1461 #define HAVE_expNcorexf3 (TARGET_USE_FANCY_MATH_387 \ 1462 && flag_unsafe_math_optimizations) 1463 #define HAVE_expxf2 (TARGET_USE_FANCY_MATH_387 \ 1464 && flag_unsafe_math_optimizations) 1465 #define HAVE_expsf2 (TARGET_USE_FANCY_MATH_387 \ 1466 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 1467 || TARGET_MIX_SSE_I387) \ 1468 && flag_unsafe_math_optimizations) 1469 #define HAVE_expdf2 (TARGET_USE_FANCY_MATH_387 \ 1470 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 1471 || TARGET_MIX_SSE_I387) \ 1472 && flag_unsafe_math_optimizations) 1473 #define HAVE_exp10xf2 (TARGET_USE_FANCY_MATH_387 \ 1474 && flag_unsafe_math_optimizations) 1475 #define HAVE_exp10sf2 (TARGET_USE_FANCY_MATH_387 \ 1476 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 1477 || TARGET_MIX_SSE_I387) \ 1478 && flag_unsafe_math_optimizations) 1479 #define HAVE_exp10df2 (TARGET_USE_FANCY_MATH_387 \ 1480 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 1481 || TARGET_MIX_SSE_I387) \ 1482 && flag_unsafe_math_optimizations) 1483 #define HAVE_exp2xf2 (TARGET_USE_FANCY_MATH_387 \ 1484 && flag_unsafe_math_optimizations) 1485 #define HAVE_exp2sf2 (TARGET_USE_FANCY_MATH_387 \ 1486 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 1487 || TARGET_MIX_SSE_I387) \ 1488 && flag_unsafe_math_optimizations) 1489 #define HAVE_exp2df2 (TARGET_USE_FANCY_MATH_387 \ 1490 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 1491 || TARGET_MIX_SSE_I387) \ 1492 && flag_unsafe_math_optimizations) 1493 #define HAVE_expm1xf2 (TARGET_USE_FANCY_MATH_387 \ 1494 && flag_unsafe_math_optimizations) 1495 #define HAVE_expm1sf2 (TARGET_USE_FANCY_MATH_387 \ 1496 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 1497 || TARGET_MIX_SSE_I387) \ 1498 && flag_unsafe_math_optimizations) 1499 #define HAVE_expm1df2 (TARGET_USE_FANCY_MATH_387 \ 1500 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 1501 || TARGET_MIX_SSE_I387) \ 1502 && flag_unsafe_math_optimizations) 1503 #define HAVE_ldexpxf3 (TARGET_USE_FANCY_MATH_387 \ 1504 && flag_unsafe_math_optimizations) 1505 #define HAVE_ldexpsf3 (TARGET_USE_FANCY_MATH_387 \ 1506 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 1507 || TARGET_MIX_SSE_I387) \ 1508 && flag_unsafe_math_optimizations) 1509 #define HAVE_ldexpdf3 (TARGET_USE_FANCY_MATH_387 \ 1510 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 1511 || TARGET_MIX_SSE_I387) \ 1512 && flag_unsafe_math_optimizations) 1513 #define HAVE_scalbxf3 (TARGET_USE_FANCY_MATH_387 \ 1514 && flag_unsafe_math_optimizations) 1515 #define HAVE_scalbsf3 (TARGET_USE_FANCY_MATH_387 \ 1516 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 1517 || TARGET_MIX_SSE_I387) \ 1518 && flag_unsafe_math_optimizations) 1519 #define HAVE_scalbdf3 (TARGET_USE_FANCY_MATH_387 \ 1520 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 1521 || TARGET_MIX_SSE_I387) \ 1522 && flag_unsafe_math_optimizations) 1523 #define HAVE_significandxf2 (TARGET_USE_FANCY_MATH_387 \ 1524 && flag_unsafe_math_optimizations) 1525 #define HAVE_significandsf2 (TARGET_USE_FANCY_MATH_387 \ 1526 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 1527 || TARGET_MIX_SSE_I387) \ 1528 && flag_unsafe_math_optimizations) 1529 #define HAVE_significanddf2 (TARGET_USE_FANCY_MATH_387 \ 1530 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 1531 || TARGET_MIX_SSE_I387) \ 1532 && flag_unsafe_math_optimizations) 1533 #define HAVE_rintsf2 ((TARGET_USE_FANCY_MATH_387 \ 1534 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 1535 || TARGET_MIX_SSE_I387) \ 1536 && flag_unsafe_math_optimizations) \ 1537 || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH \ 1538 && !flag_trapping_math)) 1539 #define HAVE_rintdf2 ((TARGET_USE_FANCY_MATH_387 \ 1540 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 1541 || TARGET_MIX_SSE_I387) \ 1542 && flag_unsafe_math_optimizations) \ 1543 || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH \ 1544 && !flag_trapping_math)) 1545 #define HAVE_roundsf2 ((TARGET_USE_FANCY_MATH_387 \ 1546 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 1547 || TARGET_MIX_SSE_I387) \ 1548 && flag_unsafe_math_optimizations) \ 1549 || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH \ 1550 && !flag_trapping_math && !flag_rounding_math)) 1551 #define HAVE_rounddf2 ((TARGET_USE_FANCY_MATH_387 \ 1552 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 1553 || TARGET_MIX_SSE_I387) \ 1554 && flag_unsafe_math_optimizations) \ 1555 || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH \ 1556 && !flag_trapping_math && !flag_rounding_math)) 1557 #define HAVE_roundxf2 ((TARGET_USE_FANCY_MATH_387 \ 1558 && (!(SSE_FLOAT_MODE_P (XFmode) && TARGET_SSE_MATH) \ 1559 || TARGET_MIX_SSE_I387) \ 1560 && flag_unsafe_math_optimizations) \ 1561 || (SSE_FLOAT_MODE_P (XFmode) && TARGET_SSE_MATH \ 1562 && !flag_trapping_math && !flag_rounding_math)) 1563 #define HAVE_lrintxfhi2 (TARGET_USE_FANCY_MATH_387) 1564 #define HAVE_lrintxfsi2 (TARGET_USE_FANCY_MATH_387) 1565 #define HAVE_lrintxfdi2 (TARGET_USE_FANCY_MATH_387) 1566 #define HAVE_lrintsfsi2 (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) 1567 #define HAVE_lrintsfdi2 ((SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) && (TARGET_64BIT)) 1568 #define HAVE_lrintdfsi2 (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) 1569 #define HAVE_lrintdfdi2 ((SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) && (TARGET_64BIT)) 1570 #define HAVE_lroundsfhi2 ((TARGET_USE_FANCY_MATH_387 \ 1571 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 1572 || TARGET_MIX_SSE_I387) \ 1573 && flag_unsafe_math_optimizations) \ 1574 || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH \ 1575 && HImode != HImode \ 1576 && ((HImode != DImode) || TARGET_64BIT) \ 1577 && !flag_trapping_math && !flag_rounding_math)) 1578 #define HAVE_lrounddfhi2 ((TARGET_USE_FANCY_MATH_387 \ 1579 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 1580 || TARGET_MIX_SSE_I387) \ 1581 && flag_unsafe_math_optimizations) \ 1582 || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH \ 1583 && HImode != HImode \ 1584 && ((HImode != DImode) || TARGET_64BIT) \ 1585 && !flag_trapping_math && !flag_rounding_math)) 1586 #define HAVE_lroundxfhi2 ((TARGET_USE_FANCY_MATH_387 \ 1587 && (!(SSE_FLOAT_MODE_P (XFmode) && TARGET_SSE_MATH) \ 1588 || TARGET_MIX_SSE_I387) \ 1589 && flag_unsafe_math_optimizations) \ 1590 || (SSE_FLOAT_MODE_P (XFmode) && TARGET_SSE_MATH \ 1591 && HImode != HImode \ 1592 && ((HImode != DImode) || TARGET_64BIT) \ 1593 && !flag_trapping_math && !flag_rounding_math)) 1594 #define HAVE_lroundsfsi2 ((TARGET_USE_FANCY_MATH_387 \ 1595 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 1596 || TARGET_MIX_SSE_I387) \ 1597 && flag_unsafe_math_optimizations) \ 1598 || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH \ 1599 && SImode != HImode \ 1600 && ((SImode != DImode) || TARGET_64BIT) \ 1601 && !flag_trapping_math && !flag_rounding_math)) 1602 #define HAVE_lrounddfsi2 ((TARGET_USE_FANCY_MATH_387 \ 1603 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 1604 || TARGET_MIX_SSE_I387) \ 1605 && flag_unsafe_math_optimizations) \ 1606 || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH \ 1607 && SImode != HImode \ 1608 && ((SImode != DImode) || TARGET_64BIT) \ 1609 && !flag_trapping_math && !flag_rounding_math)) 1610 #define HAVE_lroundxfsi2 ((TARGET_USE_FANCY_MATH_387 \ 1611 && (!(SSE_FLOAT_MODE_P (XFmode) && TARGET_SSE_MATH) \ 1612 || TARGET_MIX_SSE_I387) \ 1613 && flag_unsafe_math_optimizations) \ 1614 || (SSE_FLOAT_MODE_P (XFmode) && TARGET_SSE_MATH \ 1615 && SImode != HImode \ 1616 && ((SImode != DImode) || TARGET_64BIT) \ 1617 && !flag_trapping_math && !flag_rounding_math)) 1618 #define HAVE_lroundsfdi2 ((TARGET_USE_FANCY_MATH_387 \ 1619 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 1620 || TARGET_MIX_SSE_I387) \ 1621 && flag_unsafe_math_optimizations) \ 1622 || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH \ 1623 && DImode != HImode \ 1624 && ((DImode != DImode) || TARGET_64BIT) \ 1625 && !flag_trapping_math && !flag_rounding_math)) 1626 #define HAVE_lrounddfdi2 ((TARGET_USE_FANCY_MATH_387 \ 1627 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 1628 || TARGET_MIX_SSE_I387) \ 1629 && flag_unsafe_math_optimizations) \ 1630 || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH \ 1631 && DImode != HImode \ 1632 && ((DImode != DImode) || TARGET_64BIT) \ 1633 && !flag_trapping_math && !flag_rounding_math)) 1634 #define HAVE_lroundxfdi2 ((TARGET_USE_FANCY_MATH_387 \ 1635 && (!(SSE_FLOAT_MODE_P (XFmode) && TARGET_SSE_MATH) \ 1636 || TARGET_MIX_SSE_I387) \ 1637 && flag_unsafe_math_optimizations) \ 1638 || (SSE_FLOAT_MODE_P (XFmode) && TARGET_SSE_MATH \ 1639 && DImode != HImode \ 1640 && ((DImode != DImode) || TARGET_64BIT) \ 1641 && !flag_trapping_math && !flag_rounding_math)) 1642 #define HAVE_floorxf2 (TARGET_USE_FANCY_MATH_387 \ 1643 && flag_unsafe_math_optimizations \ 1644 && !optimize_insn_for_size_p ()) 1645 #define HAVE_ceilxf2 (TARGET_USE_FANCY_MATH_387 \ 1646 && flag_unsafe_math_optimizations \ 1647 && !optimize_insn_for_size_p ()) 1648 #define HAVE_btruncxf2 (TARGET_USE_FANCY_MATH_387 \ 1649 && flag_unsafe_math_optimizations \ 1650 && !optimize_insn_for_size_p ()) 1651 #define HAVE_floorsf2 ((TARGET_USE_FANCY_MATH_387 \ 1652 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 1653 || TARGET_MIX_SSE_I387) \ 1654 && flag_unsafe_math_optimizations) \ 1655 || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH \ 1656 && !flag_trapping_math)) 1657 #define HAVE_ceilsf2 ((TARGET_USE_FANCY_MATH_387 \ 1658 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 1659 || TARGET_MIX_SSE_I387) \ 1660 && flag_unsafe_math_optimizations) \ 1661 || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH \ 1662 && !flag_trapping_math)) 1663 #define HAVE_btruncsf2 ((TARGET_USE_FANCY_MATH_387 \ 1664 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 1665 || TARGET_MIX_SSE_I387) \ 1666 && flag_unsafe_math_optimizations) \ 1667 || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH \ 1668 && !flag_trapping_math)) 1669 #define HAVE_floordf2 ((TARGET_USE_FANCY_MATH_387 \ 1670 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 1671 || TARGET_MIX_SSE_I387) \ 1672 && flag_unsafe_math_optimizations) \ 1673 || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH \ 1674 && !flag_trapping_math)) 1675 #define HAVE_ceildf2 ((TARGET_USE_FANCY_MATH_387 \ 1676 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 1677 || TARGET_MIX_SSE_I387) \ 1678 && flag_unsafe_math_optimizations) \ 1679 || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH \ 1680 && !flag_trapping_math)) 1681 #define HAVE_btruncdf2 ((TARGET_USE_FANCY_MATH_387 \ 1682 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 1683 || TARGET_MIX_SSE_I387) \ 1684 && flag_unsafe_math_optimizations) \ 1685 || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH \ 1686 && !flag_trapping_math)) 1687 #define HAVE_nearbyintxf2 (TARGET_USE_FANCY_MATH_387 \ 1688 && flag_unsafe_math_optimizations) 1689 #define HAVE_nearbyintsf2 (TARGET_USE_FANCY_MATH_387 \ 1690 && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \ 1691 || TARGET_MIX_SSE_I387) \ 1692 && flag_unsafe_math_optimizations) 1693 #define HAVE_nearbyintdf2 (TARGET_USE_FANCY_MATH_387 \ 1694 && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \ 1695 || TARGET_MIX_SSE_I387) \ 1696 && flag_unsafe_math_optimizations) 1697 #define HAVE_lfloorxfhi2 (TARGET_USE_FANCY_MATH_387 \ 1698 && (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387) \ 1699 && flag_unsafe_math_optimizations) 1700 #define HAVE_lceilxfhi2 (TARGET_USE_FANCY_MATH_387 \ 1701 && (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387) \ 1702 && flag_unsafe_math_optimizations) 1703 #define HAVE_lfloorxfsi2 (TARGET_USE_FANCY_MATH_387 \ 1704 && (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387) \ 1705 && flag_unsafe_math_optimizations) 1706 #define HAVE_lceilxfsi2 (TARGET_USE_FANCY_MATH_387 \ 1707 && (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387) \ 1708 && flag_unsafe_math_optimizations) 1709 #define HAVE_lfloorxfdi2 (TARGET_USE_FANCY_MATH_387 \ 1710 && (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387) \ 1711 && flag_unsafe_math_optimizations) 1712 #define HAVE_lceilxfdi2 (TARGET_USE_FANCY_MATH_387 \ 1713 && (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387) \ 1714 && flag_unsafe_math_optimizations) 1715 #define HAVE_lfloorsfsi2 (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH \ 1716 && !flag_trapping_math) 1717 #define HAVE_lceilsfsi2 (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH \ 1718 && !flag_trapping_math) 1719 #define HAVE_lfloorsfdi2 ((SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH \ 1720 && !flag_trapping_math) && (TARGET_64BIT)) 1721 #define HAVE_lceilsfdi2 ((SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH \ 1722 && !flag_trapping_math) && (TARGET_64BIT)) 1723 #define HAVE_lfloordfsi2 (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH \ 1724 && !flag_trapping_math) 1725 #define HAVE_lceildfsi2 (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH \ 1726 && !flag_trapping_math) 1727 #define HAVE_lfloordfdi2 ((SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH \ 1728 && !flag_trapping_math) && (TARGET_64BIT)) 1729 #define HAVE_lceildfdi2 ((SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH \ 1730 && !flag_trapping_math) && (TARGET_64BIT)) 1731 #define HAVE_signbitxf2 (TARGET_USE_FANCY_MATH_387) 1732 #define HAVE_signbitdf2 (TARGET_USE_FANCY_MATH_387 \ 1733 || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)) 1734 #define HAVE_signbitsf2 (TARGET_USE_FANCY_MATH_387 \ 1735 && !(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH)) 1736 #define HAVE_movmemsi 1 1737 #define HAVE_movmemdi (TARGET_64BIT) 1738 #define HAVE_strmov 1 1739 #define HAVE_strmov_singleop 1 1740 #define HAVE_rep_mov 1 1741 #define HAVE_setmemsi 1 1742 #define HAVE_setmemdi (TARGET_64BIT) 1743 #define HAVE_strset 1 1744 #define HAVE_strset_singleop 1 1745 #define HAVE_rep_stos 1 1746 #define HAVE_cmpstrnsi 1 1747 #define HAVE_cmpintqi 1 1748 #define HAVE_cmpstrnqi_nz_1 1 1749 #define HAVE_cmpstrnqi_1 1 1750 #define HAVE_strlensi (Pmode == SImode) 1751 #define HAVE_strlendi (Pmode == DImode) 1752 #define HAVE_strlenqi_1 1 1753 #define HAVE_movqicc (TARGET_QIMODE_MATH) 1754 #define HAVE_movhicc (TARGET_HIMODE_MATH) 1755 #define HAVE_movsicc 1 1756 #define HAVE_movdicc (TARGET_64BIT) 1757 #define HAVE_x86_movsicc_0_m1 1 1758 #define HAVE_x86_movdicc_0_m1 (TARGET_64BIT) 1759 #define HAVE_movsfcc ((TARGET_80387 && TARGET_CMOVE) \ 1760 || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH)) 1761 #define HAVE_movdfcc ((TARGET_80387 && TARGET_CMOVE) \ 1762 || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)) 1763 #define HAVE_movxfcc ((TARGET_80387 && TARGET_CMOVE) \ 1764 || (SSE_FLOAT_MODE_P (XFmode) && TARGET_SSE_MATH)) 1765 #define HAVE_addqicc 1 1766 #define HAVE_addhicc 1 1767 #define HAVE_addsicc 1 1768 #define HAVE_adddicc (TARGET_64BIT) 1769 #define HAVE_allocate_stack (ix86_target_stack_probe ()) 1770 #define HAVE_probe_stack 1 1771 #define HAVE_builtin_setjmp_receiver (!TARGET_64BIT && flag_pic) 1772 #define HAVE_prefetch (TARGET_PREFETCH_SSE || TARGET_PRFCHW) 1773 #define HAVE_stack_protect_set 1 1774 #define HAVE_stack_protect_test 1 1775 #define HAVE_lwp_llwpcb (TARGET_LWP) 1776 #define HAVE_lwp_slwpcb (TARGET_LWP) 1777 #define HAVE_lwp_lwpvalsi3 (TARGET_LWP) 1778 #define HAVE_lwp_lwpvaldi3 ((TARGET_LWP) && (TARGET_64BIT)) 1779 #define HAVE_lwp_lwpinssi3 (TARGET_LWP) 1780 #define HAVE_lwp_lwpinsdi3 ((TARGET_LWP) && (TARGET_64BIT)) 1781 #define HAVE_pause 1 1782 #define HAVE_xbegin (TARGET_RTM) 1783 #define HAVE_xtest (TARGET_RTM) 1784 #define HAVE_movv8qi (TARGET_MMX) 1785 #define HAVE_movv4hi (TARGET_MMX) 1786 #define HAVE_movv2si (TARGET_MMX) 1787 #define HAVE_movv1di (TARGET_MMX) 1788 #define HAVE_movv2sf (TARGET_MMX) 1789 #define HAVE_pushv8qi1 (TARGET_MMX) 1790 #define HAVE_pushv4hi1 (TARGET_MMX) 1791 #define HAVE_pushv2si1 (TARGET_MMX) 1792 #define HAVE_pushv1di1 (TARGET_MMX) 1793 #define HAVE_pushv2sf1 (TARGET_MMX) 1794 #define HAVE_movmisalignv8qi (TARGET_MMX) 1795 #define HAVE_movmisalignv4hi (TARGET_MMX) 1796 #define HAVE_movmisalignv2si (TARGET_MMX) 1797 #define HAVE_movmisalignv1di (TARGET_MMX) 1798 #define HAVE_movmisalignv2sf (TARGET_MMX) 1799 #define HAVE_mmx_addv2sf3 (TARGET_3DNOW) 1800 #define HAVE_mmx_subv2sf3 (TARGET_3DNOW) 1801 #define HAVE_mmx_subrv2sf3 (TARGET_3DNOW) 1802 #define HAVE_mmx_mulv2sf3 (TARGET_3DNOW) 1803 #define HAVE_mmx_smaxv2sf3 (TARGET_3DNOW) 1804 #define HAVE_mmx_sminv2sf3 (TARGET_3DNOW) 1805 #define HAVE_mmx_eqv2sf3 (TARGET_3DNOW) 1806 #define HAVE_vec_setv2sf (TARGET_MMX) 1807 #define HAVE_vec_extractv2sf (TARGET_MMX) 1808 #define HAVE_vec_initv2sf (TARGET_SSE) 1809 #define HAVE_mmx_addv8qi3 (TARGET_MMX || (TARGET_SSE2 && V8QImode == V1DImode)) 1810 #define HAVE_mmx_subv8qi3 (TARGET_MMX || (TARGET_SSE2 && V8QImode == V1DImode)) 1811 #define HAVE_mmx_addv4hi3 (TARGET_MMX || (TARGET_SSE2 && V4HImode == V1DImode)) 1812 #define HAVE_mmx_subv4hi3 (TARGET_MMX || (TARGET_SSE2 && V4HImode == V1DImode)) 1813 #define HAVE_mmx_addv2si3 (TARGET_MMX || (TARGET_SSE2 && V2SImode == V1DImode)) 1814 #define HAVE_mmx_subv2si3 (TARGET_MMX || (TARGET_SSE2 && V2SImode == V1DImode)) 1815 #define HAVE_mmx_addv1di3 (TARGET_MMX || (TARGET_SSE2 && V1DImode == V1DImode)) 1816 #define HAVE_mmx_subv1di3 (TARGET_MMX || (TARGET_SSE2 && V1DImode == V1DImode)) 1817 #define HAVE_mmx_ssaddv8qi3 (TARGET_MMX) 1818 #define HAVE_mmx_usaddv8qi3 (TARGET_MMX) 1819 #define HAVE_mmx_sssubv8qi3 (TARGET_MMX) 1820 #define HAVE_mmx_ussubv8qi3 (TARGET_MMX) 1821 #define HAVE_mmx_ssaddv4hi3 (TARGET_MMX) 1822 #define HAVE_mmx_usaddv4hi3 (TARGET_MMX) 1823 #define HAVE_mmx_sssubv4hi3 (TARGET_MMX) 1824 #define HAVE_mmx_ussubv4hi3 (TARGET_MMX) 1825 #define HAVE_mmx_mulv4hi3 (TARGET_MMX) 1826 #define HAVE_mmx_smulv4hi3_highpart (TARGET_MMX) 1827 #define HAVE_mmx_umulv4hi3_highpart (TARGET_SSE || TARGET_3DNOW_A) 1828 #define HAVE_mmx_pmaddwd (TARGET_MMX) 1829 #define HAVE_mmx_pmulhrwv4hi3 (TARGET_3DNOW) 1830 #define HAVE_sse2_umulv1siv1di3 (TARGET_SSE2) 1831 #define HAVE_mmx_smaxv4hi3 (TARGET_SSE || TARGET_3DNOW_A) 1832 #define HAVE_mmx_sminv4hi3 (TARGET_SSE || TARGET_3DNOW_A) 1833 #define HAVE_mmx_umaxv8qi3 (TARGET_SSE || TARGET_3DNOW_A) 1834 #define HAVE_mmx_uminv8qi3 (TARGET_SSE || TARGET_3DNOW_A) 1835 #define HAVE_mmx_eqv8qi3 (TARGET_MMX) 1836 #define HAVE_mmx_eqv4hi3 (TARGET_MMX) 1837 #define HAVE_mmx_eqv2si3 (TARGET_MMX) 1838 #define HAVE_mmx_andv8qi3 (TARGET_MMX) 1839 #define HAVE_mmx_iorv8qi3 (TARGET_MMX) 1840 #define HAVE_mmx_xorv8qi3 (TARGET_MMX) 1841 #define HAVE_mmx_andv4hi3 (TARGET_MMX) 1842 #define HAVE_mmx_iorv4hi3 (TARGET_MMX) 1843 #define HAVE_mmx_xorv4hi3 (TARGET_MMX) 1844 #define HAVE_mmx_andv2si3 (TARGET_MMX) 1845 #define HAVE_mmx_iorv2si3 (TARGET_MMX) 1846 #define HAVE_mmx_xorv2si3 (TARGET_MMX) 1847 #define HAVE_mmx_pinsrw (TARGET_SSE || TARGET_3DNOW_A) 1848 #define HAVE_mmx_pshufw (TARGET_SSE || TARGET_3DNOW_A) 1849 #define HAVE_vec_setv2si (TARGET_MMX) 1850 #define HAVE_vec_extractv2si (TARGET_MMX) 1851 #define HAVE_vec_initv2si (TARGET_SSE) 1852 #define HAVE_vec_setv4hi (TARGET_MMX) 1853 #define HAVE_vec_extractv4hi (TARGET_MMX) 1854 #define HAVE_vec_initv4hi (TARGET_SSE) 1855 #define HAVE_vec_setv8qi (TARGET_MMX) 1856 #define HAVE_vec_extractv8qi (TARGET_MMX) 1857 #define HAVE_vec_initv8qi (TARGET_SSE) 1858 #define HAVE_mmx_uavgv8qi3 (TARGET_SSE || TARGET_3DNOW) 1859 #define HAVE_mmx_uavgv4hi3 (TARGET_SSE || TARGET_3DNOW_A) 1860 #define HAVE_mmx_maskmovq (TARGET_SSE || TARGET_3DNOW_A) 1861 #define HAVE_mmx_emms (TARGET_MMX) 1862 #define HAVE_mmx_femms (TARGET_3DNOW) 1863 #define HAVE_movv32qi ((TARGET_SSE) && (TARGET_AVX)) 1864 #define HAVE_movv16qi (TARGET_SSE) 1865 #define HAVE_movv16hi ((TARGET_SSE) && (TARGET_AVX)) 1866 #define HAVE_movv8hi (TARGET_SSE) 1867 #define HAVE_movv8si ((TARGET_SSE) && (TARGET_AVX)) 1868 #define HAVE_movv4si (TARGET_SSE) 1869 #define HAVE_movv4di ((TARGET_SSE) && (TARGET_AVX)) 1870 #define HAVE_movv2di (TARGET_SSE) 1871 #define HAVE_movv2ti ((TARGET_SSE) && (TARGET_AVX)) 1872 #define HAVE_movv1ti (TARGET_SSE) 1873 #define HAVE_movv8sf ((TARGET_SSE) && (TARGET_AVX)) 1874 #define HAVE_movv4sf (TARGET_SSE) 1875 #define HAVE_movv4df ((TARGET_SSE) && (TARGET_AVX)) 1876 #define HAVE_movv2df (TARGET_SSE) 1877 #define HAVE_pushv32qi1 ((TARGET_SSE) && (TARGET_AVX)) 1878 #define HAVE_pushv16qi1 (TARGET_SSE) 1879 #define HAVE_pushv16hi1 ((TARGET_SSE) && (TARGET_AVX)) 1880 #define HAVE_pushv8hi1 (TARGET_SSE) 1881 #define HAVE_pushv8si1 ((TARGET_SSE) && (TARGET_AVX)) 1882 #define HAVE_pushv4si1 (TARGET_SSE) 1883 #define HAVE_pushv4di1 ((TARGET_SSE) && (TARGET_AVX)) 1884 #define HAVE_pushv2di1 (TARGET_SSE) 1885 #define HAVE_pushv2ti1 ((TARGET_SSE) && (TARGET_AVX)) 1886 #define HAVE_pushv1ti1 (TARGET_SSE) 1887 #define HAVE_pushv8sf1 ((TARGET_SSE) && (TARGET_AVX)) 1888 #define HAVE_pushv4sf1 (TARGET_SSE) 1889 #define HAVE_pushv4df1 ((TARGET_SSE) && (TARGET_AVX)) 1890 #define HAVE_pushv2df1 (TARGET_SSE) 1891 #define HAVE_movmisalignv32qi ((TARGET_SSE) && (TARGET_AVX)) 1892 #define HAVE_movmisalignv16qi (TARGET_SSE) 1893 #define HAVE_movmisalignv16hi ((TARGET_SSE) && (TARGET_AVX)) 1894 #define HAVE_movmisalignv8hi (TARGET_SSE) 1895 #define HAVE_movmisalignv8si ((TARGET_SSE) && (TARGET_AVX)) 1896 #define HAVE_movmisalignv4si (TARGET_SSE) 1897 #define HAVE_movmisalignv4di ((TARGET_SSE) && (TARGET_AVX)) 1898 #define HAVE_movmisalignv2di (TARGET_SSE) 1899 #define HAVE_movmisalignv2ti ((TARGET_SSE) && (TARGET_AVX)) 1900 #define HAVE_movmisalignv1ti (TARGET_SSE) 1901 #define HAVE_movmisalignv8sf ((TARGET_SSE) && (TARGET_AVX)) 1902 #define HAVE_movmisalignv4sf (TARGET_SSE) 1903 #define HAVE_movmisalignv4df ((TARGET_SSE) && (TARGET_AVX)) 1904 #define HAVE_movmisalignv2df (TARGET_SSE) 1905 #define HAVE_storentdi ((TARGET_SSE) && (TARGET_SSE2 && TARGET_64BIT)) 1906 #define HAVE_storentsi ((TARGET_SSE) && (TARGET_SSE2)) 1907 #define HAVE_storentsf ((TARGET_SSE) && (TARGET_SSE4A)) 1908 #define HAVE_storentdf ((TARGET_SSE) && (TARGET_SSE4A)) 1909 #define HAVE_storentv4di ((TARGET_SSE) && (TARGET_AVX)) 1910 #define HAVE_storentv2di ((TARGET_SSE) && (TARGET_SSE2)) 1911 #define HAVE_storentv8sf ((TARGET_SSE) && (TARGET_AVX)) 1912 #define HAVE_storentv4sf (TARGET_SSE) 1913 #define HAVE_storentv4df ((TARGET_SSE) && (TARGET_AVX)) 1914 #define HAVE_storentv2df ((TARGET_SSE) && (TARGET_SSE2)) 1915 #define HAVE_absv8sf2 ((TARGET_SSE) && (TARGET_AVX)) 1916 #define HAVE_negv8sf2 ((TARGET_SSE) && (TARGET_AVX)) 1917 #define HAVE_absv4sf2 (TARGET_SSE) 1918 #define HAVE_negv4sf2 (TARGET_SSE) 1919 #define HAVE_absv4df2 ((TARGET_SSE) && (TARGET_AVX)) 1920 #define HAVE_negv4df2 ((TARGET_SSE) && (TARGET_AVX)) 1921 #define HAVE_absv2df2 ((TARGET_SSE) && (TARGET_SSE2)) 1922 #define HAVE_negv2df2 ((TARGET_SSE) && (TARGET_SSE2)) 1923 #define HAVE_addv8sf3 ((TARGET_SSE) && (TARGET_AVX)) 1924 #define HAVE_subv8sf3 ((TARGET_SSE) && (TARGET_AVX)) 1925 #define HAVE_addv4sf3 (TARGET_SSE) 1926 #define HAVE_subv4sf3 (TARGET_SSE) 1927 #define HAVE_addv4df3 ((TARGET_SSE) && (TARGET_AVX)) 1928 #define HAVE_subv4df3 ((TARGET_SSE) && (TARGET_AVX)) 1929 #define HAVE_addv2df3 ((TARGET_SSE) && (TARGET_SSE2)) 1930 #define HAVE_subv2df3 ((TARGET_SSE) && (TARGET_SSE2)) 1931 #define HAVE_mulv8sf3 ((TARGET_SSE) && (TARGET_AVX)) 1932 #define HAVE_mulv4sf3 (TARGET_SSE) 1933 #define HAVE_mulv4df3 ((TARGET_SSE) && (TARGET_AVX)) 1934 #define HAVE_mulv2df3 ((TARGET_SSE) && (TARGET_SSE2)) 1935 #define HAVE_divv4df3 ((TARGET_SSE2) && (TARGET_AVX)) 1936 #define HAVE_divv2df3 (TARGET_SSE2) 1937 #define HAVE_divv8sf3 ((TARGET_SSE) && (TARGET_AVX)) 1938 #define HAVE_divv4sf3 (TARGET_SSE) 1939 #define HAVE_sqrtv4df2 ((TARGET_SSE2) && (TARGET_AVX)) 1940 #define HAVE_sqrtv2df2 (TARGET_SSE2) 1941 #define HAVE_sqrtv8sf2 ((TARGET_SSE) && (TARGET_AVX)) 1942 #define HAVE_sqrtv4sf2 (TARGET_SSE) 1943 #define HAVE_rsqrtv8sf2 ((TARGET_SSE_MATH) && (TARGET_AVX)) 1944 #define HAVE_rsqrtv4sf2 (TARGET_SSE_MATH) 1945 #define HAVE_smaxv8sf3 ((TARGET_SSE) && (TARGET_AVX)) 1946 #define HAVE_sminv8sf3 ((TARGET_SSE) && (TARGET_AVX)) 1947 #define HAVE_smaxv4sf3 (TARGET_SSE) 1948 #define HAVE_sminv4sf3 (TARGET_SSE) 1949 #define HAVE_smaxv4df3 ((TARGET_SSE) && (TARGET_AVX)) 1950 #define HAVE_sminv4df3 ((TARGET_SSE) && (TARGET_AVX)) 1951 #define HAVE_smaxv2df3 ((TARGET_SSE) && (TARGET_SSE2)) 1952 #define HAVE_sminv2df3 ((TARGET_SSE) && (TARGET_SSE2)) 1953 #define HAVE_sse3_haddv2df3 (TARGET_SSE3) 1954 #define HAVE_reduc_splus_v4df (TARGET_AVX) 1955 #define HAVE_reduc_splus_v2df (TARGET_SSE3) 1956 #define HAVE_reduc_splus_v8sf (TARGET_AVX) 1957 #define HAVE_reduc_splus_v4sf (TARGET_SSE) 1958 #define HAVE_reduc_smax_v32qi (TARGET_AVX2) 1959 #define HAVE_reduc_smin_v32qi (TARGET_AVX2) 1960 #define HAVE_reduc_smax_v16hi (TARGET_AVX2) 1961 #define HAVE_reduc_smin_v16hi (TARGET_AVX2) 1962 #define HAVE_reduc_smax_v8si (TARGET_AVX2) 1963 #define HAVE_reduc_smin_v8si (TARGET_AVX2) 1964 #define HAVE_reduc_smax_v4di (TARGET_AVX2) 1965 #define HAVE_reduc_smin_v4di (TARGET_AVX2) 1966 #define HAVE_reduc_smax_v8sf (TARGET_AVX) 1967 #define HAVE_reduc_smin_v8sf (TARGET_AVX) 1968 #define HAVE_reduc_smax_v4df (TARGET_AVX) 1969 #define HAVE_reduc_smin_v4df (TARGET_AVX) 1970 #define HAVE_reduc_smax_v4sf (TARGET_SSE) 1971 #define HAVE_reduc_smin_v4sf (TARGET_SSE) 1972 #define HAVE_reduc_umax_v32qi (TARGET_AVX2) 1973 #define HAVE_reduc_umin_v32qi (TARGET_AVX2) 1974 #define HAVE_reduc_umax_v16hi (TARGET_AVX2) 1975 #define HAVE_reduc_umin_v16hi (TARGET_AVX2) 1976 #define HAVE_reduc_umax_v8si (TARGET_AVX2) 1977 #define HAVE_reduc_umin_v8si (TARGET_AVX2) 1978 #define HAVE_reduc_umax_v4di (TARGET_AVX2) 1979 #define HAVE_reduc_umin_v4di (TARGET_AVX2) 1980 #define HAVE_reduc_umin_v8hi (TARGET_SSE4_1) 1981 #define HAVE_vcondv32qiv8sf (TARGET_AVX \ 1982 && (GET_MODE_NUNITS (V32QImode) \ 1983 == GET_MODE_NUNITS (V8SFmode))) 1984 #define HAVE_vcondv16hiv8sf (TARGET_AVX \ 1985 && (GET_MODE_NUNITS (V16HImode) \ 1986 == GET_MODE_NUNITS (V8SFmode))) 1987 #define HAVE_vcondv8siv8sf (TARGET_AVX \ 1988 && (GET_MODE_NUNITS (V8SImode) \ 1989 == GET_MODE_NUNITS (V8SFmode))) 1990 #define HAVE_vcondv4div8sf (TARGET_AVX \ 1991 && (GET_MODE_NUNITS (V4DImode) \ 1992 == GET_MODE_NUNITS (V8SFmode))) 1993 #define HAVE_vcondv8sfv8sf (TARGET_AVX \ 1994 && (GET_MODE_NUNITS (V8SFmode) \ 1995 == GET_MODE_NUNITS (V8SFmode))) 1996 #define HAVE_vcondv4dfv8sf (TARGET_AVX \ 1997 && (GET_MODE_NUNITS (V4DFmode) \ 1998 == GET_MODE_NUNITS (V8SFmode))) 1999 #define HAVE_vcondv32qiv4df (TARGET_AVX \ 2000 && (GET_MODE_NUNITS (V32QImode) \ 2001 == GET_MODE_NUNITS (V4DFmode))) 2002 #define HAVE_vcondv16hiv4df (TARGET_AVX \ 2003 && (GET_MODE_NUNITS (V16HImode) \ 2004 == GET_MODE_NUNITS (V4DFmode))) 2005 #define HAVE_vcondv8siv4df (TARGET_AVX \ 2006 && (GET_MODE_NUNITS (V8SImode) \ 2007 == GET_MODE_NUNITS (V4DFmode))) 2008 #define HAVE_vcondv4div4df (TARGET_AVX \ 2009 && (GET_MODE_NUNITS (V4DImode) \ 2010 == GET_MODE_NUNITS (V4DFmode))) 2011 #define HAVE_vcondv8sfv4df (TARGET_AVX \ 2012 && (GET_MODE_NUNITS (V8SFmode) \ 2013 == GET_MODE_NUNITS (V4DFmode))) 2014 #define HAVE_vcondv4dfv4df (TARGET_AVX \ 2015 && (GET_MODE_NUNITS (V4DFmode) \ 2016 == GET_MODE_NUNITS (V4DFmode))) 2017 #define HAVE_vcondv16qiv4sf (TARGET_SSE \ 2018 && (GET_MODE_NUNITS (V16QImode) \ 2019 == GET_MODE_NUNITS (V4SFmode))) 2020 #define HAVE_vcondv8hiv4sf (TARGET_SSE \ 2021 && (GET_MODE_NUNITS (V8HImode) \ 2022 == GET_MODE_NUNITS (V4SFmode))) 2023 #define HAVE_vcondv4siv4sf (TARGET_SSE \ 2024 && (GET_MODE_NUNITS (V4SImode) \ 2025 == GET_MODE_NUNITS (V4SFmode))) 2026 #define HAVE_vcondv2div4sf (TARGET_SSE \ 2027 && (GET_MODE_NUNITS (V2DImode) \ 2028 == GET_MODE_NUNITS (V4SFmode))) 2029 #define HAVE_vcondv4sfv4sf (TARGET_SSE \ 2030 && (GET_MODE_NUNITS (V4SFmode) \ 2031 == GET_MODE_NUNITS (V4SFmode))) 2032 #define HAVE_vcondv2dfv4sf ((TARGET_SSE \ 2033 && (GET_MODE_NUNITS (V2DFmode) \ 2034 == GET_MODE_NUNITS (V4SFmode))) && (TARGET_SSE2)) 2035 #define HAVE_vcondv16qiv2df ((TARGET_SSE \ 2036 && (GET_MODE_NUNITS (V16QImode) \ 2037 == GET_MODE_NUNITS (V2DFmode))) && (TARGET_SSE2)) 2038 #define HAVE_vcondv8hiv2df ((TARGET_SSE \ 2039 && (GET_MODE_NUNITS (V8HImode) \ 2040 == GET_MODE_NUNITS (V2DFmode))) && (TARGET_SSE2)) 2041 #define HAVE_vcondv4siv2df ((TARGET_SSE \ 2042 && (GET_MODE_NUNITS (V4SImode) \ 2043 == GET_MODE_NUNITS (V2DFmode))) && (TARGET_SSE2)) 2044 #define HAVE_vcondv2div2df ((TARGET_SSE \ 2045 && (GET_MODE_NUNITS (V2DImode) \ 2046 == GET_MODE_NUNITS (V2DFmode))) && (TARGET_SSE2)) 2047 #define HAVE_vcondv4sfv2df ((TARGET_SSE \ 2048 && (GET_MODE_NUNITS (V4SFmode) \ 2049 == GET_MODE_NUNITS (V2DFmode))) && (TARGET_SSE2)) 2050 #define HAVE_vcondv2dfv2df ((TARGET_SSE \ 2051 && (GET_MODE_NUNITS (V2DFmode) \ 2052 == GET_MODE_NUNITS (V2DFmode))) && (TARGET_SSE2)) 2053 #define HAVE_andv8sf3 ((TARGET_SSE) && (TARGET_AVX)) 2054 #define HAVE_iorv8sf3 ((TARGET_SSE) && (TARGET_AVX)) 2055 #define HAVE_xorv8sf3 ((TARGET_SSE) && (TARGET_AVX)) 2056 #define HAVE_andv4sf3 (TARGET_SSE) 2057 #define HAVE_iorv4sf3 (TARGET_SSE) 2058 #define HAVE_xorv4sf3 (TARGET_SSE) 2059 #define HAVE_andv4df3 ((TARGET_SSE) && (TARGET_AVX)) 2060 #define HAVE_iorv4df3 ((TARGET_SSE) && (TARGET_AVX)) 2061 #define HAVE_xorv4df3 ((TARGET_SSE) && (TARGET_AVX)) 2062 #define HAVE_andv2df3 ((TARGET_SSE) && (TARGET_SSE2)) 2063 #define HAVE_iorv2df3 ((TARGET_SSE) && (TARGET_SSE2)) 2064 #define HAVE_xorv2df3 ((TARGET_SSE) && (TARGET_SSE2)) 2065 #define HAVE_copysignv8sf3 ((TARGET_SSE) && (TARGET_AVX)) 2066 #define HAVE_copysignv4sf3 (TARGET_SSE) 2067 #define HAVE_copysignv4df3 ((TARGET_SSE) && (TARGET_AVX)) 2068 #define HAVE_copysignv2df3 ((TARGET_SSE) && (TARGET_SSE2)) 2069 #define HAVE_andtf3 (TARGET_SSE) 2070 #define HAVE_iortf3 (TARGET_SSE) 2071 #define HAVE_xortf3 (TARGET_SSE) 2072 #define HAVE_fmasf4 ((TARGET_FMA || TARGET_FMA4) && (TARGET_SSE_MATH)) 2073 #define HAVE_fmadf4 ((TARGET_FMA || TARGET_FMA4) && (TARGET_SSE_MATH)) 2074 #define HAVE_fmav4sf4 (TARGET_FMA || TARGET_FMA4) 2075 #define HAVE_fmav2df4 (TARGET_FMA || TARGET_FMA4) 2076 #define HAVE_fmav8sf4 (TARGET_FMA || TARGET_FMA4) 2077 #define HAVE_fmav4df4 (TARGET_FMA || TARGET_FMA4) 2078 #define HAVE_fmssf4 ((TARGET_FMA || TARGET_FMA4) && (TARGET_SSE_MATH)) 2079 #define HAVE_fmsdf4 ((TARGET_FMA || TARGET_FMA4) && (TARGET_SSE_MATH)) 2080 #define HAVE_fmsv4sf4 (TARGET_FMA || TARGET_FMA4) 2081 #define HAVE_fmsv2df4 (TARGET_FMA || TARGET_FMA4) 2082 #define HAVE_fmsv8sf4 (TARGET_FMA || TARGET_FMA4) 2083 #define HAVE_fmsv4df4 (TARGET_FMA || TARGET_FMA4) 2084 #define HAVE_fnmasf4 ((TARGET_FMA || TARGET_FMA4) && (TARGET_SSE_MATH)) 2085 #define HAVE_fnmadf4 ((TARGET_FMA || TARGET_FMA4) && (TARGET_SSE_MATH)) 2086 #define HAVE_fnmav4sf4 (TARGET_FMA || TARGET_FMA4) 2087 #define HAVE_fnmav2df4 (TARGET_FMA || TARGET_FMA4) 2088 #define HAVE_fnmav8sf4 (TARGET_FMA || TARGET_FMA4) 2089 #define HAVE_fnmav4df4 (TARGET_FMA || TARGET_FMA4) 2090 #define HAVE_fnmssf4 ((TARGET_FMA || TARGET_FMA4) && (TARGET_SSE_MATH)) 2091 #define HAVE_fnmsdf4 ((TARGET_FMA || TARGET_FMA4) && (TARGET_SSE_MATH)) 2092 #define HAVE_fnmsv4sf4 (TARGET_FMA || TARGET_FMA4) 2093 #define HAVE_fnmsv2df4 (TARGET_FMA || TARGET_FMA4) 2094 #define HAVE_fnmsv8sf4 (TARGET_FMA || TARGET_FMA4) 2095 #define HAVE_fnmsv4df4 (TARGET_FMA || TARGET_FMA4) 2096 #define HAVE_fma4i_fmadd_sf (TARGET_FMA || TARGET_FMA4) 2097 #define HAVE_fma4i_fmadd_df (TARGET_FMA || TARGET_FMA4) 2098 #define HAVE_fma4i_fmadd_v4sf (TARGET_FMA || TARGET_FMA4) 2099 #define HAVE_fma4i_fmadd_v2df (TARGET_FMA || TARGET_FMA4) 2100 #define HAVE_fma4i_fmadd_v8sf (TARGET_FMA || TARGET_FMA4) 2101 #define HAVE_fma4i_fmadd_v4df (TARGET_FMA || TARGET_FMA4) 2102 #define HAVE_fmaddsub_v8sf ((TARGET_FMA || TARGET_FMA4) && (TARGET_AVX)) 2103 #define HAVE_fmaddsub_v4sf (TARGET_FMA || TARGET_FMA4) 2104 #define HAVE_fmaddsub_v4df ((TARGET_FMA || TARGET_FMA4) && (TARGET_AVX)) 2105 #define HAVE_fmaddsub_v2df ((TARGET_FMA || TARGET_FMA4) && (TARGET_SSE2)) 2106 #define HAVE_fmai_vmfmadd_v4sf (TARGET_FMA) 2107 #define HAVE_fmai_vmfmadd_v2df ((TARGET_FMA) && (TARGET_SSE2)) 2108 #define HAVE_fma4i_vmfmadd_v4sf (TARGET_FMA4) 2109 #define HAVE_fma4i_vmfmadd_v2df ((TARGET_FMA4) && (TARGET_SSE2)) 2110 #define HAVE_floatunsv8siv8sf2 ((TARGET_SSE2 && (V8SFmode == V4SFmode || TARGET_AVX2)) && (TARGET_AVX)) 2111 #define HAVE_floatunsv4siv4sf2 (TARGET_SSE2 && (V4SFmode == V4SFmode || TARGET_AVX2)) 2112 #define HAVE_fixuns_truncv8sfv8si2 ((TARGET_SSE2) && (TARGET_AVX)) 2113 #define HAVE_fixuns_truncv4sfv4si2 (TARGET_SSE2) 2114 #define HAVE_avx_cvtpd2dq256_2 (TARGET_AVX) 2115 #define HAVE_sse2_cvtpd2dq (TARGET_SSE2) 2116 #define HAVE_avx_cvttpd2dq256_2 (TARGET_AVX) 2117 #define HAVE_sse2_cvttpd2dq (TARGET_SSE2) 2118 #define HAVE_sse2_cvtpd2ps (TARGET_SSE2) 2119 #define HAVE_vec_unpacks_hi_v4sf (TARGET_SSE2) 2120 #define HAVE_vec_unpacks_hi_v8sf (TARGET_AVX) 2121 #define HAVE_vec_unpacks_lo_v4sf (TARGET_SSE2) 2122 #define HAVE_vec_unpacks_lo_v8sf (TARGET_AVX) 2123 #define HAVE_vec_unpacks_float_hi_v16hi ((TARGET_SSE2) && (TARGET_AVX2)) 2124 #define HAVE_vec_unpacks_float_hi_v8hi (TARGET_SSE2) 2125 #define HAVE_vec_unpacks_float_lo_v16hi ((TARGET_SSE2) && (TARGET_AVX2)) 2126 #define HAVE_vec_unpacks_float_lo_v8hi (TARGET_SSE2) 2127 #define HAVE_vec_unpacku_float_hi_v16hi ((TARGET_SSE2) && (TARGET_AVX2)) 2128 #define HAVE_vec_unpacku_float_hi_v8hi (TARGET_SSE2) 2129 #define HAVE_vec_unpacku_float_lo_v16hi ((TARGET_SSE2) && (TARGET_AVX2)) 2130 #define HAVE_vec_unpacku_float_lo_v8hi (TARGET_SSE2) 2131 #define HAVE_vec_unpacks_float_hi_v4si (TARGET_SSE2) 2132 #define HAVE_vec_unpacks_float_lo_v4si (TARGET_SSE2) 2133 #define HAVE_vec_unpacks_float_hi_v8si (TARGET_AVX) 2134 #define HAVE_vec_unpacks_float_lo_v8si (TARGET_AVX) 2135 #define HAVE_vec_unpacku_float_hi_v4si (TARGET_SSE2) 2136 #define HAVE_vec_unpacku_float_lo_v4si (TARGET_SSE2) 2137 #define HAVE_vec_unpacku_float_hi_v8si (TARGET_AVX) 2138 #define HAVE_vec_unpacku_float_lo_v8si (TARGET_AVX) 2139 #define HAVE_vec_pack_trunc_v4df (TARGET_AVX) 2140 #define HAVE_vec_pack_trunc_v2df (TARGET_SSE2) 2141 #define HAVE_vec_pack_sfix_trunc_v4df (TARGET_AVX) 2142 #define HAVE_vec_pack_sfix_trunc_v2df (TARGET_SSE2) 2143 #define HAVE_vec_pack_ufix_trunc_v4df ((TARGET_SSE2) && (TARGET_AVX)) 2144 #define HAVE_vec_pack_ufix_trunc_v2df (TARGET_SSE2) 2145 #define HAVE_vec_pack_sfix_v4df (TARGET_AVX) 2146 #define HAVE_vec_pack_sfix_v2df (TARGET_SSE2) 2147 #define HAVE_sse_movhlps_exp (TARGET_SSE) 2148 #define HAVE_sse_movlhps_exp (TARGET_SSE) 2149 #define HAVE_vec_interleave_highv8sf (TARGET_AVX) 2150 #define HAVE_vec_interleave_lowv8sf (TARGET_AVX) 2151 #define HAVE_avx_shufps256 (TARGET_AVX) 2152 #define HAVE_sse_shufps (TARGET_SSE) 2153 #define HAVE_sse_loadhps_exp (TARGET_SSE) 2154 #define HAVE_sse_loadlps_exp (TARGET_SSE) 2155 #define HAVE_vec_initv16qi (TARGET_SSE) 2156 #define HAVE_vec_initv8hi (TARGET_SSE) 2157 #define HAVE_vec_initv4si (TARGET_SSE) 2158 #define HAVE_vec_initv2di (TARGET_SSE) 2159 #define HAVE_vec_initv4sf (TARGET_SSE) 2160 #define HAVE_vec_initv2df ((TARGET_SSE) && (TARGET_SSE2)) 2161 #define HAVE_vec_setv32qi ((TARGET_SSE) && (TARGET_AVX)) 2162 #define HAVE_vec_setv16qi (TARGET_SSE) 2163 #define HAVE_vec_setv16hi ((TARGET_SSE) && (TARGET_AVX)) 2164 #define HAVE_vec_setv8hi (TARGET_SSE) 2165 #define HAVE_vec_setv8si ((TARGET_SSE) && (TARGET_AVX)) 2166 #define HAVE_vec_setv4si (TARGET_SSE) 2167 #define HAVE_vec_setv4di ((TARGET_SSE) && (TARGET_AVX)) 2168 #define HAVE_vec_setv2di (TARGET_SSE) 2169 #define HAVE_vec_setv8sf ((TARGET_SSE) && (TARGET_AVX)) 2170 #define HAVE_vec_setv4sf (TARGET_SSE) 2171 #define HAVE_vec_setv4df ((TARGET_SSE) && (TARGET_AVX)) 2172 #define HAVE_vec_setv2df ((TARGET_SSE) && (TARGET_SSE2)) 2173 #define HAVE_avx_vextractf128v32qi (TARGET_AVX) 2174 #define HAVE_avx_vextractf128v16hi (TARGET_AVX) 2175 #define HAVE_avx_vextractf128v8si (TARGET_AVX) 2176 #define HAVE_avx_vextractf128v4di (TARGET_AVX) 2177 #define HAVE_avx_vextractf128v8sf (TARGET_AVX) 2178 #define HAVE_avx_vextractf128v4df (TARGET_AVX) 2179 #define HAVE_vec_extractv32qi ((TARGET_SSE) && (TARGET_AVX)) 2180 #define HAVE_vec_extractv16qi (TARGET_SSE) 2181 #define HAVE_vec_extractv16hi ((TARGET_SSE) && (TARGET_AVX)) 2182 #define HAVE_vec_extractv8hi (TARGET_SSE) 2183 #define HAVE_vec_extractv8si ((TARGET_SSE) && (TARGET_AVX)) 2184 #define HAVE_vec_extractv4si (TARGET_SSE) 2185 #define HAVE_vec_extractv4di ((TARGET_SSE) && (TARGET_AVX)) 2186 #define HAVE_vec_extractv2di (TARGET_SSE) 2187 #define HAVE_vec_extractv8sf ((TARGET_SSE) && (TARGET_AVX)) 2188 #define HAVE_vec_extractv4sf (TARGET_SSE) 2189 #define HAVE_vec_extractv4df ((TARGET_SSE) && (TARGET_AVX)) 2190 #define HAVE_vec_extractv2df (TARGET_SSE) 2191 #define HAVE_vec_interleave_highv4df (TARGET_AVX) 2192 #define HAVE_vec_interleave_highv2df (TARGET_SSE2) 2193 #define HAVE_avx_movddup256 (TARGET_AVX) 2194 #define HAVE_avx_unpcklpd256 (TARGET_AVX) 2195 #define HAVE_vec_interleave_lowv4df (TARGET_AVX) 2196 #define HAVE_vec_interleave_lowv2df (TARGET_SSE2) 2197 #define HAVE_avx_shufpd256 (TARGET_AVX) 2198 #define HAVE_sse2_shufpd (TARGET_SSE2) 2199 #define HAVE_sse2_loadhpd_exp (TARGET_SSE2) 2200 #define HAVE_sse2_loadlpd_exp (TARGET_SSE2) 2201 #define HAVE_negv32qi2 ((TARGET_SSE2) && (TARGET_AVX2)) 2202 #define HAVE_negv16qi2 (TARGET_SSE2) 2203 #define HAVE_negv16hi2 ((TARGET_SSE2) && (TARGET_AVX2)) 2204 #define HAVE_negv8hi2 (TARGET_SSE2) 2205 #define HAVE_negv8si2 ((TARGET_SSE2) && (TARGET_AVX2)) 2206 #define HAVE_negv4si2 (TARGET_SSE2) 2207 #define HAVE_negv4di2 ((TARGET_SSE2) && (TARGET_AVX2)) 2208 #define HAVE_negv2di2 (TARGET_SSE2) 2209 #define HAVE_addv32qi3 ((TARGET_SSE2) && (TARGET_AVX2)) 2210 #define HAVE_subv32qi3 ((TARGET_SSE2) && (TARGET_AVX2)) 2211 #define HAVE_addv16qi3 (TARGET_SSE2) 2212 #define HAVE_subv16qi3 (TARGET_SSE2) 2213 #define HAVE_addv16hi3 ((TARGET_SSE2) && (TARGET_AVX2)) 2214 #define HAVE_subv16hi3 ((TARGET_SSE2) && (TARGET_AVX2)) 2215 #define HAVE_addv8hi3 (TARGET_SSE2) 2216 #define HAVE_subv8hi3 (TARGET_SSE2) 2217 #define HAVE_addv8si3 ((TARGET_SSE2) && (TARGET_AVX2)) 2218 #define HAVE_subv8si3 ((TARGET_SSE2) && (TARGET_AVX2)) 2219 #define HAVE_addv4si3 (TARGET_SSE2) 2220 #define HAVE_subv4si3 (TARGET_SSE2) 2221 #define HAVE_addv4di3 ((TARGET_SSE2) && (TARGET_AVX2)) 2222 #define HAVE_subv4di3 ((TARGET_SSE2) && (TARGET_AVX2)) 2223 #define HAVE_addv2di3 (TARGET_SSE2) 2224 #define HAVE_subv2di3 (TARGET_SSE2) 2225 #define HAVE_avx2_ssaddv32qi3 ((TARGET_SSE2) && (TARGET_AVX2)) 2226 #define HAVE_avx2_usaddv32qi3 ((TARGET_SSE2) && (TARGET_AVX2)) 2227 #define HAVE_avx2_sssubv32qi3 ((TARGET_SSE2) && (TARGET_AVX2)) 2228 #define HAVE_avx2_ussubv32qi3 ((TARGET_SSE2) && (TARGET_AVX2)) 2229 #define HAVE_sse2_ssaddv16qi3 (TARGET_SSE2) 2230 #define HAVE_sse2_usaddv16qi3 (TARGET_SSE2) 2231 #define HAVE_sse2_sssubv16qi3 (TARGET_SSE2) 2232 #define HAVE_sse2_ussubv16qi3 (TARGET_SSE2) 2233 #define HAVE_avx2_ssaddv16hi3 ((TARGET_SSE2) && (TARGET_AVX2)) 2234 #define HAVE_avx2_usaddv16hi3 ((TARGET_SSE2) && (TARGET_AVX2)) 2235 #define HAVE_avx2_sssubv16hi3 ((TARGET_SSE2) && (TARGET_AVX2)) 2236 #define HAVE_avx2_ussubv16hi3 ((TARGET_SSE2) && (TARGET_AVX2)) 2237 #define HAVE_sse2_ssaddv8hi3 (TARGET_SSE2) 2238 #define HAVE_sse2_usaddv8hi3 (TARGET_SSE2) 2239 #define HAVE_sse2_sssubv8hi3 (TARGET_SSE2) 2240 #define HAVE_sse2_ussubv8hi3 (TARGET_SSE2) 2241 #define HAVE_mulv32qi3 ((TARGET_SSE2) && (TARGET_AVX2)) 2242 #define HAVE_mulv16qi3 (TARGET_SSE2) 2243 #define HAVE_mulv16hi3 ((TARGET_SSE2) && (TARGET_AVX2)) 2244 #define HAVE_mulv8hi3 (TARGET_SSE2) 2245 #define HAVE_smulv16hi3_highpart ((TARGET_SSE2) && (TARGET_AVX2)) 2246 #define HAVE_umulv16hi3_highpart ((TARGET_SSE2) && (TARGET_AVX2)) 2247 #define HAVE_smulv8hi3_highpart (TARGET_SSE2) 2248 #define HAVE_umulv8hi3_highpart (TARGET_SSE2) 2249 #define HAVE_vec_widen_umult_even_v8si (TARGET_AVX2) 2250 #define HAVE_vec_widen_umult_even_v4si (TARGET_SSE2) 2251 #define HAVE_vec_widen_smult_even_v8si (TARGET_AVX2) 2252 #define HAVE_sse4_1_mulv2siv2di3 (TARGET_SSE4_1) 2253 #define HAVE_avx2_pmaddwd (TARGET_AVX2) 2254 #define HAVE_sse2_pmaddwd (TARGET_SSE2) 2255 #define HAVE_mulv8si3 ((TARGET_SSE2) && (TARGET_AVX2)) 2256 #define HAVE_mulv4si3 (TARGET_SSE2) 2257 #define HAVE_mulv4di3 ((TARGET_SSE2) && (TARGET_AVX2)) 2258 #define HAVE_mulv2di3 (TARGET_SSE2) 2259 #define HAVE_vec_widen_smult_hi_v32qi ((TARGET_SSE2) && (TARGET_AVX2)) 2260 #define HAVE_vec_widen_umult_hi_v32qi ((TARGET_SSE2) && (TARGET_AVX2)) 2261 #define HAVE_vec_widen_smult_hi_v16qi (TARGET_SSE2) 2262 #define HAVE_vec_widen_umult_hi_v16qi (TARGET_SSE2) 2263 #define HAVE_vec_widen_smult_hi_v16hi ((TARGET_SSE2) && (TARGET_AVX2)) 2264 #define HAVE_vec_widen_umult_hi_v16hi ((TARGET_SSE2) && (TARGET_AVX2)) 2265 #define HAVE_vec_widen_smult_hi_v8hi (TARGET_SSE2) 2266 #define HAVE_vec_widen_umult_hi_v8hi (TARGET_SSE2) 2267 #define HAVE_vec_widen_smult_hi_v8si ((TARGET_SSE2) && (TARGET_AVX2)) 2268 #define HAVE_vec_widen_umult_hi_v8si ((TARGET_SSE2) && (TARGET_AVX2)) 2269 #define HAVE_vec_widen_smult_hi_v4si (TARGET_SSE2) 2270 #define HAVE_vec_widen_umult_hi_v4si (TARGET_SSE2) 2271 #define HAVE_vec_widen_smult_lo_v32qi ((TARGET_SSE2) && (TARGET_AVX2)) 2272 #define HAVE_vec_widen_umult_lo_v32qi ((TARGET_SSE2) && (TARGET_AVX2)) 2273 #define HAVE_vec_widen_smult_lo_v16qi (TARGET_SSE2) 2274 #define HAVE_vec_widen_umult_lo_v16qi (TARGET_SSE2) 2275 #define HAVE_vec_widen_smult_lo_v16hi ((TARGET_SSE2) && (TARGET_AVX2)) 2276 #define HAVE_vec_widen_umult_lo_v16hi ((TARGET_SSE2) && (TARGET_AVX2)) 2277 #define HAVE_vec_widen_smult_lo_v8hi (TARGET_SSE2) 2278 #define HAVE_vec_widen_umult_lo_v8hi (TARGET_SSE2) 2279 #define HAVE_vec_widen_smult_lo_v8si ((TARGET_SSE2) && (TARGET_AVX2)) 2280 #define HAVE_vec_widen_umult_lo_v8si ((TARGET_SSE2) && (TARGET_AVX2)) 2281 #define HAVE_vec_widen_smult_lo_v4si (TARGET_SSE2) 2282 #define HAVE_vec_widen_umult_lo_v4si (TARGET_SSE2) 2283 #define HAVE_vec_widen_smult_even_v4si (TARGET_SSE2) 2284 #define HAVE_vec_widen_smult_odd_v8si ((TARGET_SSE2) && (TARGET_AVX2)) 2285 #define HAVE_vec_widen_umult_odd_v8si ((TARGET_SSE2) && (TARGET_AVX2)) 2286 #define HAVE_vec_widen_smult_odd_v4si (TARGET_SSE2) 2287 #define HAVE_vec_widen_umult_odd_v4si (TARGET_SSE2) 2288 #define HAVE_sdot_prodv16hi ((TARGET_SSE2) && (TARGET_AVX2)) 2289 #define HAVE_sdot_prodv8hi (TARGET_SSE2) 2290 #define HAVE_sdot_prodv4si (TARGET_XOP) 2291 #define HAVE_vec_shl_v16qi (TARGET_SSE2) 2292 #define HAVE_vec_shl_v8hi (TARGET_SSE2) 2293 #define HAVE_vec_shl_v4si (TARGET_SSE2) 2294 #define HAVE_vec_shl_v2di (TARGET_SSE2) 2295 #define HAVE_vec_shr_v16qi (TARGET_SSE2) 2296 #define HAVE_vec_shr_v8hi (TARGET_SSE2) 2297 #define HAVE_vec_shr_v4si (TARGET_SSE2) 2298 #define HAVE_vec_shr_v2di (TARGET_SSE2) 2299 #define HAVE_smaxv32qi3 (TARGET_AVX2) 2300 #define HAVE_sminv32qi3 (TARGET_AVX2) 2301 #define HAVE_umaxv32qi3 (TARGET_AVX2) 2302 #define HAVE_uminv32qi3 (TARGET_AVX2) 2303 #define HAVE_smaxv16hi3 (TARGET_AVX2) 2304 #define HAVE_sminv16hi3 (TARGET_AVX2) 2305 #define HAVE_umaxv16hi3 (TARGET_AVX2) 2306 #define HAVE_uminv16hi3 (TARGET_AVX2) 2307 #define HAVE_smaxv8si3 (TARGET_AVX2) 2308 #define HAVE_sminv8si3 (TARGET_AVX2) 2309 #define HAVE_umaxv8si3 (TARGET_AVX2) 2310 #define HAVE_uminv8si3 (TARGET_AVX2) 2311 #define HAVE_smaxv4di3 ((TARGET_SSE4_2) && (TARGET_AVX2)) 2312 #define HAVE_sminv4di3 ((TARGET_SSE4_2) && (TARGET_AVX2)) 2313 #define HAVE_umaxv4di3 ((TARGET_SSE4_2) && (TARGET_AVX2)) 2314 #define HAVE_uminv4di3 ((TARGET_SSE4_2) && (TARGET_AVX2)) 2315 #define HAVE_smaxv2di3 (TARGET_SSE4_2) 2316 #define HAVE_sminv2di3 (TARGET_SSE4_2) 2317 #define HAVE_umaxv2di3 (TARGET_SSE4_2) 2318 #define HAVE_uminv2di3 (TARGET_SSE4_2) 2319 #define HAVE_smaxv16qi3 (TARGET_SSE2) 2320 #define HAVE_sminv16qi3 (TARGET_SSE2) 2321 #define HAVE_smaxv8hi3 (TARGET_SSE2) 2322 #define HAVE_sminv8hi3 (TARGET_SSE2) 2323 #define HAVE_smaxv4si3 (TARGET_SSE2) 2324 #define HAVE_sminv4si3 (TARGET_SSE2) 2325 #define HAVE_umaxv16qi3 (TARGET_SSE2) 2326 #define HAVE_uminv16qi3 (TARGET_SSE2) 2327 #define HAVE_umaxv8hi3 (TARGET_SSE2) 2328 #define HAVE_uminv8hi3 (TARGET_SSE2) 2329 #define HAVE_umaxv4si3 (TARGET_SSE2) 2330 #define HAVE_uminv4si3 (TARGET_SSE2) 2331 #define HAVE_avx2_eqv32qi3 (TARGET_AVX2) 2332 #define HAVE_avx2_eqv16hi3 (TARGET_AVX2) 2333 #define HAVE_avx2_eqv8si3 (TARGET_AVX2) 2334 #define HAVE_avx2_eqv4di3 (TARGET_AVX2) 2335 #define HAVE_sse2_eqv16qi3 (TARGET_SSE2 && !TARGET_XOP ) 2336 #define HAVE_sse2_eqv8hi3 (TARGET_SSE2 && !TARGET_XOP ) 2337 #define HAVE_sse2_eqv4si3 (TARGET_SSE2 && !TARGET_XOP ) 2338 #define HAVE_sse4_1_eqv2di3 (TARGET_SSE4_1) 2339 #define HAVE_vcondv32qiv32qi (TARGET_AVX2 \ 2340 && (GET_MODE_NUNITS (V32QImode) \ 2341 == GET_MODE_NUNITS (V32QImode))) 2342 #define HAVE_vcondv16hiv32qi (TARGET_AVX2 \ 2343 && (GET_MODE_NUNITS (V16HImode) \ 2344 == GET_MODE_NUNITS (V32QImode))) 2345 #define HAVE_vcondv8siv32qi (TARGET_AVX2 \ 2346 && (GET_MODE_NUNITS (V8SImode) \ 2347 == GET_MODE_NUNITS (V32QImode))) 2348 #define HAVE_vcondv4div32qi (TARGET_AVX2 \ 2349 && (GET_MODE_NUNITS (V4DImode) \ 2350 == GET_MODE_NUNITS (V32QImode))) 2351 #define HAVE_vcondv8sfv32qi (TARGET_AVX2 \ 2352 && (GET_MODE_NUNITS (V8SFmode) \ 2353 == GET_MODE_NUNITS (V32QImode))) 2354 #define HAVE_vcondv4dfv32qi (TARGET_AVX2 \ 2355 && (GET_MODE_NUNITS (V4DFmode) \ 2356 == GET_MODE_NUNITS (V32QImode))) 2357 #define HAVE_vcondv32qiv16hi (TARGET_AVX2 \ 2358 && (GET_MODE_NUNITS (V32QImode) \ 2359 == GET_MODE_NUNITS (V16HImode))) 2360 #define HAVE_vcondv16hiv16hi (TARGET_AVX2 \ 2361 && (GET_MODE_NUNITS (V16HImode) \ 2362 == GET_MODE_NUNITS (V16HImode))) 2363 #define HAVE_vcondv8siv16hi (TARGET_AVX2 \ 2364 && (GET_MODE_NUNITS (V8SImode) \ 2365 == GET_MODE_NUNITS (V16HImode))) 2366 #define HAVE_vcondv4div16hi (TARGET_AVX2 \ 2367 && (GET_MODE_NUNITS (V4DImode) \ 2368 == GET_MODE_NUNITS (V16HImode))) 2369 #define HAVE_vcondv8sfv16hi (TARGET_AVX2 \ 2370 && (GET_MODE_NUNITS (V8SFmode) \ 2371 == GET_MODE_NUNITS (V16HImode))) 2372 #define HAVE_vcondv4dfv16hi (TARGET_AVX2 \ 2373 && (GET_MODE_NUNITS (V4DFmode) \ 2374 == GET_MODE_NUNITS (V16HImode))) 2375 #define HAVE_vcondv32qiv8si (TARGET_AVX2 \ 2376 && (GET_MODE_NUNITS (V32QImode) \ 2377 == GET_MODE_NUNITS (V8SImode))) 2378 #define HAVE_vcondv16hiv8si (TARGET_AVX2 \ 2379 && (GET_MODE_NUNITS (V16HImode) \ 2380 == GET_MODE_NUNITS (V8SImode))) 2381 #define HAVE_vcondv8siv8si (TARGET_AVX2 \ 2382 && (GET_MODE_NUNITS (V8SImode) \ 2383 == GET_MODE_NUNITS (V8SImode))) 2384 #define HAVE_vcondv4div8si (TARGET_AVX2 \ 2385 && (GET_MODE_NUNITS (V4DImode) \ 2386 == GET_MODE_NUNITS (V8SImode))) 2387 #define HAVE_vcondv8sfv8si (TARGET_AVX2 \ 2388 && (GET_MODE_NUNITS (V8SFmode) \ 2389 == GET_MODE_NUNITS (V8SImode))) 2390 #define HAVE_vcondv4dfv8si (TARGET_AVX2 \ 2391 && (GET_MODE_NUNITS (V4DFmode) \ 2392 == GET_MODE_NUNITS (V8SImode))) 2393 #define HAVE_vcondv32qiv4di (TARGET_AVX2 \ 2394 && (GET_MODE_NUNITS (V32QImode) \ 2395 == GET_MODE_NUNITS (V4DImode))) 2396 #define HAVE_vcondv16hiv4di (TARGET_AVX2 \ 2397 && (GET_MODE_NUNITS (V16HImode) \ 2398 == GET_MODE_NUNITS (V4DImode))) 2399 #define HAVE_vcondv8siv4di (TARGET_AVX2 \ 2400 && (GET_MODE_NUNITS (V8SImode) \ 2401 == GET_MODE_NUNITS (V4DImode))) 2402 #define HAVE_vcondv4div4di (TARGET_AVX2 \ 2403 && (GET_MODE_NUNITS (V4DImode) \ 2404 == GET_MODE_NUNITS (V4DImode))) 2405 #define HAVE_vcondv8sfv4di (TARGET_AVX2 \ 2406 && (GET_MODE_NUNITS (V8SFmode) \ 2407 == GET_MODE_NUNITS (V4DImode))) 2408 #define HAVE_vcondv4dfv4di (TARGET_AVX2 \ 2409 && (GET_MODE_NUNITS (V4DFmode) \ 2410 == GET_MODE_NUNITS (V4DImode))) 2411 #define HAVE_vcondv16qiv16qi (TARGET_SSE2 \ 2412 && (GET_MODE_NUNITS (V16QImode) \ 2413 == GET_MODE_NUNITS (V16QImode))) 2414 #define HAVE_vcondv8hiv16qi (TARGET_SSE2 \ 2415 && (GET_MODE_NUNITS (V8HImode) \ 2416 == GET_MODE_NUNITS (V16QImode))) 2417 #define HAVE_vcondv4siv16qi (TARGET_SSE2 \ 2418 && (GET_MODE_NUNITS (V4SImode) \ 2419 == GET_MODE_NUNITS (V16QImode))) 2420 #define HAVE_vcondv2div16qi (TARGET_SSE2 \ 2421 && (GET_MODE_NUNITS (V2DImode) \ 2422 == GET_MODE_NUNITS (V16QImode))) 2423 #define HAVE_vcondv4sfv16qi (TARGET_SSE2 \ 2424 && (GET_MODE_NUNITS (V4SFmode) \ 2425 == GET_MODE_NUNITS (V16QImode))) 2426 #define HAVE_vcondv2dfv16qi ((TARGET_SSE2 \ 2427 && (GET_MODE_NUNITS (V2DFmode) \ 2428 == GET_MODE_NUNITS (V16QImode))) && (TARGET_SSE2)) 2429 #define HAVE_vcondv16qiv8hi (TARGET_SSE2 \ 2430 && (GET_MODE_NUNITS (V16QImode) \ 2431 == GET_MODE_NUNITS (V8HImode))) 2432 #define HAVE_vcondv8hiv8hi (TARGET_SSE2 \ 2433 && (GET_MODE_NUNITS (V8HImode) \ 2434 == GET_MODE_NUNITS (V8HImode))) 2435 #define HAVE_vcondv4siv8hi (TARGET_SSE2 \ 2436 && (GET_MODE_NUNITS (V4SImode) \ 2437 == GET_MODE_NUNITS (V8HImode))) 2438 #define HAVE_vcondv2div8hi (TARGET_SSE2 \ 2439 && (GET_MODE_NUNITS (V2DImode) \ 2440 == GET_MODE_NUNITS (V8HImode))) 2441 #define HAVE_vcondv4sfv8hi (TARGET_SSE2 \ 2442 && (GET_MODE_NUNITS (V4SFmode) \ 2443 == GET_MODE_NUNITS (V8HImode))) 2444 #define HAVE_vcondv2dfv8hi ((TARGET_SSE2 \ 2445 && (GET_MODE_NUNITS (V2DFmode) \ 2446 == GET_MODE_NUNITS (V8HImode))) && (TARGET_SSE2)) 2447 #define HAVE_vcondv16qiv4si (TARGET_SSE2 \ 2448 && (GET_MODE_NUNITS (V16QImode) \ 2449 == GET_MODE_NUNITS (V4SImode))) 2450 #define HAVE_vcondv8hiv4si (TARGET_SSE2 \ 2451 && (GET_MODE_NUNITS (V8HImode) \ 2452 == GET_MODE_NUNITS (V4SImode))) 2453 #define HAVE_vcondv4siv4si (TARGET_SSE2 \ 2454 && (GET_MODE_NUNITS (V4SImode) \ 2455 == GET_MODE_NUNITS (V4SImode))) 2456 #define HAVE_vcondv2div4si (TARGET_SSE2 \ 2457 && (GET_MODE_NUNITS (V2DImode) \ 2458 == GET_MODE_NUNITS (V4SImode))) 2459 #define HAVE_vcondv4sfv4si (TARGET_SSE2 \ 2460 && (GET_MODE_NUNITS (V4SFmode) \ 2461 == GET_MODE_NUNITS (V4SImode))) 2462 #define HAVE_vcondv2dfv4si ((TARGET_SSE2 \ 2463 && (GET_MODE_NUNITS (V2DFmode) \ 2464 == GET_MODE_NUNITS (V4SImode))) && (TARGET_SSE2)) 2465 #define HAVE_vcondv2div2di (TARGET_SSE4_2) 2466 #define HAVE_vcondv2dfv2di (TARGET_SSE4_2) 2467 #define HAVE_vconduv32qiv32qi (TARGET_AVX2 \ 2468 && (GET_MODE_NUNITS (V32QImode) \ 2469 == GET_MODE_NUNITS (V32QImode))) 2470 #define HAVE_vconduv16hiv32qi (TARGET_AVX2 \ 2471 && (GET_MODE_NUNITS (V16HImode) \ 2472 == GET_MODE_NUNITS (V32QImode))) 2473 #define HAVE_vconduv8siv32qi (TARGET_AVX2 \ 2474 && (GET_MODE_NUNITS (V8SImode) \ 2475 == GET_MODE_NUNITS (V32QImode))) 2476 #define HAVE_vconduv4div32qi (TARGET_AVX2 \ 2477 && (GET_MODE_NUNITS (V4DImode) \ 2478 == GET_MODE_NUNITS (V32QImode))) 2479 #define HAVE_vconduv8sfv32qi (TARGET_AVX2 \ 2480 && (GET_MODE_NUNITS (V8SFmode) \ 2481 == GET_MODE_NUNITS (V32QImode))) 2482 #define HAVE_vconduv4dfv32qi (TARGET_AVX2 \ 2483 && (GET_MODE_NUNITS (V4DFmode) \ 2484 == GET_MODE_NUNITS (V32QImode))) 2485 #define HAVE_vconduv32qiv16hi (TARGET_AVX2 \ 2486 && (GET_MODE_NUNITS (V32QImode) \ 2487 == GET_MODE_NUNITS (V16HImode))) 2488 #define HAVE_vconduv16hiv16hi (TARGET_AVX2 \ 2489 && (GET_MODE_NUNITS (V16HImode) \ 2490 == GET_MODE_NUNITS (V16HImode))) 2491 #define HAVE_vconduv8siv16hi (TARGET_AVX2 \ 2492 && (GET_MODE_NUNITS (V8SImode) \ 2493 == GET_MODE_NUNITS (V16HImode))) 2494 #define HAVE_vconduv4div16hi (TARGET_AVX2 \ 2495 && (GET_MODE_NUNITS (V4DImode) \ 2496 == GET_MODE_NUNITS (V16HImode))) 2497 #define HAVE_vconduv8sfv16hi (TARGET_AVX2 \ 2498 && (GET_MODE_NUNITS (V8SFmode) \ 2499 == GET_MODE_NUNITS (V16HImode))) 2500 #define HAVE_vconduv4dfv16hi (TARGET_AVX2 \ 2501 && (GET_MODE_NUNITS (V4DFmode) \ 2502 == GET_MODE_NUNITS (V16HImode))) 2503 #define HAVE_vconduv32qiv8si (TARGET_AVX2 \ 2504 && (GET_MODE_NUNITS (V32QImode) \ 2505 == GET_MODE_NUNITS (V8SImode))) 2506 #define HAVE_vconduv16hiv8si (TARGET_AVX2 \ 2507 && (GET_MODE_NUNITS (V16HImode) \ 2508 == GET_MODE_NUNITS (V8SImode))) 2509 #define HAVE_vconduv8siv8si (TARGET_AVX2 \ 2510 && (GET_MODE_NUNITS (V8SImode) \ 2511 == GET_MODE_NUNITS (V8SImode))) 2512 #define HAVE_vconduv4div8si (TARGET_AVX2 \ 2513 && (GET_MODE_NUNITS (V4DImode) \ 2514 == GET_MODE_NUNITS (V8SImode))) 2515 #define HAVE_vconduv8sfv8si (TARGET_AVX2 \ 2516 && (GET_MODE_NUNITS (V8SFmode) \ 2517 == GET_MODE_NUNITS (V8SImode))) 2518 #define HAVE_vconduv4dfv8si (TARGET_AVX2 \ 2519 && (GET_MODE_NUNITS (V4DFmode) \ 2520 == GET_MODE_NUNITS (V8SImode))) 2521 #define HAVE_vconduv32qiv4di (TARGET_AVX2 \ 2522 && (GET_MODE_NUNITS (V32QImode) \ 2523 == GET_MODE_NUNITS (V4DImode))) 2524 #define HAVE_vconduv16hiv4di (TARGET_AVX2 \ 2525 && (GET_MODE_NUNITS (V16HImode) \ 2526 == GET_MODE_NUNITS (V4DImode))) 2527 #define HAVE_vconduv8siv4di (TARGET_AVX2 \ 2528 && (GET_MODE_NUNITS (V8SImode) \ 2529 == GET_MODE_NUNITS (V4DImode))) 2530 #define HAVE_vconduv4div4di (TARGET_AVX2 \ 2531 && (GET_MODE_NUNITS (V4DImode) \ 2532 == GET_MODE_NUNITS (V4DImode))) 2533 #define HAVE_vconduv8sfv4di (TARGET_AVX2 \ 2534 && (GET_MODE_NUNITS (V8SFmode) \ 2535 == GET_MODE_NUNITS (V4DImode))) 2536 #define HAVE_vconduv4dfv4di (TARGET_AVX2 \ 2537 && (GET_MODE_NUNITS (V4DFmode) \ 2538 == GET_MODE_NUNITS (V4DImode))) 2539 #define HAVE_vconduv16qiv16qi (TARGET_SSE2 \ 2540 && (GET_MODE_NUNITS (V16QImode) \ 2541 == GET_MODE_NUNITS (V16QImode))) 2542 #define HAVE_vconduv8hiv16qi (TARGET_SSE2 \ 2543 && (GET_MODE_NUNITS (V8HImode) \ 2544 == GET_MODE_NUNITS (V16QImode))) 2545 #define HAVE_vconduv4siv16qi (TARGET_SSE2 \ 2546 && (GET_MODE_NUNITS (V4SImode) \ 2547 == GET_MODE_NUNITS (V16QImode))) 2548 #define HAVE_vconduv2div16qi (TARGET_SSE2 \ 2549 && (GET_MODE_NUNITS (V2DImode) \ 2550 == GET_MODE_NUNITS (V16QImode))) 2551 #define HAVE_vconduv4sfv16qi (TARGET_SSE2 \ 2552 && (GET_MODE_NUNITS (V4SFmode) \ 2553 == GET_MODE_NUNITS (V16QImode))) 2554 #define HAVE_vconduv2dfv16qi ((TARGET_SSE2 \ 2555 && (GET_MODE_NUNITS (V2DFmode) \ 2556 == GET_MODE_NUNITS (V16QImode))) && (TARGET_SSE2)) 2557 #define HAVE_vconduv16qiv8hi (TARGET_SSE2 \ 2558 && (GET_MODE_NUNITS (V16QImode) \ 2559 == GET_MODE_NUNITS (V8HImode))) 2560 #define HAVE_vconduv8hiv8hi (TARGET_SSE2 \ 2561 && (GET_MODE_NUNITS (V8HImode) \ 2562 == GET_MODE_NUNITS (V8HImode))) 2563 #define HAVE_vconduv4siv8hi (TARGET_SSE2 \ 2564 && (GET_MODE_NUNITS (V4SImode) \ 2565 == GET_MODE_NUNITS (V8HImode))) 2566 #define HAVE_vconduv2div8hi (TARGET_SSE2 \ 2567 && (GET_MODE_NUNITS (V2DImode) \ 2568 == GET_MODE_NUNITS (V8HImode))) 2569 #define HAVE_vconduv4sfv8hi (TARGET_SSE2 \ 2570 && (GET_MODE_NUNITS (V4SFmode) \ 2571 == GET_MODE_NUNITS (V8HImode))) 2572 #define HAVE_vconduv2dfv8hi ((TARGET_SSE2 \ 2573 && (GET_MODE_NUNITS (V2DFmode) \ 2574 == GET_MODE_NUNITS (V8HImode))) && (TARGET_SSE2)) 2575 #define HAVE_vconduv16qiv4si (TARGET_SSE2 \ 2576 && (GET_MODE_NUNITS (V16QImode) \ 2577 == GET_MODE_NUNITS (V4SImode))) 2578 #define HAVE_vconduv8hiv4si (TARGET_SSE2 \ 2579 && (GET_MODE_NUNITS (V8HImode) \ 2580 == GET_MODE_NUNITS (V4SImode))) 2581 #define HAVE_vconduv4siv4si (TARGET_SSE2 \ 2582 && (GET_MODE_NUNITS (V4SImode) \ 2583 == GET_MODE_NUNITS (V4SImode))) 2584 #define HAVE_vconduv2div4si (TARGET_SSE2 \ 2585 && (GET_MODE_NUNITS (V2DImode) \ 2586 == GET_MODE_NUNITS (V4SImode))) 2587 #define HAVE_vconduv4sfv4si (TARGET_SSE2 \ 2588 && (GET_MODE_NUNITS (V4SFmode) \ 2589 == GET_MODE_NUNITS (V4SImode))) 2590 #define HAVE_vconduv2dfv4si ((TARGET_SSE2 \ 2591 && (GET_MODE_NUNITS (V2DFmode) \ 2592 == GET_MODE_NUNITS (V4SImode))) && (TARGET_SSE2)) 2593 #define HAVE_vconduv2div2di (TARGET_SSE4_2) 2594 #define HAVE_vconduv2dfv2di (TARGET_SSE4_2) 2595 #define HAVE_vec_permv16qi (TARGET_SSSE3 || TARGET_AVX || TARGET_XOP) 2596 #define HAVE_vec_permv8hi (TARGET_SSSE3 || TARGET_AVX || TARGET_XOP) 2597 #define HAVE_vec_permv4si (TARGET_SSSE3 || TARGET_AVX || TARGET_XOP) 2598 #define HAVE_vec_permv2di (TARGET_SSSE3 || TARGET_AVX || TARGET_XOP) 2599 #define HAVE_vec_permv4sf (TARGET_SSSE3 || TARGET_AVX || TARGET_XOP) 2600 #define HAVE_vec_permv2df (TARGET_SSSE3 || TARGET_AVX || TARGET_XOP) 2601 #define HAVE_vec_permv32qi ((TARGET_SSSE3 || TARGET_AVX || TARGET_XOP) && (TARGET_AVX2)) 2602 #define HAVE_vec_permv16hi ((TARGET_SSSE3 || TARGET_AVX || TARGET_XOP) && (TARGET_AVX2)) 2603 #define HAVE_vec_permv8si ((TARGET_SSSE3 || TARGET_AVX || TARGET_XOP) && (TARGET_AVX2)) 2604 #define HAVE_vec_permv4di ((TARGET_SSSE3 || TARGET_AVX || TARGET_XOP) && (TARGET_AVX2)) 2605 #define HAVE_vec_permv8sf ((TARGET_SSSE3 || TARGET_AVX || TARGET_XOP) && (TARGET_AVX2)) 2606 #define HAVE_vec_permv4df ((TARGET_SSSE3 || TARGET_AVX || TARGET_XOP) && (TARGET_AVX2)) 2607 #define HAVE_vec_perm_constv4sf (TARGET_SSE) 2608 #define HAVE_vec_perm_constv4si (TARGET_SSE) 2609 #define HAVE_vec_perm_constv2df (TARGET_SSE) 2610 #define HAVE_vec_perm_constv2di (TARGET_SSE) 2611 #define HAVE_vec_perm_constv16qi (TARGET_SSE2) 2612 #define HAVE_vec_perm_constv8hi (TARGET_SSE2) 2613 #define HAVE_vec_perm_constv8sf (TARGET_AVX) 2614 #define HAVE_vec_perm_constv4df (TARGET_AVX) 2615 #define HAVE_vec_perm_constv8si (TARGET_AVX) 2616 #define HAVE_vec_perm_constv4di (TARGET_AVX) 2617 #define HAVE_vec_perm_constv32qi (TARGET_AVX2) 2618 #define HAVE_vec_perm_constv16hi (TARGET_AVX2) 2619 #define HAVE_one_cmplv32qi2 ((TARGET_SSE) && (TARGET_AVX)) 2620 #define HAVE_one_cmplv16qi2 (TARGET_SSE) 2621 #define HAVE_one_cmplv16hi2 ((TARGET_SSE) && (TARGET_AVX)) 2622 #define HAVE_one_cmplv8hi2 (TARGET_SSE) 2623 #define HAVE_one_cmplv8si2 ((TARGET_SSE) && (TARGET_AVX)) 2624 #define HAVE_one_cmplv4si2 (TARGET_SSE) 2625 #define HAVE_one_cmplv4di2 ((TARGET_SSE) && (TARGET_AVX)) 2626 #define HAVE_one_cmplv2di2 (TARGET_SSE) 2627 #define HAVE_avx2_andnotv32qi3 ((TARGET_SSE2) && (TARGET_AVX2)) 2628 #define HAVE_sse2_andnotv16qi3 (TARGET_SSE2) 2629 #define HAVE_avx2_andnotv16hi3 ((TARGET_SSE2) && (TARGET_AVX2)) 2630 #define HAVE_sse2_andnotv8hi3 (TARGET_SSE2) 2631 #define HAVE_avx2_andnotv8si3 ((TARGET_SSE2) && (TARGET_AVX2)) 2632 #define HAVE_sse2_andnotv4si3 (TARGET_SSE2) 2633 #define HAVE_avx2_andnotv4di3 ((TARGET_SSE2) && (TARGET_AVX2)) 2634 #define HAVE_sse2_andnotv2di3 (TARGET_SSE2) 2635 #define HAVE_andv32qi3 ((TARGET_SSE) && (TARGET_AVX)) 2636 #define HAVE_iorv32qi3 ((TARGET_SSE) && (TARGET_AVX)) 2637 #define HAVE_xorv32qi3 ((TARGET_SSE) && (TARGET_AVX)) 2638 #define HAVE_andv16qi3 (TARGET_SSE) 2639 #define HAVE_iorv16qi3 (TARGET_SSE) 2640 #define HAVE_xorv16qi3 (TARGET_SSE) 2641 #define HAVE_andv16hi3 ((TARGET_SSE) && (TARGET_AVX)) 2642 #define HAVE_iorv16hi3 ((TARGET_SSE) && (TARGET_AVX)) 2643 #define HAVE_xorv16hi3 ((TARGET_SSE) && (TARGET_AVX)) 2644 #define HAVE_andv8hi3 (TARGET_SSE) 2645 #define HAVE_iorv8hi3 (TARGET_SSE) 2646 #define HAVE_xorv8hi3 (TARGET_SSE) 2647 #define HAVE_andv8si3 ((TARGET_SSE) && (TARGET_AVX)) 2648 #define HAVE_iorv8si3 ((TARGET_SSE) && (TARGET_AVX)) 2649 #define HAVE_xorv8si3 ((TARGET_SSE) && (TARGET_AVX)) 2650 #define HAVE_andv4si3 (TARGET_SSE) 2651 #define HAVE_iorv4si3 (TARGET_SSE) 2652 #define HAVE_xorv4si3 (TARGET_SSE) 2653 #define HAVE_andv4di3 ((TARGET_SSE) && (TARGET_AVX)) 2654 #define HAVE_iorv4di3 ((TARGET_SSE) && (TARGET_AVX)) 2655 #define HAVE_xorv4di3 ((TARGET_SSE) && (TARGET_AVX)) 2656 #define HAVE_andv2di3 (TARGET_SSE) 2657 #define HAVE_iorv2di3 (TARGET_SSE) 2658 #define HAVE_xorv2di3 (TARGET_SSE) 2659 #define HAVE_vec_pack_trunc_v16hi ((TARGET_SSE2) && (TARGET_AVX2)) 2660 #define HAVE_vec_pack_trunc_v8hi (TARGET_SSE2) 2661 #define HAVE_vec_pack_trunc_v8si ((TARGET_SSE2) && (TARGET_AVX2)) 2662 #define HAVE_vec_pack_trunc_v4si (TARGET_SSE2) 2663 #define HAVE_vec_pack_trunc_v4di ((TARGET_SSE2) && (TARGET_AVX2)) 2664 #define HAVE_vec_pack_trunc_v2di (TARGET_SSE2) 2665 #define HAVE_vec_interleave_highv32qi (TARGET_AVX2) 2666 #define HAVE_vec_interleave_highv16hi (TARGET_AVX2) 2667 #define HAVE_vec_interleave_highv8si (TARGET_AVX2) 2668 #define HAVE_vec_interleave_highv4di (TARGET_AVX2) 2669 #define HAVE_vec_interleave_lowv32qi (TARGET_AVX2) 2670 #define HAVE_vec_interleave_lowv16hi (TARGET_AVX2) 2671 #define HAVE_vec_interleave_lowv8si (TARGET_AVX2) 2672 #define HAVE_vec_interleave_lowv4di (TARGET_AVX2) 2673 #define HAVE_avx2_pshufdv3 (TARGET_AVX2) 2674 #define HAVE_sse2_pshufd (TARGET_SSE2) 2675 #define HAVE_avx2_pshuflwv3 (TARGET_AVX2) 2676 #define HAVE_sse2_pshuflw (TARGET_SSE2) 2677 #define HAVE_avx2_pshufhwv3 (TARGET_AVX2) 2678 #define HAVE_sse2_pshufhw (TARGET_SSE2) 2679 #define HAVE_sse2_loadd (TARGET_SSE) 2680 #define HAVE_sse_storeq (TARGET_SSE) 2681 #define HAVE_vec_unpacks_lo_v32qi ((TARGET_SSE2) && (TARGET_AVX2)) 2682 #define HAVE_vec_unpacks_lo_v16qi (TARGET_SSE2) 2683 #define HAVE_vec_unpacks_lo_v16hi ((TARGET_SSE2) && (TARGET_AVX2)) 2684 #define HAVE_vec_unpacks_lo_v8hi (TARGET_SSE2) 2685 #define HAVE_vec_unpacks_lo_v8si ((TARGET_SSE2) && (TARGET_AVX2)) 2686 #define HAVE_vec_unpacks_lo_v4si (TARGET_SSE2) 2687 #define HAVE_vec_unpacks_hi_v32qi ((TARGET_SSE2) && (TARGET_AVX2)) 2688 #define HAVE_vec_unpacks_hi_v16qi (TARGET_SSE2) 2689 #define HAVE_vec_unpacks_hi_v16hi ((TARGET_SSE2) && (TARGET_AVX2)) 2690 #define HAVE_vec_unpacks_hi_v8hi (TARGET_SSE2) 2691 #define HAVE_vec_unpacks_hi_v8si ((TARGET_SSE2) && (TARGET_AVX2)) 2692 #define HAVE_vec_unpacks_hi_v4si (TARGET_SSE2) 2693 #define HAVE_vec_unpacku_lo_v32qi ((TARGET_SSE2) && (TARGET_AVX2)) 2694 #define HAVE_vec_unpacku_lo_v16qi (TARGET_SSE2) 2695 #define HAVE_vec_unpacku_lo_v16hi ((TARGET_SSE2) && (TARGET_AVX2)) 2696 #define HAVE_vec_unpacku_lo_v8hi (TARGET_SSE2) 2697 #define HAVE_vec_unpacku_lo_v8si ((TARGET_SSE2) && (TARGET_AVX2)) 2698 #define HAVE_vec_unpacku_lo_v4si (TARGET_SSE2) 2699 #define HAVE_vec_unpacku_hi_v32qi ((TARGET_SSE2) && (TARGET_AVX2)) 2700 #define HAVE_vec_unpacku_hi_v16qi (TARGET_SSE2) 2701 #define HAVE_vec_unpacku_hi_v16hi ((TARGET_SSE2) && (TARGET_AVX2)) 2702 #define HAVE_vec_unpacku_hi_v8hi (TARGET_SSE2) 2703 #define HAVE_vec_unpacku_hi_v8si ((TARGET_SSE2) && (TARGET_AVX2)) 2704 #define HAVE_vec_unpacku_hi_v4si (TARGET_SSE2) 2705 #define HAVE_avx2_uavgv32qi3 ((TARGET_SSE2) && (TARGET_AVX2)) 2706 #define HAVE_sse2_uavgv16qi3 (TARGET_SSE2) 2707 #define HAVE_avx2_uavgv16hi3 ((TARGET_SSE2) && (TARGET_AVX2)) 2708 #define HAVE_sse2_uavgv8hi3 (TARGET_SSE2) 2709 #define HAVE_sse2_maskmovdqu (TARGET_SSE2) 2710 #define HAVE_ssse3_pmulhrswv4hi3 (TARGET_AVX2) 2711 #define HAVE_ssse3_pmulhrswv8hi3 (TARGET_AVX2) 2712 #define HAVE_avx2_pmulhrswv16hi3 (TARGET_AVX2) 2713 #define HAVE_avx2_pblendw (TARGET_AVX2) 2714 #define HAVE_avx_roundps_sfix256 ((TARGET_ROUND) && (TARGET_AVX)) 2715 #define HAVE_sse4_1_roundps_sfix (TARGET_ROUND) 2716 #define HAVE_avx_roundpd_vec_pack_sfix256 ((TARGET_ROUND) && (TARGET_AVX)) 2717 #define HAVE_sse4_1_roundpd_vec_pack_sfix (TARGET_ROUND) 2718 #define HAVE_roundv8sf2 ((TARGET_ROUND && !flag_trapping_math) && (TARGET_AVX)) 2719 #define HAVE_roundv4sf2 (TARGET_ROUND && !flag_trapping_math) 2720 #define HAVE_roundv4df2 ((TARGET_ROUND && !flag_trapping_math) && (TARGET_AVX)) 2721 #define HAVE_roundv2df2 ((TARGET_ROUND && !flag_trapping_math) && (TARGET_SSE2)) 2722 #define HAVE_roundv8sf2_sfix ((TARGET_ROUND && !flag_trapping_math) && (TARGET_AVX)) 2723 #define HAVE_roundv4sf2_sfix (TARGET_ROUND && !flag_trapping_math) 2724 #define HAVE_roundv4df2_vec_pack_sfix ((TARGET_ROUND && !flag_trapping_math) && (TARGET_AVX)) 2725 #define HAVE_roundv2df2_vec_pack_sfix (TARGET_ROUND && !flag_trapping_math) 2726 #define HAVE_rotlv16qi3 (TARGET_XOP) 2727 #define HAVE_rotlv8hi3 (TARGET_XOP) 2728 #define HAVE_rotlv4si3 (TARGET_XOP) 2729 #define HAVE_rotlv2di3 (TARGET_XOP) 2730 #define HAVE_rotrv16qi3 (TARGET_XOP) 2731 #define HAVE_rotrv8hi3 (TARGET_XOP) 2732 #define HAVE_rotrv4si3 (TARGET_XOP) 2733 #define HAVE_rotrv2di3 (TARGET_XOP) 2734 #define HAVE_vrotrv16qi3 (TARGET_XOP) 2735 #define HAVE_vrotrv8hi3 (TARGET_XOP) 2736 #define HAVE_vrotrv4si3 (TARGET_XOP) 2737 #define HAVE_vrotrv2di3 (TARGET_XOP) 2738 #define HAVE_vrotlv16qi3 (TARGET_XOP) 2739 #define HAVE_vrotlv8hi3 (TARGET_XOP) 2740 #define HAVE_vrotlv4si3 (TARGET_XOP) 2741 #define HAVE_vrotlv2di3 (TARGET_XOP) 2742 #define HAVE_vlshrv16qi3 (TARGET_XOP) 2743 #define HAVE_vlshrv8hi3 (TARGET_XOP) 2744 #define HAVE_vlshrv4si3 (TARGET_AVX2 || TARGET_XOP) 2745 #define HAVE_vlshrv2di3 (TARGET_AVX2 || TARGET_XOP) 2746 #define HAVE_vlshrv8si3 (TARGET_AVX2) 2747 #define HAVE_vlshrv4di3 (TARGET_AVX2) 2748 #define HAVE_vashrv16qi3 (TARGET_XOP) 2749 #define HAVE_vashrv8hi3 (TARGET_XOP) 2750 #define HAVE_vashrv2di3 (TARGET_XOP) 2751 #define HAVE_vashrv4si3 (TARGET_AVX2 || TARGET_XOP) 2752 #define HAVE_vashrv8si3 (TARGET_AVX2) 2753 #define HAVE_vashlv16qi3 (TARGET_XOP) 2754 #define HAVE_vashlv8hi3 (TARGET_XOP) 2755 #define HAVE_vashlv4si3 (TARGET_AVX2 || TARGET_XOP) 2756 #define HAVE_vashlv2di3 (TARGET_AVX2 || TARGET_XOP) 2757 #define HAVE_vashlv8si3 (TARGET_AVX2) 2758 #define HAVE_vashlv4di3 (TARGET_AVX2) 2759 #define HAVE_ashlv32qi3 ((TARGET_SSE2) && (TARGET_AVX2)) 2760 #define HAVE_lshrv32qi3 ((TARGET_SSE2) && (TARGET_AVX2)) 2761 #define HAVE_ashrv32qi3 ((TARGET_SSE2) && (TARGET_AVX2)) 2762 #define HAVE_ashlv16qi3 (TARGET_SSE2) 2763 #define HAVE_lshrv16qi3 (TARGET_SSE2) 2764 #define HAVE_ashrv16qi3 (TARGET_SSE2) 2765 #define HAVE_ashrv2di3 (TARGET_XOP) 2766 #define HAVE_xop_vmfrczv4sf2 (TARGET_XOP) 2767 #define HAVE_xop_vmfrczv2df2 ((TARGET_XOP) && (TARGET_SSE2)) 2768 #define HAVE_avx_vzeroall (TARGET_AVX) 2769 #define HAVE_avx2_permv4di (TARGET_AVX2) 2770 #define HAVE_avx2_permv4df (TARGET_AVX2) 2771 #define HAVE_avx_vpermilv4df (TARGET_AVX) 2772 #define HAVE_avx_vpermilv2df (TARGET_AVX) 2773 #define HAVE_avx_vpermilv8sf (TARGET_AVX) 2774 #define HAVE_avx_vpermilv4sf (TARGET_AVX) 2775 #define HAVE_avx_vperm2f128v8si3 (TARGET_AVX) 2776 #define HAVE_avx_vperm2f128v8sf3 (TARGET_AVX) 2777 #define HAVE_avx_vperm2f128v4df3 (TARGET_AVX) 2778 #define HAVE_avx_vinsertf128v32qi (TARGET_AVX) 2779 #define HAVE_avx_vinsertf128v16hi (TARGET_AVX) 2780 #define HAVE_avx_vinsertf128v8si (TARGET_AVX) 2781 #define HAVE_avx_vinsertf128v4di (TARGET_AVX) 2782 #define HAVE_avx_vinsertf128v8sf (TARGET_AVX) 2783 #define HAVE_avx_vinsertf128v4df (TARGET_AVX) 2784 #define HAVE_vec_initv32qi (TARGET_AVX) 2785 #define HAVE_vec_initv16hi (TARGET_AVX) 2786 #define HAVE_vec_initv8si (TARGET_AVX) 2787 #define HAVE_vec_initv4di (TARGET_AVX) 2788 #define HAVE_vec_initv8sf (TARGET_AVX) 2789 #define HAVE_vec_initv4df (TARGET_AVX) 2790 #define HAVE_avx2_extracti128 (TARGET_AVX2) 2791 #define HAVE_avx2_inserti128 (TARGET_AVX2) 2792 #define HAVE_vcvtps2ph (TARGET_F16C) 2793 #define HAVE_avx2_gathersiv2di (TARGET_AVX2) 2794 #define HAVE_avx2_gathersiv2df (TARGET_AVX2) 2795 #define HAVE_avx2_gathersiv4di (TARGET_AVX2) 2796 #define HAVE_avx2_gathersiv4df (TARGET_AVX2) 2797 #define HAVE_avx2_gathersiv4si (TARGET_AVX2) 2798 #define HAVE_avx2_gathersiv4sf (TARGET_AVX2) 2799 #define HAVE_avx2_gathersiv8si (TARGET_AVX2) 2800 #define HAVE_avx2_gathersiv8sf (TARGET_AVX2) 2801 #define HAVE_avx2_gatherdiv2di (TARGET_AVX2) 2802 #define HAVE_avx2_gatherdiv2df (TARGET_AVX2) 2803 #define HAVE_avx2_gatherdiv4di (TARGET_AVX2) 2804 #define HAVE_avx2_gatherdiv4df (TARGET_AVX2) 2805 #define HAVE_avx2_gatherdiv4si (TARGET_AVX2) 2806 #define HAVE_avx2_gatherdiv4sf (TARGET_AVX2) 2807 #define HAVE_avx2_gatherdiv8si (TARGET_AVX2) 2808 #define HAVE_avx2_gatherdiv8sf (TARGET_AVX2) 2809 #define HAVE_sse2_lfence (TARGET_SSE2) 2810 #define HAVE_sse_sfence (TARGET_SSE || TARGET_3DNOW_A) 2811 #define HAVE_sse2_mfence (TARGET_SSE2) 2812 #define HAVE_mem_thread_fence 1 2813 #define HAVE_atomic_loadqi 1 2814 #define HAVE_atomic_loadhi 1 2815 #define HAVE_atomic_loadsi 1 2816 #define HAVE_atomic_loaddi (TARGET_64BIT || (TARGET_CMPXCHG8B && (TARGET_80387 || TARGET_SSE))) 2817 #define HAVE_atomic_storeqi 1 2818 #define HAVE_atomic_storehi 1 2819 #define HAVE_atomic_storesi 1 2820 #define HAVE_atomic_storedi (TARGET_64BIT || (TARGET_CMPXCHG8B && (TARGET_80387 || TARGET_SSE))) 2821 #define HAVE_atomic_compare_and_swapqi (TARGET_CMPXCHG) 2822 #define HAVE_atomic_compare_and_swaphi (TARGET_CMPXCHG) 2823 #define HAVE_atomic_compare_and_swapsi (TARGET_CMPXCHG) 2824 #define HAVE_atomic_compare_and_swapdi ((TARGET_CMPXCHG) && (TARGET_64BIT || TARGET_CMPXCHG8B)) 2825 #define HAVE_atomic_compare_and_swapti ((TARGET_CMPXCHG) && (TARGET_64BIT && TARGET_CMPXCHG16B)) 2826 extern rtx gen_x86_fnstsw_1 (rtx); 2827 extern rtx gen_x86_sahf_1 (rtx); 2828 extern rtx gen_swapsi (rtx, rtx); 2829 extern rtx gen_swapdi (rtx, rtx); 2830 extern rtx gen_swapxf (rtx, rtx); 2831 extern rtx gen_zero_extendqidi2 (rtx, rtx); 2832 extern rtx gen_zero_extendhidi2 (rtx, rtx); 2833 extern rtx gen_zero_extendqisi2_and (rtx, rtx); 2834 extern rtx gen_zero_extendhisi2_and (rtx, rtx); 2835 extern rtx gen_zero_extendqihi2_and (rtx, rtx); 2836 extern rtx gen_extendsidi2_1 (rtx, rtx); 2837 extern rtx gen_extendqidi2 (rtx, rtx); 2838 extern rtx gen_extendhidi2 (rtx, rtx); 2839 extern rtx gen_extendhisi2 (rtx, rtx); 2840 extern rtx gen_extendqisi2 (rtx, rtx); 2841 extern rtx gen_extendqihi2 (rtx, rtx); 2842 extern rtx gen_truncxfsf2_i387_noop (rtx, rtx); 2843 extern rtx gen_truncxfdf2_i387_noop (rtx, rtx); 2844 extern rtx gen_fix_truncsfsi_sse (rtx, rtx); 2845 extern rtx gen_fix_truncsfdi_sse (rtx, rtx); 2846 extern rtx gen_fix_truncdfsi_sse (rtx, rtx); 2847 extern rtx gen_fix_truncdfdi_sse (rtx, rtx); 2848 extern rtx gen_fix_trunchi_fisttp_i387_1 (rtx, rtx); 2849 extern rtx gen_fix_truncsi_fisttp_i387_1 (rtx, rtx); 2850 extern rtx gen_fix_truncdi_fisttp_i387_1 (rtx, rtx); 2851 extern rtx gen_fix_trunchi_i387_fisttp (rtx, rtx); 2852 extern rtx gen_fix_truncsi_i387_fisttp (rtx, rtx); 2853 extern rtx gen_fix_truncdi_i387_fisttp (rtx, rtx); 2854 extern rtx gen_fix_trunchi_i387_fisttp_with_temp (rtx, rtx, rtx); 2855 extern rtx gen_fix_truncsi_i387_fisttp_with_temp (rtx, rtx, rtx); 2856 extern rtx gen_fix_truncdi_i387_fisttp_with_temp (rtx, rtx, rtx); 2857 extern rtx gen_fix_truncdi_i387 (rtx, rtx, rtx, rtx); 2858 extern rtx gen_fix_truncdi_i387_with_temp (rtx, rtx, rtx, rtx, rtx); 2859 extern rtx gen_fix_trunchi_i387 (rtx, rtx, rtx, rtx); 2860 extern rtx gen_fix_truncsi_i387 (rtx, rtx, rtx, rtx); 2861 extern rtx gen_fix_trunchi_i387_with_temp (rtx, rtx, rtx, rtx, rtx); 2862 extern rtx gen_fix_truncsi_i387_with_temp (rtx, rtx, rtx, rtx, rtx); 2863 extern rtx gen_x86_fnstcw_1 (rtx); 2864 extern rtx gen_x86_fldcw_1 (rtx); 2865 extern rtx gen_floatdisf2_i387_with_xmm (rtx, rtx, rtx); 2866 extern rtx gen_floatdidf2_i387_with_xmm (rtx, rtx, rtx); 2867 extern rtx gen_floatdixf2_i387_with_xmm (rtx, rtx, rtx); 2868 extern rtx gen_addqi3_cc (rtx, rtx, rtx); 2869 extern rtx gen_addsi_1_zext (rtx, rtx, rtx); 2870 extern rtx gen_addqi_ext_1 (rtx, rtx, rtx); 2871 extern rtx gen_adcxsi3 (rtx, rtx, rtx, rtx, rtx); 2872 extern rtx gen_adcxdi3 (rtx, rtx, rtx, rtx, rtx); 2873 extern rtx gen_divmodsi4_1 (rtx, rtx, rtx, rtx); 2874 extern rtx gen_divmoddi4_1 (rtx, rtx, rtx, rtx); 2875 extern rtx gen_divmodhiqi3 (rtx, rtx, rtx); 2876 extern rtx gen_udivmodsi4_1 (rtx, rtx, rtx, rtx); 2877 extern rtx gen_udivmoddi4_1 (rtx, rtx, rtx, rtx); 2878 extern rtx gen_udivmodhiqi3 (rtx, rtx, rtx); 2879 extern rtx gen_andqi_ext_0 (rtx, rtx, rtx); 2880 extern rtx gen_copysignsf3_const (rtx, rtx, rtx, rtx); 2881 extern rtx gen_copysigndf3_const (rtx, rtx, rtx, rtx); 2882 extern rtx gen_copysigntf3_const (rtx, rtx, rtx, rtx); 2883 extern rtx gen_copysignsf3_var (rtx, rtx, rtx, rtx, rtx, rtx); 2884 extern rtx gen_copysigndf3_var (rtx, rtx, rtx, rtx, rtx, rtx); 2885 extern rtx gen_copysigntf3_var (rtx, rtx, rtx, rtx, rtx, rtx); 2886 extern rtx gen_x86_64_shld (rtx, rtx, rtx); 2887 extern rtx gen_x86_shld (rtx, rtx, rtx); 2888 extern rtx gen_x86_64_shrd (rtx, rtx, rtx); 2889 extern rtx gen_x86_shrd (rtx, rtx, rtx); 2890 extern rtx gen_ashrdi3_cvt (rtx, rtx, rtx); 2891 extern rtx gen_ashrsi3_cvt (rtx, rtx, rtx); 2892 extern rtx gen_ix86_rotldi3_doubleword (rtx, rtx, rtx); 2893 extern rtx gen_ix86_rotlti3_doubleword (rtx, rtx, rtx); 2894 extern rtx gen_ix86_rotrdi3_doubleword (rtx, rtx, rtx); 2895 extern rtx gen_ix86_rotrti3_doubleword (rtx, rtx, rtx); 2896 extern rtx gen_setcc_sf_sse (rtx, rtx, rtx, rtx); 2897 extern rtx gen_setcc_df_sse (rtx, rtx, rtx, rtx); 2898 extern rtx gen_jump (rtx); 2899 extern rtx gen_blockage (void); 2900 extern rtx gen_prologue_use (rtx); 2901 extern rtx gen_simple_return_internal (void); 2902 extern rtx gen_simple_return_internal_long (void); 2903 extern rtx gen_simple_return_pop_internal (rtx); 2904 extern rtx gen_simple_return_indirect_internal (rtx); 2905 extern rtx gen_nop (void); 2906 extern rtx gen_nops (rtx); 2907 extern rtx gen_pad (rtx); 2908 extern rtx gen_set_got (rtx); 2909 extern rtx gen_set_got_labelled (rtx, rtx); 2910 extern rtx gen_set_got_rex64 (rtx); 2911 extern rtx gen_set_rip_rex64 (rtx, rtx); 2912 extern rtx gen_set_got_offset_rex64 (rtx, rtx); 2913 extern rtx gen_eh_return_internal (void); 2914 extern rtx gen_leave (void); 2915 extern rtx gen_leave_rex64 (void); 2916 extern rtx gen_split_stack_return (rtx); 2917 extern rtx gen_ffssi2_no_cmove (rtx, rtx); 2918 extern rtx gen_ctzhi2 (rtx, rtx); 2919 extern rtx gen_ctzsi2 (rtx, rtx); 2920 extern rtx gen_ctzdi2 (rtx, rtx); 2921 extern rtx gen_clzhi2_lzcnt (rtx, rtx); 2922 extern rtx gen_clzsi2_lzcnt (rtx, rtx); 2923 extern rtx gen_clzdi2_lzcnt (rtx, rtx); 2924 extern rtx gen_bmi_bextr_si (rtx, rtx, rtx); 2925 extern rtx gen_bmi_bextr_di (rtx, rtx, rtx); 2926 extern rtx gen_bmi2_bzhi_si3 (rtx, rtx, rtx); 2927 extern rtx gen_bmi2_bzhi_di3 (rtx, rtx, rtx); 2928 extern rtx gen_bmi2_pdep_si3 (rtx, rtx, rtx); 2929 extern rtx gen_bmi2_pdep_di3 (rtx, rtx, rtx); 2930 extern rtx gen_bmi2_pext_si3 (rtx, rtx, rtx); 2931 extern rtx gen_bmi2_pext_di3 (rtx, rtx, rtx); 2932 extern rtx gen_tbm_bextri_si (rtx, rtx, rtx, rtx); 2933 extern rtx gen_tbm_bextri_di (rtx, rtx, rtx, rtx); 2934 extern rtx gen_bsr_rex64 (rtx, rtx); 2935 extern rtx gen_bsr (rtx, rtx); 2936 extern rtx gen_popcounthi2 (rtx, rtx); 2937 extern rtx gen_popcountsi2 (rtx, rtx); 2938 extern rtx gen_popcountdi2 (rtx, rtx); 2939 extern rtx gen_bswaphi_lowpart (rtx); 2940 extern rtx gen_paritydi2_cmp (rtx, rtx, rtx, rtx); 2941 extern rtx gen_paritysi2_cmp (rtx, rtx, rtx); 2942 static inline rtx gen_tls_initial_exec_64_sun (rtx, rtx); 2943 static inline rtx 2944 gen_tls_initial_exec_64_sun(rtx ARG_UNUSED (a), rtx ARG_UNUSED (b)) 2945 { 2946 return 0; 2947 } 2948 extern rtx gen_truncxfsf2_i387_noop_unspec (rtx, rtx); 2949 extern rtx gen_truncxfdf2_i387_noop_unspec (rtx, rtx); 2950 extern rtx gen_sqrtxf2 (rtx, rtx); 2951 extern rtx gen_sqrt_extendsfxf2_i387 (rtx, rtx); 2952 extern rtx gen_sqrt_extenddfxf2_i387 (rtx, rtx); 2953 extern rtx gen_fpremxf4_i387 (rtx, rtx, rtx, rtx); 2954 extern rtx gen_fprem1xf4_i387 (rtx, rtx, rtx, rtx); 2955 extern rtx gen_sincosxf3 (rtx, rtx, rtx); 2956 extern rtx gen_sincos_extendsfxf3_i387 (rtx, rtx, rtx); 2957 extern rtx gen_sincos_extenddfxf3_i387 (rtx, rtx, rtx); 2958 extern rtx gen_fptanxf4_i387 (rtx, rtx, rtx, rtx); 2959 extern rtx gen_fptan_extendsfxf4_i387 (rtx, rtx, rtx, rtx); 2960 extern rtx gen_fptan_extenddfxf4_i387 (rtx, rtx, rtx, rtx); 2961 extern rtx gen_fpatan_extendsfxf3_i387 (rtx, rtx, rtx); 2962 extern rtx gen_fpatan_extenddfxf3_i387 (rtx, rtx, rtx); 2963 extern rtx gen_fyl2xxf3_i387 (rtx, rtx, rtx); 2964 extern rtx gen_fyl2x_extendsfxf3_i387 (rtx, rtx, rtx); 2965 extern rtx gen_fyl2x_extenddfxf3_i387 (rtx, rtx, rtx); 2966 extern rtx gen_fyl2xp1xf3_i387 (rtx, rtx, rtx); 2967 extern rtx gen_fyl2xp1_extendsfxf3_i387 (rtx, rtx, rtx); 2968 extern rtx gen_fyl2xp1_extenddfxf3_i387 (rtx, rtx, rtx); 2969 extern rtx gen_fxtractxf3_i387 (rtx, rtx, rtx); 2970 extern rtx gen_fxtract_extendsfxf3_i387 (rtx, rtx, rtx); 2971 extern rtx gen_fxtract_extenddfxf3_i387 (rtx, rtx, rtx); 2972 extern rtx gen_sse4_1_roundsf2 (rtx, rtx, rtx); 2973 extern rtx gen_sse4_1_rounddf2 (rtx, rtx, rtx); 2974 extern rtx gen_rintxf2 (rtx, rtx); 2975 extern rtx gen_fistdi2 (rtx, rtx); 2976 extern rtx gen_fistdi2_with_temp (rtx, rtx, rtx); 2977 extern rtx gen_fisthi2 (rtx, rtx); 2978 extern rtx gen_fistsi2 (rtx, rtx); 2979 extern rtx gen_fisthi2_with_temp (rtx, rtx, rtx); 2980 extern rtx gen_fistsi2_with_temp (rtx, rtx, rtx); 2981 extern rtx gen_frndintxf2_floor (rtx, rtx); 2982 extern rtx gen_frndintxf2_ceil (rtx, rtx); 2983 extern rtx gen_frndintxf2_trunc (rtx, rtx); 2984 extern rtx gen_frndintxf2_floor_i387 (rtx, rtx, rtx, rtx); 2985 extern rtx gen_frndintxf2_ceil_i387 (rtx, rtx, rtx, rtx); 2986 extern rtx gen_frndintxf2_trunc_i387 (rtx, rtx, rtx, rtx); 2987 extern rtx gen_frndintxf2_mask_pm (rtx, rtx); 2988 extern rtx gen_frndintxf2_mask_pm_i387 (rtx, rtx, rtx, rtx); 2989 extern rtx gen_fistdi2_floor (rtx, rtx, rtx, rtx); 2990 extern rtx gen_fistdi2_ceil (rtx, rtx, rtx, rtx); 2991 extern rtx gen_fistdi2_floor_with_temp (rtx, rtx, rtx, rtx, rtx); 2992 extern rtx gen_fistdi2_ceil_with_temp (rtx, rtx, rtx, rtx, rtx); 2993 extern rtx gen_fisthi2_floor (rtx, rtx, rtx, rtx); 2994 extern rtx gen_fisthi2_ceil (rtx, rtx, rtx, rtx); 2995 extern rtx gen_fistsi2_floor (rtx, rtx, rtx, rtx); 2996 extern rtx gen_fistsi2_ceil (rtx, rtx, rtx, rtx); 2997 extern rtx gen_fisthi2_floor_with_temp (rtx, rtx, rtx, rtx, rtx); 2998 extern rtx gen_fisthi2_ceil_with_temp (rtx, rtx, rtx, rtx, rtx); 2999 extern rtx gen_fistsi2_floor_with_temp (rtx, rtx, rtx, rtx, rtx); 3000 extern rtx gen_fistsi2_ceil_with_temp (rtx, rtx, rtx, rtx, rtx); 3001 extern rtx gen_fxamsf2_i387 (rtx, rtx); 3002 extern rtx gen_fxamdf2_i387 (rtx, rtx); 3003 extern rtx gen_fxamxf2_i387 (rtx, rtx); 3004 extern rtx gen_fxamsf2_i387_with_temp (rtx, rtx); 3005 extern rtx gen_fxamdf2_i387_with_temp (rtx, rtx); 3006 extern rtx gen_movmsk_df (rtx, rtx); 3007 extern rtx gen_cld (void); 3008 extern rtx gen_smaxsf3 (rtx, rtx, rtx); 3009 extern rtx gen_sminsf3 (rtx, rtx, rtx); 3010 extern rtx gen_smaxdf3 (rtx, rtx, rtx); 3011 extern rtx gen_smindf3 (rtx, rtx, rtx); 3012 extern rtx gen_pro_epilogue_adjust_stack_si_add (rtx, rtx, rtx); 3013 extern rtx gen_pro_epilogue_adjust_stack_di_add (rtx, rtx, rtx); 3014 extern rtx gen_pro_epilogue_adjust_stack_si_sub (rtx, rtx, rtx); 3015 extern rtx gen_pro_epilogue_adjust_stack_di_sub (rtx, rtx, rtx); 3016 extern rtx gen_allocate_stack_worker_probe_si (rtx, rtx); 3017 extern rtx gen_allocate_stack_worker_probe_di (rtx, rtx); 3018 extern rtx gen_adjust_stack_and_probesi (rtx, rtx, rtx); 3019 extern rtx gen_adjust_stack_and_probedi (rtx, rtx, rtx); 3020 extern rtx gen_probe_stack_rangesi (rtx, rtx, rtx); 3021 extern rtx gen_probe_stack_rangedi (rtx, rtx, rtx); 3022 static inline rtx gen_nonlocal_goto_receiver (void); 3023 static inline rtx 3024 gen_nonlocal_goto_receiver(void) 3025 { 3026 return 0; 3027 } 3028 extern rtx gen_trap (void); 3029 extern rtx gen_stack_protect_set_si (rtx, rtx); 3030 extern rtx gen_stack_protect_set_di (rtx, rtx); 3031 extern rtx gen_stack_tls_protect_set_si (rtx, rtx); 3032 extern rtx gen_stack_tls_protect_set_di (rtx, rtx); 3033 extern rtx gen_stack_protect_test_si (rtx, rtx, rtx); 3034 extern rtx gen_stack_protect_test_di (rtx, rtx, rtx); 3035 extern rtx gen_stack_tls_protect_test_si (rtx, rtx, rtx); 3036 extern rtx gen_stack_tls_protect_test_di (rtx, rtx, rtx); 3037 extern rtx gen_sse4_2_crc32qi (rtx, rtx, rtx); 3038 extern rtx gen_sse4_2_crc32hi (rtx, rtx, rtx); 3039 extern rtx gen_sse4_2_crc32si (rtx, rtx, rtx); 3040 extern rtx gen_sse4_2_crc32di (rtx, rtx, rtx); 3041 extern rtx gen_rdpmc (rtx, rtx); 3042 extern rtx gen_rdpmc_rex64 (rtx, rtx, rtx); 3043 extern rtx gen_rdtsc (rtx); 3044 extern rtx gen_rdtsc_rex64 (rtx, rtx); 3045 extern rtx gen_rdtscp (rtx, rtx); 3046 extern rtx gen_rdtscp_rex64 (rtx, rtx, rtx); 3047 extern rtx gen_fxsave (rtx); 3048 extern rtx gen_fxsave64 (rtx); 3049 extern rtx gen_fxrstor (rtx); 3050 extern rtx gen_fxrstor64 (rtx); 3051 extern rtx gen_xsave (rtx, rtx); 3052 extern rtx gen_xsaveopt (rtx, rtx); 3053 extern rtx gen_xsave_rex64 (rtx, rtx, rtx); 3054 extern rtx gen_xsaveopt_rex64 (rtx, rtx, rtx); 3055 extern rtx gen_xsave64 (rtx, rtx, rtx); 3056 extern rtx gen_xsaveopt64 (rtx, rtx, rtx); 3057 extern rtx gen_xrstor (rtx, rtx); 3058 extern rtx gen_xrstor_rex64 (rtx, rtx, rtx); 3059 extern rtx gen_xrstor64 (rtx, rtx, rtx); 3060 extern rtx gen_lwp_slwpcbsi (rtx); 3061 extern rtx gen_lwp_slwpcbdi (rtx); 3062 extern rtx gen_rdfsbasesi (rtx); 3063 extern rtx gen_rdgsbasesi (rtx); 3064 extern rtx gen_rdfsbasedi (rtx); 3065 extern rtx gen_rdgsbasedi (rtx); 3066 extern rtx gen_wrfsbasesi (rtx); 3067 extern rtx gen_wrgsbasesi (rtx); 3068 extern rtx gen_wrfsbasedi (rtx); 3069 extern rtx gen_wrgsbasedi (rtx); 3070 extern rtx gen_rdrandhi_1 (rtx); 3071 extern rtx gen_rdrandsi_1 (rtx); 3072 extern rtx gen_rdranddi_1 (rtx); 3073 extern rtx gen_rdseedhi_1 (rtx); 3074 extern rtx gen_rdseedsi_1 (rtx); 3075 extern rtx gen_rdseeddi_1 (rtx); 3076 extern rtx gen_xbegin_1 (rtx, rtx); 3077 extern rtx gen_xend (void); 3078 extern rtx gen_xabort (rtx); 3079 extern rtx gen_xtest_1 (void); 3080 extern rtx gen_sse_movntq (rtx, rtx); 3081 extern rtx gen_mmx_rcpv2sf2 (rtx, rtx); 3082 extern rtx gen_mmx_rcpit1v2sf3 (rtx, rtx, rtx); 3083 extern rtx gen_mmx_rcpit2v2sf3 (rtx, rtx, rtx); 3084 extern rtx gen_mmx_rsqrtv2sf2 (rtx, rtx); 3085 extern rtx gen_mmx_rsqit1v2sf3 (rtx, rtx, rtx); 3086 extern rtx gen_mmx_haddv2sf3 (rtx, rtx, rtx); 3087 extern rtx gen_mmx_hsubv2sf3 (rtx, rtx, rtx); 3088 extern rtx gen_mmx_addsubv2sf3 (rtx, rtx, rtx); 3089 extern rtx gen_mmx_gtv2sf3 (rtx, rtx, rtx); 3090 extern rtx gen_mmx_gev2sf3 (rtx, rtx, rtx); 3091 extern rtx gen_mmx_pf2id (rtx, rtx); 3092 extern rtx gen_mmx_pf2iw (rtx, rtx); 3093 extern rtx gen_mmx_pi2fw (rtx, rtx); 3094 extern rtx gen_mmx_floatv2si2 (rtx, rtx); 3095 extern rtx gen_mmx_pswapdv2sf2 (rtx, rtx); 3096 extern rtx gen_mmx_ashrv4hi3 (rtx, rtx, rtx); 3097 extern rtx gen_mmx_ashrv2si3 (rtx, rtx, rtx); 3098 extern rtx gen_mmx_ashlv4hi3 (rtx, rtx, rtx); 3099 extern rtx gen_mmx_lshrv4hi3 (rtx, rtx, rtx); 3100 extern rtx gen_mmx_ashlv2si3 (rtx, rtx, rtx); 3101 extern rtx gen_mmx_lshrv2si3 (rtx, rtx, rtx); 3102 extern rtx gen_mmx_ashlv1di3 (rtx, rtx, rtx); 3103 extern rtx gen_mmx_lshrv1di3 (rtx, rtx, rtx); 3104 extern rtx gen_mmx_gtv8qi3 (rtx, rtx, rtx); 3105 extern rtx gen_mmx_gtv4hi3 (rtx, rtx, rtx); 3106 extern rtx gen_mmx_gtv2si3 (rtx, rtx, rtx); 3107 extern rtx gen_mmx_andnotv8qi3 (rtx, rtx, rtx); 3108 extern rtx gen_mmx_andnotv4hi3 (rtx, rtx, rtx); 3109 extern rtx gen_mmx_andnotv2si3 (rtx, rtx, rtx); 3110 extern rtx gen_mmx_packsswb (rtx, rtx, rtx); 3111 extern rtx gen_mmx_packssdw (rtx, rtx, rtx); 3112 extern rtx gen_mmx_packuswb (rtx, rtx, rtx); 3113 extern rtx gen_mmx_punpckhbw (rtx, rtx, rtx); 3114 extern rtx gen_mmx_punpcklbw (rtx, rtx, rtx); 3115 extern rtx gen_mmx_punpckhwd (rtx, rtx, rtx); 3116 extern rtx gen_mmx_punpcklwd (rtx, rtx, rtx); 3117 extern rtx gen_mmx_punpckhdq (rtx, rtx, rtx); 3118 extern rtx gen_mmx_punpckldq (rtx, rtx, rtx); 3119 extern rtx gen_mmx_pextrw (rtx, rtx, rtx); 3120 extern rtx gen_mmx_pshufw_1 (rtx, rtx, rtx, rtx, rtx, rtx); 3121 extern rtx gen_mmx_pswapdv2si2 (rtx, rtx); 3122 extern rtx gen_mmx_psadbw (rtx, rtx, rtx); 3123 extern rtx gen_mmx_pmovmskb (rtx, rtx); 3124 extern rtx gen_sse2_movq128 (rtx, rtx); 3125 extern rtx gen_movdi_to_sse (rtx, rtx); 3126 extern rtx gen_avx_loadups256 (rtx, rtx); 3127 extern rtx gen_sse_loadups (rtx, rtx); 3128 extern rtx gen_avx_loadupd256 (rtx, rtx); 3129 extern rtx gen_sse2_loadupd (rtx, rtx); 3130 extern rtx gen_avx_storeups256 (rtx, rtx); 3131 extern rtx gen_sse_storeups (rtx, rtx); 3132 extern rtx gen_avx_storeupd256 (rtx, rtx); 3133 extern rtx gen_sse2_storeupd (rtx, rtx); 3134 extern rtx gen_avx_loaddqu256 (rtx, rtx); 3135 extern rtx gen_sse2_loaddqu (rtx, rtx); 3136 extern rtx gen_avx_storedqu256 (rtx, rtx); 3137 extern rtx gen_sse2_storedqu (rtx, rtx); 3138 extern rtx gen_avx_lddqu256 (rtx, rtx); 3139 extern rtx gen_sse3_lddqu (rtx, rtx); 3140 extern rtx gen_sse2_movntisi (rtx, rtx); 3141 extern rtx gen_sse2_movntidi (rtx, rtx); 3142 extern rtx gen_avx_movntv8sf (rtx, rtx); 3143 extern rtx gen_sse_movntv4sf (rtx, rtx); 3144 extern rtx gen_avx_movntv4df (rtx, rtx); 3145 extern rtx gen_sse2_movntv2df (rtx, rtx); 3146 extern rtx gen_avx_movntv4di (rtx, rtx); 3147 extern rtx gen_sse2_movntv2di (rtx, rtx); 3148 extern rtx gen_sse_vmaddv4sf3 (rtx, rtx, rtx); 3149 extern rtx gen_sse_vmsubv4sf3 (rtx, rtx, rtx); 3150 extern rtx gen_sse2_vmaddv2df3 (rtx, rtx, rtx); 3151 extern rtx gen_sse2_vmsubv2df3 (rtx, rtx, rtx); 3152 extern rtx gen_sse_vmmulv4sf3 (rtx, rtx, rtx); 3153 extern rtx gen_sse2_vmmulv2df3 (rtx, rtx, rtx); 3154 extern rtx gen_avx_divv8sf3 (rtx, rtx, rtx); 3155 extern rtx gen_sse_divv4sf3 (rtx, rtx, rtx); 3156 extern rtx gen_avx_divv4df3 (rtx, rtx, rtx); 3157 extern rtx gen_sse2_divv2df3 (rtx, rtx, rtx); 3158 extern rtx gen_sse_vmdivv4sf3 (rtx, rtx, rtx); 3159 extern rtx gen_sse2_vmdivv2df3 (rtx, rtx, rtx); 3160 extern rtx gen_avx_rcpv8sf2 (rtx, rtx); 3161 extern rtx gen_sse_rcpv4sf2 (rtx, rtx); 3162 extern rtx gen_sse_vmrcpv4sf2 (rtx, rtx, rtx); 3163 extern rtx gen_avx_sqrtv8sf2 (rtx, rtx); 3164 extern rtx gen_sse_sqrtv4sf2 (rtx, rtx); 3165 extern rtx gen_avx_sqrtv4df2 (rtx, rtx); 3166 extern rtx gen_sse2_sqrtv2df2 (rtx, rtx); 3167 extern rtx gen_sse_vmsqrtv4sf2 (rtx, rtx, rtx); 3168 extern rtx gen_sse2_vmsqrtv2df2 (rtx, rtx, rtx); 3169 extern rtx gen_avx_rsqrtv8sf2 (rtx, rtx); 3170 extern rtx gen_sse_rsqrtv4sf2 (rtx, rtx); 3171 extern rtx gen_sse_vmrsqrtv4sf2 (rtx, rtx, rtx); 3172 extern rtx gen_sse_vmsmaxv4sf3 (rtx, rtx, rtx); 3173 extern rtx gen_sse_vmsminv4sf3 (rtx, rtx, rtx); 3174 extern rtx gen_sse2_vmsmaxv2df3 (rtx, rtx, rtx); 3175 extern rtx gen_sse2_vmsminv2df3 (rtx, rtx, rtx); 3176 extern rtx gen_avx_addsubv4df3 (rtx, rtx, rtx); 3177 extern rtx gen_sse3_addsubv2df3 (rtx, rtx, rtx); 3178 extern rtx gen_avx_addsubv8sf3 (rtx, rtx, rtx); 3179 extern rtx gen_sse3_addsubv4sf3 (rtx, rtx, rtx); 3180 extern rtx gen_avx_haddv4df3 (rtx, rtx, rtx); 3181 extern rtx gen_avx_hsubv4df3 (rtx, rtx, rtx); 3182 extern rtx gen_sse3_hsubv2df3 (rtx, rtx, rtx); 3183 extern rtx gen_avx_haddv8sf3 (rtx, rtx, rtx); 3184 extern rtx gen_avx_hsubv8sf3 (rtx, rtx, rtx); 3185 extern rtx gen_sse3_haddv4sf3 (rtx, rtx, rtx); 3186 extern rtx gen_sse3_hsubv4sf3 (rtx, rtx, rtx); 3187 extern rtx gen_avx_cmpv8sf3 (rtx, rtx, rtx, rtx); 3188 extern rtx gen_avx_cmpv4sf3 (rtx, rtx, rtx, rtx); 3189 extern rtx gen_avx_cmpv4df3 (rtx, rtx, rtx, rtx); 3190 extern rtx gen_avx_cmpv2df3 (rtx, rtx, rtx, rtx); 3191 extern rtx gen_avx_vmcmpv4sf3 (rtx, rtx, rtx, rtx); 3192 extern rtx gen_avx_vmcmpv2df3 (rtx, rtx, rtx, rtx); 3193 extern rtx gen_avx_maskcmpv8sf3 (rtx, rtx, rtx, rtx); 3194 extern rtx gen_sse_maskcmpv4sf3 (rtx, rtx, rtx, rtx); 3195 extern rtx gen_avx_maskcmpv4df3 (rtx, rtx, rtx, rtx); 3196 extern rtx gen_sse2_maskcmpv2df3 (rtx, rtx, rtx, rtx); 3197 extern rtx gen_sse_vmmaskcmpv4sf3 (rtx, rtx, rtx, rtx); 3198 extern rtx gen_sse2_vmmaskcmpv2df3 (rtx, rtx, rtx, rtx); 3199 extern rtx gen_sse_comi (rtx, rtx); 3200 extern rtx gen_sse2_comi (rtx, rtx); 3201 extern rtx gen_sse_ucomi (rtx, rtx); 3202 extern rtx gen_sse2_ucomi (rtx, rtx); 3203 extern rtx gen_avx_andnotv8sf3 (rtx, rtx, rtx); 3204 extern rtx gen_sse_andnotv4sf3 (rtx, rtx, rtx); 3205 extern rtx gen_avx_andnotv4df3 (rtx, rtx, rtx); 3206 extern rtx gen_sse2_andnotv2df3 (rtx, rtx, rtx); 3207 extern rtx gen_sse_cvtpi2ps (rtx, rtx, rtx); 3208 extern rtx gen_sse_cvtps2pi (rtx, rtx); 3209 extern rtx gen_sse_cvttps2pi (rtx, rtx); 3210 extern rtx gen_sse_cvtsi2ss (rtx, rtx, rtx); 3211 extern rtx gen_sse_cvtsi2ssq (rtx, rtx, rtx); 3212 extern rtx gen_sse_cvtss2si (rtx, rtx); 3213 extern rtx gen_sse_cvtss2si_2 (rtx, rtx); 3214 extern rtx gen_sse_cvtss2siq (rtx, rtx); 3215 extern rtx gen_sse_cvtss2siq_2 (rtx, rtx); 3216 extern rtx gen_sse_cvttss2si (rtx, rtx); 3217 extern rtx gen_sse_cvttss2siq (rtx, rtx); 3218 extern rtx gen_floatv8siv8sf2 (rtx, rtx); 3219 extern rtx gen_floatv4siv4sf2 (rtx, rtx); 3220 extern rtx gen_avx_cvtps2dq256 (rtx, rtx); 3221 extern rtx gen_sse2_cvtps2dq (rtx, rtx); 3222 extern rtx gen_fix_truncv8sfv8si2 (rtx, rtx); 3223 extern rtx gen_fix_truncv4sfv4si2 (rtx, rtx); 3224 extern rtx gen_sse2_cvtpi2pd (rtx, rtx); 3225 extern rtx gen_sse2_cvtpd2pi (rtx, rtx); 3226 extern rtx gen_sse2_cvttpd2pi (rtx, rtx); 3227 extern rtx gen_sse2_cvtsi2sd (rtx, rtx, rtx); 3228 extern rtx gen_sse2_cvtsi2sdq (rtx, rtx, rtx); 3229 extern rtx gen_sse2_cvtsd2si (rtx, rtx); 3230 extern rtx gen_sse2_cvtsd2si_2 (rtx, rtx); 3231 extern rtx gen_sse2_cvtsd2siq (rtx, rtx); 3232 extern rtx gen_sse2_cvtsd2siq_2 (rtx, rtx); 3233 extern rtx gen_sse2_cvttsd2si (rtx, rtx); 3234 extern rtx gen_sse2_cvttsd2siq (rtx, rtx); 3235 extern rtx gen_floatv4siv4df2 (rtx, rtx); 3236 extern rtx gen_avx_cvtdq2pd256_2 (rtx, rtx); 3237 extern rtx gen_sse2_cvtdq2pd (rtx, rtx); 3238 extern rtx gen_avx_cvtpd2dq256 (rtx, rtx); 3239 extern rtx gen_fix_truncv4dfv4si2 (rtx, rtx); 3240 extern rtx gen_sse2_cvtsd2ss (rtx, rtx, rtx); 3241 extern rtx gen_sse2_cvtss2sd (rtx, rtx, rtx); 3242 extern rtx gen_avx_cvtpd2ps256 (rtx, rtx); 3243 extern rtx gen_avx_cvtps2pd256 (rtx, rtx); 3244 extern rtx gen_sse2_cvtps2pd (rtx, rtx); 3245 extern rtx gen_sse_movhlps (rtx, rtx, rtx); 3246 extern rtx gen_sse_movlhps (rtx, rtx, rtx); 3247 extern rtx gen_avx_unpckhps256 (rtx, rtx, rtx); 3248 extern rtx gen_vec_interleave_highv4sf (rtx, rtx, rtx); 3249 extern rtx gen_avx_unpcklps256 (rtx, rtx, rtx); 3250 extern rtx gen_vec_interleave_lowv4sf (rtx, rtx, rtx); 3251 extern rtx gen_avx_movshdup256 (rtx, rtx); 3252 extern rtx gen_sse3_movshdup (rtx, rtx); 3253 extern rtx gen_avx_movsldup256 (rtx, rtx); 3254 extern rtx gen_sse3_movsldup (rtx, rtx); 3255 extern rtx gen_avx_shufps256_1 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx); 3256 extern rtx gen_sse_shufps_v4si (rtx, rtx, rtx, rtx, rtx, rtx, rtx); 3257 extern rtx gen_sse_shufps_v4sf (rtx, rtx, rtx, rtx, rtx, rtx, rtx); 3258 extern rtx gen_sse_storehps (rtx, rtx); 3259 extern rtx gen_sse_loadhps (rtx, rtx, rtx); 3260 extern rtx gen_sse_storelps (rtx, rtx); 3261 extern rtx gen_sse_loadlps (rtx, rtx, rtx); 3262 extern rtx gen_sse_movss (rtx, rtx, rtx); 3263 extern rtx gen_avx2_vec_dupv8sf (rtx, rtx); 3264 extern rtx gen_avx2_vec_dupv4sf (rtx, rtx); 3265 extern rtx gen_avx2_vec_dupv8sf_1 (rtx, rtx); 3266 extern rtx gen_vec_dupv4sf (rtx, rtx); 3267 extern rtx gen_vec_setv4si_0 (rtx, rtx, rtx); 3268 extern rtx gen_vec_setv4sf_0 (rtx, rtx, rtx); 3269 extern rtx gen_sse4_1_insertps (rtx, rtx, rtx, rtx); 3270 extern rtx gen_vec_extract_lo_v4di (rtx, rtx); 3271 extern rtx gen_vec_extract_lo_v4df (rtx, rtx); 3272 extern rtx gen_vec_extract_hi_v4di (rtx, rtx); 3273 extern rtx gen_vec_extract_hi_v4df (rtx, rtx); 3274 extern rtx gen_vec_extract_lo_v8si (rtx, rtx); 3275 extern rtx gen_vec_extract_lo_v8sf (rtx, rtx); 3276 extern rtx gen_vec_extract_hi_v8si (rtx, rtx); 3277 extern rtx gen_vec_extract_hi_v8sf (rtx, rtx); 3278 extern rtx gen_vec_extract_lo_v16hi (rtx, rtx); 3279 extern rtx gen_vec_extract_hi_v16hi (rtx, rtx); 3280 extern rtx gen_vec_extract_lo_v32qi (rtx, rtx); 3281 extern rtx gen_vec_extract_hi_v32qi (rtx, rtx); 3282 extern rtx gen_avx_unpckhpd256 (rtx, rtx, rtx); 3283 extern rtx gen_avx_shufpd256_1 (rtx, rtx, rtx, rtx, rtx, rtx, rtx); 3284 extern rtx gen_avx2_interleave_highv4di (rtx, rtx, rtx); 3285 extern rtx gen_vec_interleave_highv2di (rtx, rtx, rtx); 3286 extern rtx gen_avx2_interleave_lowv4di (rtx, rtx, rtx); 3287 extern rtx gen_vec_interleave_lowv2di (rtx, rtx, rtx); 3288 extern rtx gen_sse2_shufpd_v2di (rtx, rtx, rtx, rtx, rtx); 3289 extern rtx gen_sse2_shufpd_v2df (rtx, rtx, rtx, rtx, rtx); 3290 extern rtx gen_sse2_storehpd (rtx, rtx); 3291 extern rtx gen_sse2_storelpd (rtx, rtx); 3292 extern rtx gen_sse2_loadhpd (rtx, rtx, rtx); 3293 extern rtx gen_sse2_loadlpd (rtx, rtx, rtx); 3294 extern rtx gen_sse2_movsd (rtx, rtx, rtx); 3295 extern rtx gen_vec_dupv2df (rtx, rtx); 3296 extern rtx gen_ashrv16hi3 (rtx, rtx, rtx); 3297 extern rtx gen_ashrv8hi3 (rtx, rtx, rtx); 3298 extern rtx gen_ashrv8si3 (rtx, rtx, rtx); 3299 extern rtx gen_ashrv4si3 (rtx, rtx, rtx); 3300 extern rtx gen_ashlv16hi3 (rtx, rtx, rtx); 3301 extern rtx gen_lshrv16hi3 (rtx, rtx, rtx); 3302 extern rtx gen_ashlv8hi3 (rtx, rtx, rtx); 3303 extern rtx gen_lshrv8hi3 (rtx, rtx, rtx); 3304 extern rtx gen_ashlv8si3 (rtx, rtx, rtx); 3305 extern rtx gen_lshrv8si3 (rtx, rtx, rtx); 3306 extern rtx gen_ashlv4si3 (rtx, rtx, rtx); 3307 extern rtx gen_lshrv4si3 (rtx, rtx, rtx); 3308 extern rtx gen_ashlv4di3 (rtx, rtx, rtx); 3309 extern rtx gen_lshrv4di3 (rtx, rtx, rtx); 3310 extern rtx gen_ashlv2di3 (rtx, rtx, rtx); 3311 extern rtx gen_lshrv2di3 (rtx, rtx, rtx); 3312 extern rtx gen_avx2_ashlv2ti3 (rtx, rtx, rtx); 3313 extern rtx gen_sse2_ashlv1ti3 (rtx, rtx, rtx); 3314 extern rtx gen_avx2_lshrv2ti3 (rtx, rtx, rtx); 3315 extern rtx gen_sse2_lshrv1ti3 (rtx, rtx, rtx); 3316 extern rtx gen_sse4_2_gtv2di3 (rtx, rtx, rtx); 3317 extern rtx gen_avx2_gtv32qi3 (rtx, rtx, rtx); 3318 extern rtx gen_avx2_gtv16hi3 (rtx, rtx, rtx); 3319 extern rtx gen_avx2_gtv8si3 (rtx, rtx, rtx); 3320 extern rtx gen_avx2_gtv4di3 (rtx, rtx, rtx); 3321 extern rtx gen_sse2_gtv16qi3 (rtx, rtx, rtx); 3322 extern rtx gen_sse2_gtv8hi3 (rtx, rtx, rtx); 3323 extern rtx gen_sse2_gtv4si3 (rtx, rtx, rtx); 3324 extern rtx gen_avx2_packsswb (rtx, rtx, rtx); 3325 extern rtx gen_sse2_packsswb (rtx, rtx, rtx); 3326 extern rtx gen_avx2_packssdw (rtx, rtx, rtx); 3327 extern rtx gen_sse2_packssdw (rtx, rtx, rtx); 3328 extern rtx gen_avx2_packuswb (rtx, rtx, rtx); 3329 extern rtx gen_sse2_packuswb (rtx, rtx, rtx); 3330 extern rtx gen_avx2_interleave_highv32qi (rtx, rtx, rtx); 3331 extern rtx gen_vec_interleave_highv16qi (rtx, rtx, rtx); 3332 extern rtx gen_avx2_interleave_lowv32qi (rtx, rtx, rtx); 3333 extern rtx gen_vec_interleave_lowv16qi (rtx, rtx, rtx); 3334 extern rtx gen_avx2_interleave_highv16hi (rtx, rtx, rtx); 3335 extern rtx gen_vec_interleave_highv8hi (rtx, rtx, rtx); 3336 extern rtx gen_avx2_interleave_lowv16hi (rtx, rtx, rtx); 3337 extern rtx gen_vec_interleave_lowv8hi (rtx, rtx, rtx); 3338 extern rtx gen_avx2_interleave_highv8si (rtx, rtx, rtx); 3339 extern rtx gen_vec_interleave_highv4si (rtx, rtx, rtx); 3340 extern rtx gen_avx2_interleave_lowv8si (rtx, rtx, rtx); 3341 extern rtx gen_vec_interleave_lowv4si (rtx, rtx, rtx); 3342 extern rtx gen_sse4_1_pinsrb (rtx, rtx, rtx, rtx); 3343 extern rtx gen_sse2_pinsrw (rtx, rtx, rtx, rtx); 3344 extern rtx gen_sse4_1_pinsrd (rtx, rtx, rtx, rtx); 3345 extern rtx gen_sse4_1_pinsrq (rtx, rtx, rtx, rtx); 3346 extern rtx gen_avx2_pshufd_1 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx); 3347 extern rtx gen_sse2_pshufd_1 (rtx, rtx, rtx, rtx, rtx, rtx); 3348 extern rtx gen_avx2_pshuflw_1 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx); 3349 extern rtx gen_sse2_pshuflw_1 (rtx, rtx, rtx, rtx, rtx, rtx); 3350 extern rtx gen_avx2_pshufhw_1 (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx); 3351 extern rtx gen_sse2_pshufhw_1 (rtx, rtx, rtx, rtx, rtx, rtx); 3352 extern rtx gen_sse2_loadld (rtx, rtx, rtx); 3353 extern rtx gen_sse2_stored (rtx, rtx); 3354 extern rtx gen_vec_concatv2di (rtx, rtx, rtx); 3355 extern rtx gen_avx2_psadbw (rtx, rtx, rtx); 3356 extern rtx gen_sse2_psadbw (rtx, rtx, rtx); 3357 extern rtx gen_avx_movmskps256 (rtx, rtx); 3358 extern rtx gen_sse_movmskps (rtx, rtx); 3359 extern rtx gen_avx_movmskpd256 (rtx, rtx); 3360 extern rtx gen_sse2_movmskpd (rtx, rtx); 3361 extern rtx gen_avx2_pmovmskb (rtx, rtx); 3362 extern rtx gen_sse2_pmovmskb (rtx, rtx); 3363 extern rtx gen_sse_ldmxcsr (rtx); 3364 extern rtx gen_sse_stmxcsr (rtx); 3365 extern rtx gen_sse2_clflush (rtx); 3366 extern rtx gen_sse3_mwait (rtx, rtx); 3367 extern rtx gen_sse3_monitor_si (rtx, rtx, rtx); 3368 extern rtx gen_sse3_monitor_di (rtx, rtx, rtx); 3369 extern rtx gen_avx2_phaddwv16hi3 (rtx, rtx, rtx); 3370 extern rtx gen_avx2_phaddswv16hi3 (rtx, rtx, rtx); 3371 extern rtx gen_avx2_phsubwv16hi3 (rtx, rtx, rtx); 3372 extern rtx gen_avx2_phsubswv16hi3 (rtx, rtx, rtx); 3373 extern rtx gen_ssse3_phaddwv8hi3 (rtx, rtx, rtx); 3374 extern rtx gen_ssse3_phaddswv8hi3 (rtx, rtx, rtx); 3375 extern rtx gen_ssse3_phsubwv8hi3 (rtx, rtx, rtx); 3376 extern rtx gen_ssse3_phsubswv8hi3 (rtx, rtx, rtx); 3377 extern rtx gen_ssse3_phaddwv4hi3 (rtx, rtx, rtx); 3378 extern rtx gen_ssse3_phaddswv4hi3 (rtx, rtx, rtx); 3379 extern rtx gen_ssse3_phsubwv4hi3 (rtx, rtx, rtx); 3380 extern rtx gen_ssse3_phsubswv4hi3 (rtx, rtx, rtx); 3381 extern rtx gen_avx2_phadddv8si3 (rtx, rtx, rtx); 3382 extern rtx gen_avx2_phsubdv8si3 (rtx, rtx, rtx); 3383 extern rtx gen_ssse3_phadddv4si3 (rtx, rtx, rtx); 3384 extern rtx gen_ssse3_phsubdv4si3 (rtx, rtx, rtx); 3385 extern rtx gen_ssse3_phadddv2si3 (rtx, rtx, rtx); 3386 extern rtx gen_ssse3_phsubdv2si3 (rtx, rtx, rtx); 3387 extern rtx gen_avx2_pmaddubsw256 (rtx, rtx, rtx); 3388 extern rtx gen_ssse3_pmaddubsw128 (rtx, rtx, rtx); 3389 extern rtx gen_ssse3_pmaddubsw (rtx, rtx, rtx); 3390 extern rtx gen_avx2_pshufbv32qi3 (rtx, rtx, rtx); 3391 extern rtx gen_ssse3_pshufbv16qi3 (rtx, rtx, rtx); 3392 extern rtx gen_ssse3_pshufbv8qi3 (rtx, rtx, rtx); 3393 extern rtx gen_avx2_psignv32qi3 (rtx, rtx, rtx); 3394 extern rtx gen_ssse3_psignv16qi3 (rtx, rtx, rtx); 3395 extern rtx gen_avx2_psignv16hi3 (rtx, rtx, rtx); 3396 extern rtx gen_ssse3_psignv8hi3 (rtx, rtx, rtx); 3397 extern rtx gen_avx2_psignv8si3 (rtx, rtx, rtx); 3398 extern rtx gen_ssse3_psignv4si3 (rtx, rtx, rtx); 3399 extern rtx gen_ssse3_psignv8qi3 (rtx, rtx, rtx); 3400 extern rtx gen_ssse3_psignv4hi3 (rtx, rtx, rtx); 3401 extern rtx gen_ssse3_psignv2si3 (rtx, rtx, rtx); 3402 extern rtx gen_avx2_palignrv2ti (rtx, rtx, rtx, rtx); 3403 extern rtx gen_ssse3_palignrti (rtx, rtx, rtx, rtx); 3404 extern rtx gen_ssse3_palignrdi (rtx, rtx, rtx, rtx); 3405 extern rtx gen_absv32qi2 (rtx, rtx); 3406 extern rtx gen_absv16qi2 (rtx, rtx); 3407 extern rtx gen_absv16hi2 (rtx, rtx); 3408 extern rtx gen_absv8hi2 (rtx, rtx); 3409 extern rtx gen_absv8si2 (rtx, rtx); 3410 extern rtx gen_absv4si2 (rtx, rtx); 3411 extern rtx gen_absv8qi2 (rtx, rtx); 3412 extern rtx gen_absv4hi2 (rtx, rtx); 3413 extern rtx gen_absv2si2 (rtx, rtx); 3414 extern rtx gen_sse4a_movntsf (rtx, rtx); 3415 extern rtx gen_sse4a_movntdf (rtx, rtx); 3416 extern rtx gen_sse4a_vmmovntv4sf (rtx, rtx); 3417 extern rtx gen_sse4a_vmmovntv2df (rtx, rtx); 3418 extern rtx gen_sse4a_extrqi (rtx, rtx, rtx, rtx); 3419 extern rtx gen_sse4a_extrq (rtx, rtx, rtx); 3420 extern rtx gen_sse4a_insertqi (rtx, rtx, rtx, rtx, rtx); 3421 extern rtx gen_sse4a_insertq (rtx, rtx, rtx); 3422 extern rtx gen_avx_blendps256 (rtx, rtx, rtx, rtx); 3423 extern rtx gen_sse4_1_blendps (rtx, rtx, rtx, rtx); 3424 extern rtx gen_avx_blendpd256 (rtx, rtx, rtx, rtx); 3425 extern rtx gen_sse4_1_blendpd (rtx, rtx, rtx, rtx); 3426 extern rtx gen_avx_blendvps256 (rtx, rtx, rtx, rtx); 3427 extern rtx gen_sse4_1_blendvps (rtx, rtx, rtx, rtx); 3428 extern rtx gen_avx_blendvpd256 (rtx, rtx, rtx, rtx); 3429 extern rtx gen_sse4_1_blendvpd (rtx, rtx, rtx, rtx); 3430 extern rtx gen_avx_dpps256 (rtx, rtx, rtx, rtx); 3431 extern rtx gen_sse4_1_dpps (rtx, rtx, rtx, rtx); 3432 extern rtx gen_avx_dppd256 (rtx, rtx, rtx, rtx); 3433 extern rtx gen_sse4_1_dppd (rtx, rtx, rtx, rtx); 3434 extern rtx gen_avx2_movntdqa (rtx, rtx); 3435 extern rtx gen_sse4_1_movntdqa (rtx, rtx); 3436 extern rtx gen_avx2_mpsadbw (rtx, rtx, rtx, rtx); 3437 extern rtx gen_sse4_1_mpsadbw (rtx, rtx, rtx, rtx); 3438 extern rtx gen_avx2_packusdw (rtx, rtx, rtx); 3439 extern rtx gen_sse4_1_packusdw (rtx, rtx, rtx); 3440 extern rtx gen_avx2_pblendvb (rtx, rtx, rtx, rtx); 3441 extern rtx gen_sse4_1_pblendvb (rtx, rtx, rtx, rtx); 3442 extern rtx gen_sse4_1_pblendw (rtx, rtx, rtx, rtx); 3443 extern rtx gen_avx2_pblenddv8si (rtx, rtx, rtx, rtx); 3444 extern rtx gen_avx2_pblenddv4si (rtx, rtx, rtx, rtx); 3445 extern rtx gen_sse4_1_phminposuw (rtx, rtx); 3446 extern rtx gen_avx2_sign_extendv16qiv16hi2 (rtx, rtx); 3447 extern rtx gen_avx2_zero_extendv16qiv16hi2 (rtx, rtx); 3448 extern rtx gen_sse4_1_sign_extendv8qiv8hi2 (rtx, rtx); 3449 extern rtx gen_sse4_1_zero_extendv8qiv8hi2 (rtx, rtx); 3450 extern rtx gen_avx2_sign_extendv8qiv8si2 (rtx, rtx); 3451 extern rtx gen_avx2_zero_extendv8qiv8si2 (rtx, rtx); 3452 extern rtx gen_sse4_1_sign_extendv4qiv4si2 (rtx, rtx); 3453 extern rtx gen_sse4_1_zero_extendv4qiv4si2 (rtx, rtx); 3454 extern rtx gen_avx2_sign_extendv8hiv8si2 (rtx, rtx); 3455 extern rtx gen_avx2_zero_extendv8hiv8si2 (rtx, rtx); 3456 extern rtx gen_sse4_1_sign_extendv4hiv4si2 (rtx, rtx); 3457 extern rtx gen_sse4_1_zero_extendv4hiv4si2 (rtx, rtx); 3458 extern rtx gen_avx2_sign_extendv4qiv4di2 (rtx, rtx); 3459 extern rtx gen_avx2_zero_extendv4qiv4di2 (rtx, rtx); 3460 extern rtx gen_sse4_1_sign_extendv2qiv2di2 (rtx, rtx); 3461 extern rtx gen_sse4_1_zero_extendv2qiv2di2 (rtx, rtx); 3462 extern rtx gen_avx2_sign_extendv4hiv4di2 (rtx, rtx); 3463 extern rtx gen_avx2_zero_extendv4hiv4di2 (rtx, rtx); 3464 extern rtx gen_sse4_1_sign_extendv2hiv2di2 (rtx, rtx); 3465 extern rtx gen_sse4_1_zero_extendv2hiv2di2 (rtx, rtx); 3466 extern rtx gen_avx2_sign_extendv4siv4di2 (rtx, rtx); 3467 extern rtx gen_avx2_zero_extendv4siv4di2 (rtx, rtx); 3468 extern rtx gen_sse4_1_sign_extendv2siv2di2 (rtx, rtx); 3469 extern rtx gen_sse4_1_zero_extendv2siv2di2 (rtx, rtx); 3470 extern rtx gen_avx_vtestps256 (rtx, rtx); 3471 extern rtx gen_avx_vtestps (rtx, rtx); 3472 extern rtx gen_avx_vtestpd256 (rtx, rtx); 3473 extern rtx gen_avx_vtestpd (rtx, rtx); 3474 extern rtx gen_avx_ptest256 (rtx, rtx); 3475 extern rtx gen_sse4_1_ptest (rtx, rtx); 3476 extern rtx gen_avx_roundps256 (rtx, rtx, rtx); 3477 extern rtx gen_sse4_1_roundps (rtx, rtx, rtx); 3478 extern rtx gen_avx_roundpd256 (rtx, rtx, rtx); 3479 extern rtx gen_sse4_1_roundpd (rtx, rtx, rtx); 3480 extern rtx gen_sse4_1_roundss (rtx, rtx, rtx, rtx); 3481 extern rtx gen_sse4_1_roundsd (rtx, rtx, rtx, rtx); 3482 extern rtx gen_sse4_2_pcmpestr (rtx, rtx, rtx, rtx, rtx, rtx, rtx); 3483 extern rtx gen_sse4_2_pcmpestri (rtx, rtx, rtx, rtx, rtx, rtx); 3484 extern rtx gen_sse4_2_pcmpestrm (rtx, rtx, rtx, rtx, rtx, rtx); 3485 extern rtx gen_sse4_2_pcmpestr_cconly (rtx, rtx, rtx, rtx, rtx, rtx, rtx); 3486 extern rtx gen_sse4_2_pcmpistr (rtx, rtx, rtx, rtx, rtx); 3487 extern rtx gen_sse4_2_pcmpistri (rtx, rtx, rtx, rtx); 3488 extern rtx gen_sse4_2_pcmpistrm (rtx, rtx, rtx, rtx); 3489 extern rtx gen_sse4_2_pcmpistr_cconly (rtx, rtx, rtx, rtx, rtx); 3490 extern rtx gen_xop_pmacsww (rtx, rtx, rtx, rtx); 3491 extern rtx gen_xop_pmacssww (rtx, rtx, rtx, rtx); 3492 extern rtx gen_xop_pmacsdd (rtx, rtx, rtx, rtx); 3493 extern rtx gen_xop_pmacssdd (rtx, rtx, rtx, rtx); 3494 extern rtx gen_xop_pmacsdql (rtx, rtx, rtx, rtx); 3495 extern rtx gen_xop_pmacssdql (rtx, rtx, rtx, rtx); 3496 extern rtx gen_xop_pmacsdqh (rtx, rtx, rtx, rtx); 3497 extern rtx gen_xop_pmacssdqh (rtx, rtx, rtx, rtx); 3498 extern rtx gen_xop_pmacswd (rtx, rtx, rtx, rtx); 3499 extern rtx gen_xop_pmacsswd (rtx, rtx, rtx, rtx); 3500 extern rtx gen_xop_pmadcswd (rtx, rtx, rtx, rtx); 3501 extern rtx gen_xop_pmadcsswd (rtx, rtx, rtx, rtx); 3502 extern rtx gen_xop_pcmov_v32qi256 (rtx, rtx, rtx, rtx); 3503 extern rtx gen_xop_pcmov_v16qi (rtx, rtx, rtx, rtx); 3504 extern rtx gen_xop_pcmov_v16hi256 (rtx, rtx, rtx, rtx); 3505 extern rtx gen_xop_pcmov_v8hi (rtx, rtx, rtx, rtx); 3506 extern rtx gen_xop_pcmov_v8si256 (rtx, rtx, rtx, rtx); 3507 extern rtx gen_xop_pcmov_v4si (rtx, rtx, rtx, rtx); 3508 extern rtx gen_xop_pcmov_v4di256 (rtx, rtx, rtx, rtx); 3509 extern rtx gen_xop_pcmov_v2di (rtx, rtx, rtx, rtx); 3510 extern rtx gen_xop_pcmov_v8sf256 (rtx, rtx, rtx, rtx); 3511 extern rtx gen_xop_pcmov_v4sf (rtx, rtx, rtx, rtx); 3512 extern rtx gen_xop_pcmov_v4df256 (rtx, rtx, rtx, rtx); 3513 extern rtx gen_xop_pcmov_v2df (rtx, rtx, rtx, rtx); 3514 extern rtx gen_xop_phaddbw (rtx, rtx); 3515 extern rtx gen_xop_phaddubw (rtx, rtx); 3516 extern rtx gen_xop_phaddbd (rtx, rtx); 3517 extern rtx gen_xop_phaddubd (rtx, rtx); 3518 extern rtx gen_xop_phaddbq (rtx, rtx); 3519 extern rtx gen_xop_phaddubq (rtx, rtx); 3520 extern rtx gen_xop_phaddwd (rtx, rtx); 3521 extern rtx gen_xop_phadduwd (rtx, rtx); 3522 extern rtx gen_xop_phaddwq (rtx, rtx); 3523 extern rtx gen_xop_phadduwq (rtx, rtx); 3524 extern rtx gen_xop_phadddq (rtx, rtx); 3525 extern rtx gen_xop_phaddudq (rtx, rtx); 3526 extern rtx gen_xop_phsubbw (rtx, rtx); 3527 extern rtx gen_xop_phsubwd (rtx, rtx); 3528 extern rtx gen_xop_phsubdq (rtx, rtx); 3529 extern rtx gen_xop_pperm (rtx, rtx, rtx, rtx); 3530 extern rtx gen_xop_pperm_pack_v2di_v4si (rtx, rtx, rtx, rtx); 3531 extern rtx gen_xop_pperm_pack_v4si_v8hi (rtx, rtx, rtx, rtx); 3532 extern rtx gen_xop_pperm_pack_v8hi_v16qi (rtx, rtx, rtx, rtx); 3533 extern rtx gen_xop_rotlv16qi3 (rtx, rtx, rtx); 3534 extern rtx gen_xop_rotlv8hi3 (rtx, rtx, rtx); 3535 extern rtx gen_xop_rotlv4si3 (rtx, rtx, rtx); 3536 extern rtx gen_xop_rotlv2di3 (rtx, rtx, rtx); 3537 extern rtx gen_xop_rotrv16qi3 (rtx, rtx, rtx); 3538 extern rtx gen_xop_rotrv8hi3 (rtx, rtx, rtx); 3539 extern rtx gen_xop_rotrv4si3 (rtx, rtx, rtx); 3540 extern rtx gen_xop_rotrv2di3 (rtx, rtx, rtx); 3541 extern rtx gen_xop_vrotlv16qi3 (rtx, rtx, rtx); 3542 extern rtx gen_xop_vrotlv8hi3 (rtx, rtx, rtx); 3543 extern rtx gen_xop_vrotlv4si3 (rtx, rtx, rtx); 3544 extern rtx gen_xop_vrotlv2di3 (rtx, rtx, rtx); 3545 extern rtx gen_xop_shav16qi3 (rtx, rtx, rtx); 3546 extern rtx gen_xop_shav8hi3 (rtx, rtx, rtx); 3547 extern rtx gen_xop_shav4si3 (rtx, rtx, rtx); 3548 extern rtx gen_xop_shav2di3 (rtx, rtx, rtx); 3549 extern rtx gen_xop_shlv16qi3 (rtx, rtx, rtx); 3550 extern rtx gen_xop_shlv8hi3 (rtx, rtx, rtx); 3551 extern rtx gen_xop_shlv4si3 (rtx, rtx, rtx); 3552 extern rtx gen_xop_shlv2di3 (rtx, rtx, rtx); 3553 extern rtx gen_xop_frczsf2 (rtx, rtx); 3554 extern rtx gen_xop_frczdf2 (rtx, rtx); 3555 extern rtx gen_xop_frczv4sf2 (rtx, rtx); 3556 extern rtx gen_xop_frczv2df2 (rtx, rtx); 3557 extern rtx gen_xop_frczv8sf2 (rtx, rtx); 3558 extern rtx gen_xop_frczv4df2 (rtx, rtx); 3559 extern rtx gen_xop_maskcmpv16qi3 (rtx, rtx, rtx, rtx); 3560 extern rtx gen_xop_maskcmpv8hi3 (rtx, rtx, rtx, rtx); 3561 extern rtx gen_xop_maskcmpv4si3 (rtx, rtx, rtx, rtx); 3562 extern rtx gen_xop_maskcmpv2di3 (rtx, rtx, rtx, rtx); 3563 extern rtx gen_xop_maskcmp_unsv16qi3 (rtx, rtx, rtx, rtx); 3564 extern rtx gen_xop_maskcmp_unsv8hi3 (rtx, rtx, rtx, rtx); 3565 extern rtx gen_xop_maskcmp_unsv4si3 (rtx, rtx, rtx, rtx); 3566 extern rtx gen_xop_maskcmp_unsv2di3 (rtx, rtx, rtx, rtx); 3567 extern rtx gen_xop_maskcmp_uns2v16qi3 (rtx, rtx, rtx, rtx); 3568 extern rtx gen_xop_maskcmp_uns2v8hi3 (rtx, rtx, rtx, rtx); 3569 extern rtx gen_xop_maskcmp_uns2v4si3 (rtx, rtx, rtx, rtx); 3570 extern rtx gen_xop_maskcmp_uns2v2di3 (rtx, rtx, rtx, rtx); 3571 extern rtx gen_xop_pcom_tfv16qi3 (rtx, rtx, rtx, rtx); 3572 extern rtx gen_xop_pcom_tfv8hi3 (rtx, rtx, rtx, rtx); 3573 extern rtx gen_xop_pcom_tfv4si3 (rtx, rtx, rtx, rtx); 3574 extern rtx gen_xop_pcom_tfv2di3 (rtx, rtx, rtx, rtx); 3575 extern rtx gen_xop_vpermil2v8sf3 (rtx, rtx, rtx, rtx, rtx); 3576 extern rtx gen_xop_vpermil2v4sf3 (rtx, rtx, rtx, rtx, rtx); 3577 extern rtx gen_xop_vpermil2v4df3 (rtx, rtx, rtx, rtx, rtx); 3578 extern rtx gen_xop_vpermil2v2df3 (rtx, rtx, rtx, rtx, rtx); 3579 extern rtx gen_aesenc (rtx, rtx, rtx); 3580 extern rtx gen_aesenclast (rtx, rtx, rtx); 3581 extern rtx gen_aesdec (rtx, rtx, rtx); 3582 extern rtx gen_aesdeclast (rtx, rtx, rtx); 3583 extern rtx gen_aesimc (rtx, rtx); 3584 extern rtx gen_aeskeygenassist (rtx, rtx, rtx); 3585 extern rtx gen_pclmulqdq (rtx, rtx, rtx, rtx); 3586 extern rtx gen_avx_vzeroupper (void); 3587 extern rtx gen_avx2_pbroadcastv32qi (rtx, rtx); 3588 extern rtx gen_avx2_pbroadcastv16qi (rtx, rtx); 3589 extern rtx gen_avx2_pbroadcastv16hi (rtx, rtx); 3590 extern rtx gen_avx2_pbroadcastv8hi (rtx, rtx); 3591 extern rtx gen_avx2_pbroadcastv8si (rtx, rtx); 3592 extern rtx gen_avx2_pbroadcastv4si (rtx, rtx); 3593 extern rtx gen_avx2_pbroadcastv4di (rtx, rtx); 3594 extern rtx gen_avx2_pbroadcastv2di (rtx, rtx); 3595 extern rtx gen_avx2_pbroadcastv32qi_1 (rtx, rtx); 3596 extern rtx gen_avx2_pbroadcastv16hi_1 (rtx, rtx); 3597 extern rtx gen_avx2_pbroadcastv8si_1 (rtx, rtx); 3598 extern rtx gen_avx2_pbroadcastv4di_1 (rtx, rtx); 3599 extern rtx gen_avx2_permvarv8si (rtx, rtx, rtx); 3600 extern rtx gen_avx2_permvarv8sf (rtx, rtx, rtx); 3601 extern rtx gen_avx2_permv4di_1 (rtx, rtx, rtx, rtx, rtx, rtx); 3602 extern rtx gen_avx2_permv4df_1 (rtx, rtx, rtx, rtx, rtx, rtx); 3603 extern rtx gen_avx2_permv2ti (rtx, rtx, rtx, rtx); 3604 extern rtx gen_avx2_vec_dupv4df (rtx, rtx); 3605 extern rtx gen_vec_dupv8si (rtx, rtx); 3606 extern rtx gen_vec_dupv8sf (rtx, rtx); 3607 extern rtx gen_vec_dupv4di (rtx, rtx); 3608 extern rtx gen_vec_dupv4df (rtx, rtx); 3609 extern rtx gen_avx2_vbroadcasti128_v32qi (rtx, rtx); 3610 extern rtx gen_avx2_vbroadcasti128_v16hi (rtx, rtx); 3611 extern rtx gen_avx2_vbroadcasti128_v8si (rtx, rtx); 3612 extern rtx gen_avx2_vbroadcasti128_v4di (rtx, rtx); 3613 extern rtx gen_avx_vbroadcastf128_v32qi (rtx, rtx); 3614 extern rtx gen_avx_vbroadcastf128_v16hi (rtx, rtx); 3615 extern rtx gen_avx_vbroadcastf128_v8si (rtx, rtx); 3616 extern rtx gen_avx_vbroadcastf128_v4di (rtx, rtx); 3617 extern rtx gen_avx_vbroadcastf128_v8sf (rtx, rtx); 3618 extern rtx gen_avx_vbroadcastf128_v4df (rtx, rtx); 3619 extern rtx gen_avx_vpermilvarv8sf3 (rtx, rtx, rtx); 3620 extern rtx gen_avx_vpermilvarv4sf3 (rtx, rtx, rtx); 3621 extern rtx gen_avx_vpermilvarv4df3 (rtx, rtx, rtx); 3622 extern rtx gen_avx_vpermilvarv2df3 (rtx, rtx, rtx); 3623 extern rtx gen_avx2_vec_set_lo_v4di (rtx, rtx, rtx); 3624 extern rtx gen_avx2_vec_set_hi_v4di (rtx, rtx, rtx); 3625 extern rtx gen_vec_set_lo_v4di (rtx, rtx, rtx); 3626 extern rtx gen_vec_set_lo_v4df (rtx, rtx, rtx); 3627 extern rtx gen_vec_set_hi_v4di (rtx, rtx, rtx); 3628 extern rtx gen_vec_set_hi_v4df (rtx, rtx, rtx); 3629 extern rtx gen_vec_set_lo_v8si (rtx, rtx, rtx); 3630 extern rtx gen_vec_set_lo_v8sf (rtx, rtx, rtx); 3631 extern rtx gen_vec_set_hi_v8si (rtx, rtx, rtx); 3632 extern rtx gen_vec_set_hi_v8sf (rtx, rtx, rtx); 3633 extern rtx gen_vec_set_lo_v16hi (rtx, rtx, rtx); 3634 extern rtx gen_vec_set_hi_v16hi (rtx, rtx, rtx); 3635 extern rtx gen_vec_set_lo_v32qi (rtx, rtx, rtx); 3636 extern rtx gen_vec_set_hi_v32qi (rtx, rtx, rtx); 3637 extern rtx gen_avx_maskloadps (rtx, rtx, rtx); 3638 extern rtx gen_avx_maskloadpd (rtx, rtx, rtx); 3639 extern rtx gen_avx_maskloadps256 (rtx, rtx, rtx); 3640 extern rtx gen_avx_maskloadpd256 (rtx, rtx, rtx); 3641 extern rtx gen_avx2_maskloadd (rtx, rtx, rtx); 3642 extern rtx gen_avx2_maskloadq (rtx, rtx, rtx); 3643 extern rtx gen_avx2_maskloadd256 (rtx, rtx, rtx); 3644 extern rtx gen_avx2_maskloadq256 (rtx, rtx, rtx); 3645 extern rtx gen_avx_maskstoreps (rtx, rtx, rtx); 3646 extern rtx gen_avx_maskstorepd (rtx, rtx, rtx); 3647 extern rtx gen_avx_maskstoreps256 (rtx, rtx, rtx); 3648 extern rtx gen_avx_maskstorepd256 (rtx, rtx, rtx); 3649 extern rtx gen_avx2_maskstored (rtx, rtx, rtx); 3650 extern rtx gen_avx2_maskstoreq (rtx, rtx, rtx); 3651 extern rtx gen_avx2_maskstored256 (rtx, rtx, rtx); 3652 extern rtx gen_avx2_maskstoreq256 (rtx, rtx, rtx); 3653 extern rtx gen_avx_si256_si (rtx, rtx); 3654 extern rtx gen_avx_ps256_ps (rtx, rtx); 3655 extern rtx gen_avx_pd256_pd (rtx, rtx); 3656 extern rtx gen_avx2_ashrvv8si (rtx, rtx, rtx); 3657 extern rtx gen_avx2_ashrvv4si (rtx, rtx, rtx); 3658 extern rtx gen_avx2_ashlvv8si (rtx, rtx, rtx); 3659 extern rtx gen_avx2_lshrvv8si (rtx, rtx, rtx); 3660 extern rtx gen_avx2_ashlvv4si (rtx, rtx, rtx); 3661 extern rtx gen_avx2_lshrvv4si (rtx, rtx, rtx); 3662 extern rtx gen_avx2_ashlvv4di (rtx, rtx, rtx); 3663 extern rtx gen_avx2_lshrvv4di (rtx, rtx, rtx); 3664 extern rtx gen_avx2_ashlvv2di (rtx, rtx, rtx); 3665 extern rtx gen_avx2_lshrvv2di (rtx, rtx, rtx); 3666 extern rtx gen_avx_vec_concatv32qi (rtx, rtx, rtx); 3667 extern rtx gen_avx_vec_concatv16hi (rtx, rtx, rtx); 3668 extern rtx gen_avx_vec_concatv8si (rtx, rtx, rtx); 3669 extern rtx gen_avx_vec_concatv4di (rtx, rtx, rtx); 3670 extern rtx gen_avx_vec_concatv8sf (rtx, rtx, rtx); 3671 extern rtx gen_avx_vec_concatv4df (rtx, rtx, rtx); 3672 extern rtx gen_vcvtph2ps (rtx, rtx); 3673 extern rtx gen_vcvtph2ps256 (rtx, rtx); 3674 extern rtx gen_vcvtps2ph256 (rtx, rtx, rtx); 3675 extern rtx gen_mfence_sse2 (rtx); 3676 extern rtx gen_mfence_nosse (rtx); 3677 extern rtx gen_atomic_loaddi_fpu (rtx, rtx, rtx); 3678 extern rtx gen_atomic_storeqi_1 (rtx, rtx, rtx); 3679 extern rtx gen_atomic_storehi_1 (rtx, rtx, rtx); 3680 extern rtx gen_atomic_storesi_1 (rtx, rtx, rtx); 3681 extern rtx gen_atomic_storedi_1 (rtx, rtx, rtx); 3682 extern rtx gen_atomic_storedi_fpu (rtx, rtx, rtx); 3683 extern rtx gen_loaddi_via_fpu (rtx, rtx); 3684 extern rtx gen_storedi_via_fpu (rtx, rtx); 3685 extern rtx gen_atomic_compare_and_swapqi_1 (rtx, rtx, rtx, rtx, rtx); 3686 extern rtx gen_atomic_compare_and_swaphi_1 (rtx, rtx, rtx, rtx, rtx); 3687 extern rtx gen_atomic_compare_and_swapsi_1 (rtx, rtx, rtx, rtx, rtx); 3688 extern rtx gen_atomic_compare_and_swapdi_1 (rtx, rtx, rtx, rtx, rtx); 3689 extern rtx gen_atomic_compare_and_swapdi_doubleword (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx); 3690 extern rtx gen_atomic_compare_and_swapti_doubleword (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx); 3691 extern rtx gen_atomic_fetch_addqi (rtx, rtx, rtx, rtx); 3692 extern rtx gen_atomic_fetch_addhi (rtx, rtx, rtx, rtx); 3693 extern rtx gen_atomic_fetch_addsi (rtx, rtx, rtx, rtx); 3694 extern rtx gen_atomic_fetch_adddi (rtx, rtx, rtx, rtx); 3695 extern rtx gen_atomic_exchangeqi (rtx, rtx, rtx, rtx); 3696 extern rtx gen_atomic_exchangehi (rtx, rtx, rtx, rtx); 3697 extern rtx gen_atomic_exchangesi (rtx, rtx, rtx, rtx); 3698 extern rtx gen_atomic_exchangedi (rtx, rtx, rtx, rtx); 3699 extern rtx gen_atomic_addqi (rtx, rtx, rtx); 3700 extern rtx gen_atomic_addhi (rtx, rtx, rtx); 3701 extern rtx gen_atomic_addsi (rtx, rtx, rtx); 3702 extern rtx gen_atomic_adddi (rtx, rtx, rtx); 3703 extern rtx gen_atomic_subqi (rtx, rtx, rtx); 3704 extern rtx gen_atomic_subhi (rtx, rtx, rtx); 3705 extern rtx gen_atomic_subsi (rtx, rtx, rtx); 3706 extern rtx gen_atomic_subdi (rtx, rtx, rtx); 3707 extern rtx gen_atomic_andqi (rtx, rtx, rtx); 3708 extern rtx gen_atomic_orqi (rtx, rtx, rtx); 3709 extern rtx gen_atomic_xorqi (rtx, rtx, rtx); 3710 extern rtx gen_atomic_andhi (rtx, rtx, rtx); 3711 extern rtx gen_atomic_orhi (rtx, rtx, rtx); 3712 extern rtx gen_atomic_xorhi (rtx, rtx, rtx); 3713 extern rtx gen_atomic_andsi (rtx, rtx, rtx); 3714 extern rtx gen_atomic_orsi (rtx, rtx, rtx); 3715 extern rtx gen_atomic_xorsi (rtx, rtx, rtx); 3716 extern rtx gen_atomic_anddi (rtx, rtx, rtx); 3717 extern rtx gen_atomic_ordi (rtx, rtx, rtx); 3718 extern rtx gen_atomic_xordi (rtx, rtx, rtx); 3719 extern rtx gen_cbranchqi4 (rtx, rtx, rtx, rtx); 3720 extern rtx gen_cbranchhi4 (rtx, rtx, rtx, rtx); 3721 extern rtx gen_cbranchsi4 (rtx, rtx, rtx, rtx); 3722 extern rtx gen_cbranchdi4 (rtx, rtx, rtx, rtx); 3723 extern rtx gen_cbranchti4 (rtx, rtx, rtx, rtx); 3724 extern rtx gen_cstoreqi4 (rtx, rtx, rtx, rtx); 3725 extern rtx gen_cstorehi4 (rtx, rtx, rtx, rtx); 3726 extern rtx gen_cstoresi4 (rtx, rtx, rtx, rtx); 3727 extern rtx gen_cstoredi4 (rtx, rtx, rtx, rtx); 3728 extern rtx gen_cmpsi_1 (rtx, rtx); 3729 extern rtx gen_cmpdi_1 (rtx, rtx); 3730 extern rtx gen_cmpqi_ext_3 (rtx, rtx); 3731 extern rtx gen_cbranchxf4 (rtx, rtx, rtx, rtx); 3732 extern rtx gen_cstorexf4 (rtx, rtx, rtx, rtx); 3733 extern rtx gen_cbranchsf4 (rtx, rtx, rtx, rtx); 3734 extern rtx gen_cbranchdf4 (rtx, rtx, rtx, rtx); 3735 extern rtx gen_cstoresf4 (rtx, rtx, rtx, rtx); 3736 extern rtx gen_cstoredf4 (rtx, rtx, rtx, rtx); 3737 extern rtx gen_cbranchcc4 (rtx, rtx, rtx, rtx); 3738 extern rtx gen_cstorecc4 (rtx, rtx, rtx, rtx); 3739 extern rtx gen_movoi (rtx, rtx); 3740 extern rtx gen_movti (rtx, rtx); 3741 extern rtx gen_movcdi (rtx, rtx); 3742 extern rtx gen_movqi (rtx, rtx); 3743 extern rtx gen_movhi (rtx, rtx); 3744 extern rtx gen_movsi (rtx, rtx); 3745 extern rtx gen_movdi (rtx, rtx); 3746 extern rtx gen_reload_noff_store (rtx, rtx, rtx); 3747 extern rtx gen_reload_noff_load (rtx, rtx, rtx); 3748 extern rtx gen_movstrictqi (rtx, rtx); 3749 extern rtx gen_movstricthi (rtx, rtx); 3750 extern rtx gen_movsi_insv_1 (rtx, rtx); 3751 extern rtx gen_movdi_insv_1 (rtx, rtx); 3752 extern rtx gen_movtf (rtx, rtx); 3753 extern rtx gen_movsf (rtx, rtx); 3754 extern rtx gen_movdf (rtx, rtx); 3755 extern rtx gen_movxf (rtx, rtx); 3756 extern rtx gen_zero_extendsidi2 (rtx, rtx); 3757 extern rtx gen_zero_extendqisi2 (rtx, rtx); 3758 extern rtx gen_zero_extendhisi2 (rtx, rtx); 3759 extern rtx gen_zero_extendqihi2 (rtx, rtx); 3760 extern rtx gen_extendsidi2 (rtx, rtx); 3761 extern rtx gen_extendsfdf2 (rtx, rtx); 3762 extern rtx gen_extendsfxf2 (rtx, rtx); 3763 extern rtx gen_extenddfxf2 (rtx, rtx); 3764 extern rtx gen_truncdfsf2 (rtx, rtx); 3765 extern rtx gen_truncdfsf2_with_temp (rtx, rtx, rtx); 3766 extern rtx gen_truncxfsf2 (rtx, rtx); 3767 extern rtx gen_truncxfdf2 (rtx, rtx); 3768 extern rtx gen_fix_truncxfdi2 (rtx, rtx); 3769 extern rtx gen_fix_truncsfdi2 (rtx, rtx); 3770 extern rtx gen_fix_truncdfdi2 (rtx, rtx); 3771 extern rtx gen_fix_truncxfsi2 (rtx, rtx); 3772 extern rtx gen_fix_truncsfsi2 (rtx, rtx); 3773 extern rtx gen_fix_truncdfsi2 (rtx, rtx); 3774 extern rtx gen_fix_truncsfhi2 (rtx, rtx); 3775 extern rtx gen_fix_truncdfhi2 (rtx, rtx); 3776 extern rtx gen_fix_truncxfhi2 (rtx, rtx); 3777 extern rtx gen_fixuns_truncsfsi2 (rtx, rtx); 3778 extern rtx gen_fixuns_truncdfsi2 (rtx, rtx); 3779 extern rtx gen_fixuns_truncsfhi2 (rtx, rtx); 3780 extern rtx gen_fixuns_truncdfhi2 (rtx, rtx); 3781 extern rtx gen_floathisf2 (rtx, rtx); 3782 extern rtx gen_floathidf2 (rtx, rtx); 3783 extern rtx gen_floathixf2 (rtx, rtx); 3784 extern rtx gen_floatsisf2 (rtx, rtx); 3785 extern rtx gen_floatsidf2 (rtx, rtx); 3786 extern rtx gen_floatsixf2 (rtx, rtx); 3787 extern rtx gen_floatdisf2 (rtx, rtx); 3788 extern rtx gen_floatdidf2 (rtx, rtx); 3789 extern rtx gen_floatdixf2 (rtx, rtx); 3790 extern rtx gen_floatunssisf2 (rtx, rtx); 3791 extern rtx gen_floatunssidf2 (rtx, rtx); 3792 extern rtx gen_floatunssixf2 (rtx, rtx); 3793 extern rtx gen_floatunsdisf2 (rtx, rtx); 3794 extern rtx gen_floatunsdidf2 (rtx, rtx); 3795 extern rtx gen_addqi3 (rtx, rtx, rtx); 3796 extern rtx gen_addhi3 (rtx, rtx, rtx); 3797 extern rtx gen_addsi3 (rtx, rtx, rtx); 3798 extern rtx gen_adddi3 (rtx, rtx, rtx); 3799 extern rtx gen_addti3 (rtx, rtx, rtx); 3800 extern rtx gen_subqi3 (rtx, rtx, rtx); 3801 extern rtx gen_subhi3 (rtx, rtx, rtx); 3802 extern rtx gen_subsi3 (rtx, rtx, rtx); 3803 extern rtx gen_subdi3 (rtx, rtx, rtx); 3804 extern rtx gen_subti3 (rtx, rtx, rtx); 3805 extern rtx gen_addqi3_carry (rtx, rtx, rtx, rtx, rtx); 3806 extern rtx gen_subqi3_carry (rtx, rtx, rtx, rtx, rtx); 3807 extern rtx gen_addhi3_carry (rtx, rtx, rtx, rtx, rtx); 3808 extern rtx gen_subhi3_carry (rtx, rtx, rtx, rtx, rtx); 3809 extern rtx gen_addsi3_carry (rtx, rtx, rtx, rtx, rtx); 3810 extern rtx gen_subsi3_carry (rtx, rtx, rtx, rtx, rtx); 3811 extern rtx gen_adddi3_carry (rtx, rtx, rtx, rtx, rtx); 3812 extern rtx gen_subdi3_carry (rtx, rtx, rtx, rtx, rtx); 3813 extern rtx gen_addxf3 (rtx, rtx, rtx); 3814 extern rtx gen_subxf3 (rtx, rtx, rtx); 3815 extern rtx gen_addsf3 (rtx, rtx, rtx); 3816 extern rtx gen_subsf3 (rtx, rtx, rtx); 3817 extern rtx gen_adddf3 (rtx, rtx, rtx); 3818 extern rtx gen_subdf3 (rtx, rtx, rtx); 3819 extern rtx gen_mulhi3 (rtx, rtx, rtx); 3820 extern rtx gen_mulsi3 (rtx, rtx, rtx); 3821 extern rtx gen_muldi3 (rtx, rtx, rtx); 3822 extern rtx gen_mulqi3 (rtx, rtx, rtx); 3823 extern rtx gen_mulsidi3 (rtx, rtx, rtx); 3824 extern rtx gen_umulsidi3 (rtx, rtx, rtx); 3825 extern rtx gen_mulditi3 (rtx, rtx, rtx); 3826 extern rtx gen_umulditi3 (rtx, rtx, rtx); 3827 extern rtx gen_mulqihi3