| /external/mesa3d/src/mesa/drivers/dri/r200/ |
| r200_tex.h | 75 [ MESA_FORMAT_A1R5G5B5_UNORM ] = { R200_TXFORMAT_ARGB1555 | R200_TXFORMAT_ALPHA_IN_MAP, 0 },
105 [ MESA_FORMAT_A1R5G5B5_UNORM ] = { R200_TXFORMAT_ARGB1555 | R200_TXFORMAT_ALPHA_IN_MAP, 0 },
|
| r200_blit.c | 69 case MESA_FORMAT_A1R5G5B5_UNORM:
160 case MESA_FORMAT_A1R5G5B5_UNORM:
342 case MESA_FORMAT_A1R5G5B5_UNORM:
|
| r200_state_init.c | 463 case MESA_FORMAT_A1R5G5B5_UNORM:
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/radeon/ |
| radeon_tex.h | 74 [ MESA_FORMAT_A1R5G5B5_UNORM ] = { RADEON_TXFORMAT_ARGB1555 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 },
|
| radeon_pixel_read.c | 73 return MESA_FORMAT_A1R5G5B5_UNORM;
|
| radeon_blit.c | 66 case MESA_FORMAT_A1R5G5B5_UNORM:
191 case MESA_FORMAT_A1R5G5B5_UNORM:
|
| radeon_texture.c | 619 _radeon_texformat_argb1555 = MESA_FORMAT_A1R5G5B5_UNORM;
|
| radeon_state_init.c | 347 case MESA_FORMAT_A1R5G5B5_UNORM:
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/nouveau/ |
| nv04_surface.c | 52 case MESA_FORMAT_A1R5G5B5_UNORM:
91 case MESA_FORMAT_A1R5G5B5_UNORM:
130 case MESA_FORMAT_A1R5G5B5_UNORM:
169 case MESA_FORMAT_A1R5G5B5_UNORM:
|
| /external/mesa3d/src/mesa/main/ |
| formats.h | 355 MESA_FORMAT_A1R5G5B5_UNORM, /* BBBB BGGG GGRR RRRA */
|
| formats.c | 980 case MESA_FORMAT_A1R5G5B5_UNORM:
[all...] |
| formats.csv | 73 MESA_FORMAT_A1R5G5B5_UNORM , packed, 1, 1, 1, un1 , un5 , un5 , un5 , yzwx, rgb
|
| glformats.c | [all...] |
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_surface_formats.c | 57 [MESA_FORMAT_A1R5G5B5_UNORM] = 0,
|
| /external/mesa3d/prebuilt-intermediates/main/ |
| format_info.h | 282 MESA_FORMAT_A1R5G5B5_UNORM,
283 "MESA_FORMAT_A1R5G5B5_UNORM",
[all...] |
| format_pack.c | [all...] |
| format_unpack.c | [all...] |
