/prebuilts/go/darwin-x86/src/runtime/ |
tls_arm.s | 39 // If the host does not support MRC the linker will replace it with 42 MRC 15, 0, R0, C13, C0, 3 // fetch TLS base pointer 60 MRC 15, 0, R0, C13, C0, 3 // fetch TLS base pointer 84 MRC 15, 0, R0, C13, C0, 3 // load TLS base pointer
|
/prebuilts/go/linux-x86/src/runtime/ |
tls_arm.s | 39 // If the host does not support MRC the linker will replace it with 42 MRC 15, 0, R0, C13, C0, 3 // fetch TLS base pointer 60 MRC 15, 0, R0, C13, C0, 3 // fetch TLS base pointer 84 MRC 15, 0, R0, C13, C0, 3 // load TLS base pointer
|
/external/arm-neon-tests/ |
InitCache.s | 18 MRC p15, 0, r0, c1, c0, 0 ; read CP15 register 1 into r0 30 MRC p15, 0, r0, c1, c0, 1 ; Read Auxiliary Control Register 42 MRC p15, 0, r0, c1, c0, 0 ; read CP15 register 1 into r0
|
Init.s | 33 MRC p15, 0, r0, c1, c0, 0 ; Read CP15 Control Register into r0 59 MRC p15, 1, r0, c0, c0, 1 ; Read CLIDR 66 MRC p15, 1, r0, c0, c0, 1 ; Read CLIDR 81 MRC p15, 1, r1, c0, c0, 0 ; Reads current Cache Size ID register 205 MRC p15, 0, r0, c3, c0, 0 ; Read Domain Access Control Register 221 MRC p15, 0, r0, c1, c0, 2 ; read CP access register 242 MRC p15, 0, r0, c1, c0, 0 ; read CP15 register 1 into r0
|
/prebuilts/go/darwin-x86/src/cmd/internal/obj/arm/ |
anames.go | 144 "MRC",
|
a.out.go | 336 AMRC // MRC/MCR
|
obj5.go | 57 // Treat MRC 15, 0, <reg>, C13, C0, 3 specially. 63 ctxt.Diag("%v: TLS MRC instruction must write to R0 as it might get translated into a BL instruction", p.Line()) 100 // Otherwise, MRC/MCR instructions need no further treatment.
|
/prebuilts/go/linux-x86/src/cmd/internal/obj/arm/ |
anames.go | 144 "MRC",
|
a.out.go | 336 AMRC // MRC/MCR
|
obj5.go | 57 // Treat MRC 15, 0, <reg>, C13, C0, 3 specially. 63 ctxt.Diag("%v: TLS MRC instruction must write to R0 as it might get translated into a BL instruction", p.Line()) 100 // Otherwise, MRC/MCR instructions need no further treatment.
|
/toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
copro.s | 20 mrc 2, 3, r5, c1, c2 49 # UAL-syntax for MRC with APSR. Pre-UAL was PC
|
thumb2_bad_reg.s | 216 @ MRC 217 mrc p0, #1, r13, cr0, cr0 218 mrc p0, #1, r15, cr0, cr0 @ OK
|
/prebuilts/go/darwin-x86/src/cmd/asm/internal/arch/ |
arm.go | 111 // It is encoded as an MRC with a bit inside the instruction word, 116 // MRC or MCR 144 // ARMMRCOffset implements the peculiar encoding of the MRC and MCR instructions. 145 // The difference between MRC and MCR is represented by a bit high in the word, not 147 // we return the opcode for MRC so that asm doesn't need to import obj/arm. 158 (op1 << 20) | // MCR/MRC
|
arch.go | 220 // MCR differs from MRC by the way fields of the word are encoded.
|
/prebuilts/go/linux-x86/src/cmd/asm/internal/arch/ |
arm.go | 111 // It is encoded as an MRC with a bit inside the instruction word, 116 // MRC or MCR 144 // ARMMRCOffset implements the peculiar encoding of the MRC and MCR instructions. 145 // The difference between MRC and MCR is represented by a bit high in the word, not 147 // we return the opcode for MRC so that asm doesn't need to import obj/arm. 158 (op1 << 20) | // MCR/MRC
|
arch.go | 220 // MCR differs from MRC by the way fields of the word are encoded.
|
/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
thumb2-diagnostics.s | 32 @ Out of range immediates for MRC/MRC2/MRRC/MRRC2 33 mrc p14, #8, r1, c1, c2, #4 34 mrc p14, #1, r1, c1, c2, #8
|
diagnostics.s | 107 @ Out of range immediates for MRC/MRC2/MRRC/MRRC2 108 mrc p14, #8, r1, c1, c2, #4 109 mrc p14, #1, r1, c1, c2, #8
|
/external/dhcpcd-6.8.2/ |
dhcp6.h | 179 unsigned int MRC;
|
dhcp6.c | 1169 if (state->MRC == 0 || state->RTC < state->MRC) 1172 else if (state->MRC != 0 && state->MRCcallback) 1247 state->MRC = 0; [all...] |
/prebuilts/go/darwin-x86/src/cmd/asm/internal/asm/ |
asm.go | 729 // Strange special case: MCR, MRC. 738 offset, MRC, ok := arch.ARMMRCOffset(op, cond, x0, x1, x2, x3, x4, x5) 744 prog.As = MRC // Both instructions are coded as MRC.
|
/prebuilts/go/linux-x86/src/cmd/asm/internal/asm/ |
asm.go | 729 // Strange special case: MCR, MRC. 738 offset, MRC, ok := arch.ARMMRCOffset(op, cond, x0, x1, x2, x3, x4, x5) 744 prog.As = MRC // Both instructions are coded as MRC.
|
/external/llvm/test/MC/ARM/ |
thumb2-diagnostics.s | 35 @ Out of range immediates for MRC/MRC2/MRRC/MRRC2 36 mrc p14, #8, r1, c1, c2, #4 37 mrc p14, #1, r1, c1, c2, #8
|
diagnostics.s | 175 @ Out of range immediates for MRC/MRC2/MRRC/MRRC2 176 mrc p14, #8, r1, c1, c2, #4 177 mrc p14, #1, r1, c1, c2, #8
|
/external/llvm/lib/Target/ARM/InstPrinter/ |
ARMInstPrinter.cpp | 242 const MCRegisterClass &MRC = MRI.getRegClass(ARM::GPRRegClassID); 245 if (MRC.contains(Reg)) { [all...] |