1 // Inferno utils/5c/5.out.h 2 // https://bitbucket.org/inferno-os/inferno-os/src/default/utils/5c/5.out.h 3 // 4 // Copyright 1994-1999 Lucent Technologies Inc. All rights reserved. 5 // Portions Copyright 1995-1997 C H Forsyth (forsyth (a] terzarima.net) 6 // Portions Copyright 1997-1999 Vita Nuova Limited 7 // Portions Copyright 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com) 8 // Portions Copyright 2004,2006 Bruce Ellis 9 // Portions Copyright 2005-2007 C H Forsyth (forsyth (a] terzarima.net) 10 // Revisions Copyright 2000-2007 Lucent Technologies Inc. and others 11 // Portions Copyright 2009 The Go Authors. All rights reserved. 12 // 13 // Permission is hereby granted, free of charge, to any person obtaining a copy 14 // of this software and associated documentation files (the "Software"), to deal 15 // in the Software without restriction, including without limitation the rights 16 // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 // copies of the Software, and to permit persons to whom the Software is 18 // furnished to do so, subject to the following conditions: 19 // 20 // The above copyright notice and this permission notice shall be included in 21 // all copies or substantial portions of the Software. 22 // 23 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 29 // THE SOFTWARE. 30 31 package arm 32 33 import "cmd/internal/obj" 34 35 //go:generate go run ../stringer.go -i $GOFILE -o anames.go -p arm 36 37 const ( 38 NSNAME = 8 39 NSYM = 50 40 NREG = 16 41 ) 42 43 /* -1 disables use of REGARG */ 44 const ( 45 REGARG = -1 46 ) 47 48 const ( 49 REG_R0 = obj.RBaseARM + iota // must be 16-aligned 50 REG_R1 51 REG_R2 52 REG_R3 53 REG_R4 54 REG_R5 55 REG_R6 56 REG_R7 57 REG_R8 58 REG_R9 59 REG_R10 60 REG_R11 61 REG_R12 62 REG_R13 63 REG_R14 64 REG_R15 65 66 REG_F0 // must be 16-aligned 67 REG_F1 68 REG_F2 69 REG_F3 70 REG_F4 71 REG_F5 72 REG_F6 73 REG_F7 74 REG_F8 75 REG_F9 76 REG_F10 77 REG_F11 78 REG_F12 79 REG_F13 80 REG_F14 81 REG_F15 82 83 REG_FPSR // must be 2-aligned 84 REG_FPCR 85 86 REG_CPSR // must be 2-aligned 87 REG_SPSR 88 89 MAXREG 90 REGRET = REG_R0 91 /* compiler allocates R1 up as temps */ 92 /* compiler allocates register variables R3 up */ 93 /* compiler allocates external registers R10 down */ 94 REGEXT = REG_R10 95 /* these two registers are declared in runtime.h */ 96 REGG = REGEXT - 0 97 REGM = REGEXT - 1 98 99 REGCTXT = REG_R7 100 REGTMP = REG_R11 101 REGSP = REG_R13 102 REGLINK = REG_R14 103 REGPC = REG_R15 104 105 NFREG = 16 106 /* compiler allocates register variables F0 up */ 107 /* compiler allocates external registers F7 down */ 108 FREGRET = REG_F0 109 FREGEXT = REG_F7 110 FREGTMP = REG_F15 111 ) 112 113 const ( 114 C_NONE = iota 115 C_REG 116 C_REGREG 117 C_REGREG2 118 C_REGLIST 119 C_SHIFT /* register shift R>>x */ 120 C_SHIFTADDR /* memory address with shifted offset R>>x(R) */ 121 C_FREG 122 C_PSR 123 C_FCR 124 125 C_RCON /* 0xff rotated */ 126 C_NCON /* ~RCON */ 127 C_RCON2A /* OR of two disjoint C_RCON constants */ 128 C_RCON2S /* subtraction of two disjoint C_RCON constants */ 129 C_SCON /* 0xffff */ 130 C_LCON 131 C_LCONADDR 132 C_ZFCON 133 C_SFCON 134 C_LFCON 135 136 C_RACON 137 C_LACON 138 139 C_SBRA 140 C_LBRA 141 142 C_HAUTO /* halfword insn offset (-0xff to 0xff) */ 143 C_FAUTO /* float insn offset (0 to 0x3fc, word aligned) */ 144 C_HFAUTO /* both H and F */ 145 C_SAUTO /* -0xfff to 0xfff */ 146 C_LAUTO 147 148 C_HOREG 149 C_FOREG 150 C_HFOREG 151 C_SOREG 152 C_ROREG 153 C_SROREG /* both nil and R */ 154 C_LOREG 155 156 C_PC 157 C_SP 158 C_HREG 159 160 C_ADDR /* reference to relocatable address */ 161 162 // TLS "var" in local exec mode: will become a constant offset from 163 // thread local base that is ultimately chosen by the program linker. 164 C_TLS_LE 165 166 // TLS "var" in initial exec mode: will become a memory address (chosen 167 // by the program linker) that the dynamic linker will fill with the 168 // offset from the thread local base. 169 C_TLS_IE 170 171 C_TEXTSIZE 172 173 C_GOK 174 175 C_NCLASS /* must be the last */ 176 ) 177 178 const ( 179 AAND = obj.ABaseARM + obj.A_ARCHSPECIFIC + iota 180 AEOR 181 ASUB 182 ARSB 183 AADD 184 AADC 185 ASBC 186 ARSC 187 ATST 188 ATEQ 189 ACMP 190 ACMN 191 AORR 192 ABIC 193 194 AMVN 195 196 /* 197 * Do not reorder or fragment the conditional branch 198 * opcodes, or the predication code will break 199 */ 200 ABEQ 201 ABNE 202 ABCS 203 ABHS 204 ABCC 205 ABLO 206 ABMI 207 ABPL 208 ABVS 209 ABVC 210 ABHI 211 ABLS 212 ABGE 213 ABLT 214 ABGT 215 ABLE 216 217 AMOVWD 218 AMOVWF 219 AMOVDW 220 AMOVFW 221 AMOVFD 222 AMOVDF 223 AMOVF 224 AMOVD 225 226 ACMPF 227 ACMPD 228 AADDF 229 AADDD 230 ASUBF 231 ASUBD 232 AMULF 233 AMULD 234 ANMULF 235 ANMULD 236 AMULAF 237 AMULAD 238 ANMULAF 239 ANMULAD 240 AMULSF 241 AMULSD 242 ANMULSF 243 ANMULSD 244 AFMULAF 245 AFMULAD 246 AFNMULAF 247 AFNMULAD 248 AFMULSF 249 AFMULSD 250 AFNMULSF 251 AFNMULSD 252 ADIVF 253 ADIVD 254 ASQRTF 255 ASQRTD 256 AABSF 257 AABSD 258 ANEGF 259 ANEGD 260 261 ASRL 262 ASRA 263 ASLL 264 AMULU 265 ADIVU 266 AMUL 267 AMMUL 268 ADIV 269 AMOD 270 AMODU 271 ADIVHW 272 ADIVUHW 273 274 AMOVB 275 AMOVBS 276 AMOVBU 277 AMOVH 278 AMOVHS 279 AMOVHU 280 AMOVW 281 AMOVM 282 ASWPBU 283 ASWPW 284 285 ARFE 286 ASWI 287 AMULA 288 AMULS 289 AMMULA 290 AMMULS 291 292 AWORD 293 294 AMULL 295 AMULAL 296 AMULLU 297 AMULALU 298 299 ABX 300 ABXRET 301 ADWORD 302 303 ALDREX 304 ASTREX 305 ALDREXD 306 ASTREXD 307 308 APLD 309 310 ACLZ 311 AREV 312 AREV16 313 AREVSH 314 ARBIT 315 316 AXTAB 317 AXTAH 318 AXTABU 319 AXTAHU 320 321 ABFX 322 ABFXU 323 ABFC 324 ABFI 325 326 AMULWT 327 AMULWB 328 AMULBB 329 AMULAWT 330 AMULAWB 331 AMULABB 332 333 ADATABUNDLE 334 ADATABUNDLEEND 335 336 AMRC // MRC/MCR 337 338 ALAST 339 340 // aliases 341 AB = obj.AJMP 342 ABL = obj.ACALL 343 ) 344 345 /* scond byte */ 346 const ( 347 C_SCOND = (1 << 4) - 1 348 C_SBIT = 1 << 4 349 C_PBIT = 1 << 5 350 C_WBIT = 1 << 6 351 C_FBIT = 1 << 7 /* psr flags-only */ 352 C_UBIT = 1 << 7 /* up bit, unsigned bit */ 353 354 // These constants are the ARM condition codes encodings, 355 // XORed with 14 so that C_SCOND_NONE has value 0, 356 // so that a zeroed Prog.scond means "always execute". 357 C_SCOND_XOR = 14 358 359 C_SCOND_EQ = 0 ^ C_SCOND_XOR 360 C_SCOND_NE = 1 ^ C_SCOND_XOR 361 C_SCOND_HS = 2 ^ C_SCOND_XOR 362 C_SCOND_LO = 3 ^ C_SCOND_XOR 363 C_SCOND_MI = 4 ^ C_SCOND_XOR 364 C_SCOND_PL = 5 ^ C_SCOND_XOR 365 C_SCOND_VS = 6 ^ C_SCOND_XOR 366 C_SCOND_VC = 7 ^ C_SCOND_XOR 367 C_SCOND_HI = 8 ^ C_SCOND_XOR 368 C_SCOND_LS = 9 ^ C_SCOND_XOR 369 C_SCOND_GE = 10 ^ C_SCOND_XOR 370 C_SCOND_LT = 11 ^ C_SCOND_XOR 371 C_SCOND_GT = 12 ^ C_SCOND_XOR 372 C_SCOND_LE = 13 ^ C_SCOND_XOR 373 C_SCOND_NONE = 14 ^ C_SCOND_XOR 374 C_SCOND_NV = 15 ^ C_SCOND_XOR 375 376 /* D_SHIFT type */ 377 SHIFT_LL = 0 << 5 378 SHIFT_LR = 1 << 5 379 SHIFT_AR = 2 << 5 380 SHIFT_RR = 3 << 5 381 ) 382
