1 /* 2 * Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef __PLAT_DEF_H__ 8 #define __PLAT_DEF_H__ 9 10 #include <addressmap.h> 11 12 #define RK3399_PRIMARY_CPU 0x0 13 14 /* Special value used to verify platform parameters from BL2 to BL3-1 */ 15 #define RK_BL31_PLAT_PARAM_VAL 0x0f1e2d3c4b5a6978ULL 16 17 /************************************************************************** 18 * UART related constants 19 **************************************************************************/ 20 #define RK3399_BAUDRATE 115200 21 #define RK3399_UART_CLOCK 24000000 22 23 /****************************************************************************** 24 * System counter frequency related constants 25 ******************************************************************************/ 26 #define SYS_COUNTER_FREQ_IN_TICKS 24000000 27 28 /* Base rockchip_platform compatible GIC memory map */ 29 #define BASE_GICD_BASE (GIC500_BASE) 30 #define BASE_GICR_BASE (GIC500_BASE + SIZE_M(1)) 31 32 /***************************************************************************** 33 * CCI-400 related constants 34 ******************************************************************************/ 35 #define PLAT_RK_CCI_CLUSTER0_SL_IFACE_IX 0 36 #define PLAT_RK_CCI_CLUSTER1_SL_IFACE_IX 1 37 38 /****************************************************************************** 39 * sgi, ppi 40 ******************************************************************************/ 41 #define ARM_IRQ_SEC_PHY_TIMER 29 42 43 #define ARM_IRQ_SEC_SGI_0 8 44 #define ARM_IRQ_SEC_SGI_1 9 45 #define ARM_IRQ_SEC_SGI_2 10 46 #define ARM_IRQ_SEC_SGI_3 11 47 #define ARM_IRQ_SEC_SGI_4 12 48 #define ARM_IRQ_SEC_SGI_5 13 49 #define ARM_IRQ_SEC_SGI_6 14 50 #define ARM_IRQ_SEC_SGI_7 15 51 52 /* 53 * Define a list of Group 1 Secure and Group 0 interrupts as per GICv3 54 * terminology. On a GICv2 system or mode, the lists will be merged and treated 55 * as Group 0 interrupts. 56 */ 57 #define RK3399_G1S_IRQS ARM_IRQ_SEC_PHY_TIMER 58 #define RK3399_G0_IRQS ARM_IRQ_SEC_SGI_6 59 60 #endif /* __PLAT_DEF_H__ */ 61
