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    Searched refs:RegisterIndex (Results 1 - 7 of 7) sorted by null

  /device/linaro/bootloader/edk2/OvmfPkg/Library/SmmCpuFeaturesLib/
SmmCpuFeaturesLib.c 538 @param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up table.
550 IN UINTN RegisterIndex,
563 if (mSmmCpuWidthOffset[RegisterIndex].Width32 == 0) {
570 if (Width > mSmmCpuWidthOffset[RegisterIndex].Width32) {
578 CopyMem(Buffer, (UINT8 *)CpuSaveState + mSmmCpuWidthOffset[RegisterIndex].Offset32, Width);
583 if (mSmmCpuWidthOffset[RegisterIndex].Width64 == 0) {
590 if (Width > mSmmCpuWidthOffset[RegisterIndex].Width64) {
597 CopyMem(Buffer, (UINT8 *)CpuSaveState + mSmmCpuWidthOffset[RegisterIndex].Offset64Lo, MIN(4, Width));
602 CopyMem((UINT8 *)Buffer + 4, (UINT8 *)CpuSaveState + mSmmCpuWidthOffset[RegisterIndex].Offset64Hi, Width - 4);
635 UINTN RegisterIndex;
    [all...]
  /device/linaro/bootloader/edk2/UefiCpuPkg/PiSmmCpuDxeSmm/
SmramSaveState.c 265 @param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up table.
277 IN UINTN RegisterIndex,
284 if (RegisterIndex == 0) {
294 if (mSmmCpuWidthOffset[RegisterIndex].Width32 == 0) {
301 if (Width > mSmmCpuWidthOffset[RegisterIndex].Width32) {
309 CopyMem(Buffer, (UINT8 *)CpuSaveState + mSmmCpuWidthOffset[RegisterIndex].Offset32, Width);
314 if (mSmmCpuWidthOffset[RegisterIndex].Width64 == 0) {
321 if (Width > mSmmCpuWidthOffset[RegisterIndex].Width64) {
328 CopyMem(Buffer, (UINT8 *)CpuSaveState + mSmmCpuWidthOffset[RegisterIndex].Offset64Lo, MIN(4, Width));
333 CopyMem((UINT8 *)Buffer + 4, (UINT8 *)CpuSaveState + mSmmCpuWidthOffset[RegisterIndex].Offset64Hi, Width - 4);
    [all...]
  /device/linaro/bootloader/edk2/SourceLevelDebugPkg/Library/PeCoffExtraActionLibDebug/
PeCoffExtraActionLib.c 23 @param RegisterIndex Index of Dr register. The value range is from 0 to 3.
32 IN UINT8 RegisterIndex,
36 return (BOOLEAN) (((Dr7 >> (RegisterIndex * 2)) & (BIT0 | BIT1)) == (BIT0 | BIT1));
  /external/llvm/lib/Target/Sparc/
LeonPasses.cpp 52 for (int RegisterIndex = SP::F0; RegisterIndex <= SP::F31; ++RegisterIndex) {
53 if (!MRI.isPhysRegUsed(RegisterIndex) &&
55 RegisterIndex) != UsedRegisters.end())) {
56 return RegisterIndex;
    [all...]
  /external/mesa3d/src/intel/vulkan/
genX_gpu_memcpy.c 198 .RegisterIndex = 0,
  /device/linaro/bootloader/edk2/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/
DebugAgent.c 851 UINT8 RegisterIndex;
854 RegisterIndex = SetHwBreakpoint->Type.Index;
859 * ((UINTN *) &CpuContext->Dr0 + RegisterIndex) = (UINTN) SetHwBreakpoint->Address;
866 Dr7Value |= (UINTN) (0x3 << (RegisterIndex * 2));
870 Dr7Value &= (UINTN) (~(0xf << (16 + RegisterIndex * 4)));
871 Dr7Value |= (UINTN) ((SetHwBreakpoint->Type.Length << 2) | SetHwBreakpoint->Type.Access) << (16 + RegisterIndex * 4);
    [all...]
  /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/x86_64-w64-mingw32/include/
d3dx9shader.h 109 UINT RegisterIndex;
441 WORD RegisterIndex;

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