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  /external/jemalloc/test/include/test/
SFMT-params11213.h 43 #define SR2 3
SFMT-params1279.h 43 #define SR2 1
SFMT-params132049.h 43 #define SR2 1
SFMT-params19937.h 43 #define SR2 1
SFMT-params216091.h 43 #define SR2 1
SFMT-params2281.h 43 #define SR2 1
SFMT-params4253.h 43 #define SR2 1
SFMT-params44497.h 43 #define SR2 3
SFMT-params607.h 43 #define SR2 3
SFMT-params86243.h 43 #define SR2 1
SFMT-sse2.h 69 z = _mm_srli_si128(c, SR2);
  /toolchain/binutils/binutils-2.27/opcodes/
xc16x-opc.c 770 /* add $dr,[$sr2] */
773 { { MNEM, ' ', OP (DR), ',', '[', OP (SR2), ']', 0 } },
776 /* sub $dr,[$sr2] */
779 { { MNEM, ' ', OP (DR), ',', '[', OP (SR2), ']', 0 } },
782 /* addb $drb,[$sr2] */
785 { { MNEM, ' ', OP (DRB), ',', '[', OP (SR2), ']', 0 } },
788 /* subb $drb,[$sr2] */
791 { { MNEM, ' ', OP (DRB), ',', '[', OP (SR2), ']', 0 } },
794 /* add $dr,[$sr2+] */
797 { { MNEM, ' ', OP (DR), ',', '[', OP (SR2), '+', ']', 0 } }
    [all...]
v850-opc.c 1058 #define SR2 (OLDSR2 + 1)
1062 #define FFF (SR2 + 1)
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  /external/llvm/lib/Target/PowerPC/
PPCFrameLowering.h 53 * \param[out] SR2 The second scratch register. If this pointer is not null
66 unsigned *SR2 = nullptr) const;
PPCFrameLowering.cpp 558 - If MBB is an entry or exit block, set SR1 and SR2 to R0 and R12
565 - If the required registers are found, set SR1 and SR2 and return true.
566 - If the required registers are not found, set SR2 or both SR1 and SR2 to
569 Note that if both SR1 and SR2 are valid parameters and TwoUniqueRegsRequired
571 still return true if only one register is available (and set SR1 == SR2).
578 unsigned *SR2) const {
587 if (SR2) {
589 *SR2 = R12;
644 if (SR2) {
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  /device/google/contexthub/firmware/os/platform/stm32/
i2c.c 116 volatile uint32_t SR2;
419 /* clear ADDR by doing a dummy reads from SR1 (already read) then SR2 */
420 (void)regs->SR2;
635 regs->SR2; // Clear ADDR
644 regs->SR2; // Clear ADDR
694 osLog(LOG_ERROR, "Unexpected I2C ERR interrupt: SR1 = %04lX, SR2 = %04lX\n",
695 regs->SR1, regs->SR2);
715 if (regs->SR2 & I2C_SR2_TRA)
  /external/llvm/lib/Target/Hexagon/
HexagonGenMux.cpp 261 // SR1, SR2 - source registers from the first and the second definition.
268 unsigned SR2 = Src2->isReg() ? Src2->getReg() : 0;
278 if (CanUp && DU.Defs[SR2])
  /external/jemalloc/test/src/
SFMT.c 250 rshift128(&y, c, SR2);
267 rshift128(&y, c, SR2);
  /external/fec/
config.guess 306 SR2?01:HI-UX/MPP:*:* | SR8000:HI-UX/MPP:*:*)
    [all...]
  /external/icu/icu4c/source/
config.guess 327 SR2?01:HI-UX/MPP:*:* | SR8000:HI-UX/MPP:*:*)
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  /external/libunwind/aux/
config.guess 302 SR2?01:HI-UX/MPP:*:* | SR8000:HI-UX/MPP:*:*)
    [all...]
  /external/llvm/cmake/
config.guess 314 SR2?01:HI-UX/MPP:*:* | SR8000:HI-UX/MPP:*:*)
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  /external/swiftshader/third_party/LLVM/autoconf/
config.guess 310 SR2?01:HI-UX/MPP:*:* | SR8000:HI-UX/MPP:*:*)
    [all...]
  /external/swiftshader/third_party/LLVM/projects/sample/autoconf/
config.guess 309 SR2?01:HI-UX/MPP:*:* | SR8000:HI-UX/MPP:*:*)
    [all...]
  /external/ImageMagick/config/
config.guess 327 SR2?01:HI-UX/MPP:*:* | SR8000:HI-UX/MPP:*:*)
    [all...]

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