| /external/llvm/lib/Target/PowerPC/ |
| PPCRegisterInfo.cpp | 518 // rlwinm rA, rA, ShiftBits, 0, 31.
563 unsigned ShiftBits = getEncodingValue(DestReg)*4;
564 // rlwinm r11, r11, 32-ShiftBits, 0, 31.
566 .addReg(Reg1, RegState::Kill).addImm(32-ShiftBits).addImm(0)
607 // rlwinm rA, rA, ShiftBits, 0, 0.
650 unsigned ShiftBits = getEncodingValue(DestReg);
651 // rlwimi r11, r10, 32-ShiftBits, ..., ...
655 .addImm(ShiftBits ? 32 - ShiftBits : 0)
656 .addImm(ShiftBits)
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| PPCInstrInfo.cpp | 405 unsigned ShiftBits = getPPCRegisterNumbering(SrcReg)*4;
406 // rlwinm scratch, scratch, ShiftBits, 0, 31.
408 .addReg(ScratchReg).addImm(ShiftBits)
540 unsigned ShiftBits = getPPCRegisterNumbering(DestReg)*4;
541 // rlwinm r11, r11, 32-ShiftBits, 0, 31.
543 .addReg(ScratchReg).addImm(32-ShiftBits).addImm(0)
|
| /external/swiftshader/third_party/LLVM/lib/Analysis/ |
| BasicAliasAnalysis.cpp | 372 if (unsigned ShiftBits = 64-TD->getPointerSizeInBits()) {
373 Scale <<= ShiftBits;
374 Scale = (int64_t)Scale >> ShiftBits;
[all...] |
| /external/llvm/lib/Analysis/ |
| BasicAliasAnalysis.cpp | 329 unsigned ShiftBits = 64 - PointerSize;
330 return (int64_t)((uint64_t)Offset << ShiftBits) >> ShiftBits;
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| TargetLowering.cpp | [all...] |
| DAGCombiner.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
