| /prebuilts/go/darwin-x86/src/cmd/asm/internal/asm/testdata/ |
| arm64error.s | 14 ADDS R1.UXTX<<7, R2, R3 // ERROR "shift amount out of range 0 to 4"
|
| arm64.s | 35 ADD R18.UXTX, R14, R17 // d161328b
39 SUBW R1.UXTX<<1, R3, R2 // 6264214b
40 SUBS R3.UXTX, R8, R9 // 096123eb
|
| /prebuilts/go/linux-x86/src/cmd/asm/internal/asm/testdata/ |
| arm64error.s | 14 ADDS R1.UXTX<<7, R2, R3 // ERROR "shift amount out of range 0 to 4"
|
| arm64.s | 35 ADD R18.UXTX, R14, R17 // d161328b
39 SUBW R1.UXTX<<1, R3, R2 // 6264214b
40 SUBS R3.UXTX, R8, R9 // 096123eb
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/aarch64/ |
| addsub.s | 29 // or implicitly UXTX, SXTX or LSL; otherwise it Wm.
31 .ifnc \extend, UXTX
102 .irp extend, UXTB, UXTH, UXTW, UXTX, SXTB, SXTH, SXTW, SXTX
|
| illegal.s | 482 add x0, x1, #20, UXTX #12
|
| /external/vixl/src/aarch64/ |
| operands-aarch64.cc | 321 // Extend modes SXTX and UXTX require a 64-bit register.
322 VIXL_ASSERT(reg.Is64Bits() || ((extend != SXTX) && (extend != UXTX)));
342 (((extend_ == UXTX) || (extend_ == SXTX)) && (shift_amount_ == 0)));
368 return Operand(reg_, reg_.Is64Bits() ? UXTX : UXTW, shift_amount_);
|
| disasm-aarch64.cc | 165 const char *form = ((mode == UXTX) || (mode == SXTX)) ? "'Rds, 'Rns, 'Xm'Ext"
168 ((mode == UXTX) || (mode == SXTX)) ? "'Rns, 'Xm'Ext" : "'Rns, 'Wm'Ext";
[all...] |
| macro-assembler-aarch64.cc | 899 ((operand.GetExtend() != UXTX) && (operand.GetExtend() != SXTX)));
[all...] |
| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64AddressingModes.h | 43 UXTX,
63 case AArch64_AM::UXTX: return "uxtx";
130 case 3: return AArch64_AM::UXTX;
146 /// 011 ==> uxtx
157 case AArch64_AM::UXTX: return 3; break;
193 /// 011 ==> uxtx
|
| /prebuilts/go/darwin-x86/src/cmd/internal/obj/arm64/ |
| list7.go | 157 return fmt.Sprintf("R%d.UXTX<<%d", r&31, (r>>5)&7)
159 return fmt.Sprintf("R%d.UXTX", r&31)
|
| /prebuilts/go/linux-x86/src/cmd/internal/obj/arm64/ |
| list7.go | 157 return fmt.Sprintf("R%d.UXTX<<%d", r&31, (r>>5)&7)
159 return fmt.Sprintf("R%d.UXTX", r&31)
|
| /external/vixl/test/aarch64/ |
| test-api-aarch64.cc | 293 VIXL_CHECK(Operand(x5, UXTX).IsPlainRegister());
305 VIXL_CHECK(!Operand(x5, UXTX, 1).IsPlainRegister());
|
| /external/llvm/lib/Target/AArch64/Utils/ |
| AArch64BaseInfo.h | 362 UXTX,
|
| /external/v8/src/arm64/ |
| disasm-arm64.cc | 144 const char *form = ((mode == UXTX) || (mode == SXTX)) ?
146 const char *form_cmp = ((mode == UXTX) || (mode == SXTX)) ?
[all...] |
| assembler-arm64-inl.h | 351 // Extend modes SXTX and UXTX require a 64-bit register.
352 DCHECK(reg.Is64Bits() || ((extend != SXTX) && (extend != UXTX)));
383 return Operand(reg_, reg_.Is64Bits() ? UXTX : UXTW, shift_amount_);
[all...] |
| constants-arm64.h | 342 UXTX = 3,
[all...] |
| /prebuilts/go/darwin-x86/src/cmd/asm/internal/arch/ |
| arm64.go | 150 case "UXTX":
|
| /prebuilts/go/linux-x86/src/cmd/asm/internal/arch/ |
| arm64.go | 150 case "UXTX":
|
| /prebuilts/go/darwin-x86/src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/ |
| arg.go | 30 // amount encoded in imm3[12:10] in the range [0,4]. If the extend is UXTX or SXTX,
|
| inst.go | 404 uxtx
426 case uxtx:
427 return "UXTX"
403 uxtx const
|
| /prebuilts/go/linux-x86/src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/ |
| arg.go | 30 // amount encoded in imm3[12:10] in the range [0,4]. If the extend is UXTX or SXTX,
|
| inst.go | 404 uxtx
426 case uxtx:
427 return "UXTX"
403 uxtx const
|
| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| AArch64InstPrinter.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/AsmParser/ |
| AArch64AsmParser.cpp | 991 ET == AArch64_AM::UXTX || ET == AArch64_AM::SXTX ||
999 // UXTX and SXTX require a 64-bit source register (the ExtendLSL64 class).
1001 return ET != AArch64_AM::UXTX && ET != AArch64_AM::SXTX;
1007 return (ET == AArch64_AM::UXTX || ET == AArch64_AM::SXTX ||
[all...] |
