1 /* 2 * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 #ifndef __ARM_COMMON_LD_S__ 7 #define __ARM_COMMON_LD_S__ 8 9 MEMORY { 10 EL3_SEC_DRAM (rw): ORIGIN = ARM_EL3_TZC_DRAM1_BASE, LENGTH = ARM_EL3_TZC_DRAM1_SIZE 11 } 12 13 SECTIONS 14 { 15 . = ARM_EL3_TZC_DRAM1_BASE; 16 ASSERT(. == ALIGN(4096), 17 "ARM_EL3_TZC_DRAM_BASE address is not aligned on a page boundary.") 18 el3_tzc_dram (NOLOAD) : ALIGN(4096) { 19 __EL3_SEC_DRAM_START__ = .; 20 *(arm_el3_tzc_dram) 21 __EL3_SEC_DRAM_UNALIGNED_END__ = .; 22 23 . = NEXT(4096); 24 __EL3_SEC_DRAM_END__ = .; 25 } >EL3_SEC_DRAM 26 } 27 28 #endif /* __ARM_COMMON_LD_S__ */ 29
