| /external/compiler-rt/lib/builtins/arm/ |
| eqdf2vfp.S | 25 vmrs apsr_nzcv, fpscr
|
| eqsf2vfp.S | 25 vmrs apsr_nzcv, fpscr
|
| gedf2vfp.S | 25 vmrs apsr_nzcv, fpscr
|
| gesf2vfp.S | 25 vmrs apsr_nzcv, fpscr
|
| gtdf2vfp.S | 25 vmrs apsr_nzcv, fpscr
|
| gtsf2vfp.S | 25 vmrs apsr_nzcv, fpscr
|
| ledf2vfp.S | 25 vmrs apsr_nzcv, fpscr
|
| lesf2vfp.S | 25 vmrs apsr_nzcv, fpscr
|
| ltdf2vfp.S | 25 vmrs apsr_nzcv, fpscr
|
| ltsf2vfp.S | 25 vmrs apsr_nzcv, fpscr
|
| nedf2vfp.S | 25 vmrs apsr_nzcv, fpscr
|
| nesf2vfp.S | 25 vmrs apsr_nzcv, fpscr
|
| unorddf2vfp.S | 25 vmrs apsr_nzcv, fpscr
|
| unordsf2vfp.S | 25 vmrs apsr_nzcv, fpscr
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/sh/ |
| fp.s | 38 lds r3,fpscr
39 lds.l @r3+,fpscr
42 sts fpscr,r3
43 sts.l fpscr,@-r3
|
| /external/valgrind/none/tests/ppc32/ |
| power5+_round.c | 50 } fpscr; local
63 asm("fcmpu 1, %1, %2\n\t" "mffs %0\n":"=f"(fpscr.d)
78 fpscr.fprf, fpscr.fprf == fprf ? "PASS" : "FAIL");
100 : "=f" (ret), "=f" (fpscr.d) \
103 printf(#op"\t%g\t%g\t%x\t%s\n", in[i], ret, fpscr.fprf, \
104 (!bcmp(&ret, &out[i], sizeof(double))) /*&& (rf[i] == fpscr.fprf)*/ \
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| vfp1xD.d | 10 0+000 <[^>]*> eef1fa10 (vmrs APSR_nzcv, fpscr|fmstat)
62 0+0d0 <[^>]*> eef10a10 (vmrs|fmrx) r0, fpscr
66 0+0e0 <[^>]*> eee10a10 (vmsr|fmxr) fpscr, r0
188 0+2c8 <[^>]*> 0ef1fa10 (vmrseq APSR_nzcv, fpscr|fmstateq)
252 0+3c8 <[^>]*> eef10a10 vmrs r0, fpscr
253 0+3cc <[^>]*> eef11a10 vmrs r1, fpscr
254 0+3d0 <[^>]*> eef12a10 vmrs r2, fpscr
255 0+3d4 <[^>]*> eef13a10 vmrs r3, fpscr
256 0+3d8 <[^>]*> eef14a10 vmrs r4, fpscr
257 0+3dc <[^>]*> eef15a10 vmrs r5, fpscr
[all...] |
| /external/google-breakpad/src/google_breakpad/common/ |
| minidump_cpu_arm.h | 80 uint64_t fpscr; /* FPU status register */ member in struct:__anon20815
|
| minidump_cpu_ppc.h | 88 uint32_t fpscr; /* Status/control */ member in struct:__anon20823
|
| /external/valgrind/coregrind/m_dispatch/ |
| dispatch-arm-linux.S | 70 /* set FPSCR to vex-required default value */
72 fmxr fpscr, r4
97 FPSCR in ways we don't expect. */
98 fmrx r4, fpscr
|
| /device/google/contexthub/firmware/os/cpu/cortexm4/inc/cpu/cmsis/ |
| core_cmFunc.h | 275 /** \brief Get FPSCR
284 register uint32_t __regfpscr __ASM("fpscr");
292 /** \brief Set FPSCR
296 \param [in] fpscr Floating Point Status/Control value to set
298 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
301 register uint32_t __regfpscr __ASM("fpscr");
302 __regfpscr = (fpscr);
569 /** \brief Get FPSCR
582 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
591 /** \brief Set FPSCR
[all...] |
| /external/clang/test/Sema/ |
| statements.c | 40 switch (env->fpscr) // expected-error {{use of undeclared identifier 'env'}}
|
| /external/valgrind/none/tests/arm/ |
| v8crypto_a.c | 127 "mov r9, #0 ; vmsr fpscr, r9 ; " \
133 "vmrs r9, fpscr ; str r9, [%0, #64] " \
138 UInt fpscr = 0xFFFFFFFF & block[4].u32[0]; \
142 showV128(&block[3]); printf(" fpscr=%08x\n", fpscr); \
164 "mov r9, #0 ; vmsr fpscr, r9 ; " \
172 "vmrs r9, fpscr ; str r9, [%0, #96] " \
178 UInt fpscr = 0xFFFFFFFF & block[6].u32[0]; \
184 showV128(&block[5]); printf(" fpscr=%08x\n", fpscr); \
[all...] |
| v8crypto_t.c | 127 "mov r9, #0 ; vmsr fpscr, r9 ; " \
133 "vmrs r9, fpscr ; str r9, [%0, #64] " \
138 UInt fpscr = 0xFFFFFFFF & block[4].u32[0]; \
142 showV128(&block[3]); printf(" fpscr=%08x\n", fpscr); \
164 "mov r9, #0 ; vmsr fpscr, r9 ; " \
172 "vmrs r9, fpscr ; str r9, [%0, #96] " \
178 UInt fpscr = 0xFFFFFFFF & block[6].u32[0]; \
184 showV128(&block[5]); printf(" fpscr=%08x\n", fpscr); \
[all...] |
| /external/compiler-rt/test/sanitizer_common/TestCases/Linux/ |
| ptrace.cc | 64 if ((elf_greg_t)fpregs[32]) // fpscr
70 unsigned fpscr = *(unsigned*)(regbuf + (32 * 8)); local
71 printf ("%x\n", fpscr);
|
