/external/mesa3d/src/gallium/drivers/etnaviv/ |
etnaviv_rasterizer.c | 60 cs->PA_LINE_WIDTH = fui(so->line_width / 2.0f); 61 cs->PA_POINT_SIZE = fui(so->point_size / 2.0f); 62 cs->SE_DEPTH_SCALE = fui(so->offset_scale); 63 cs->SE_DEPTH_BIAS = fui(so->offset_units) / 65535.0f;
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etnaviv_uniforms.c | 57 return fui(1.0f / dim);
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etnaviv_state.c | 243 cs->PE_DEPTH_NORMALIZE = fui(exp2f(depth_bits) - 1.0f); 388 cs->PA_VIEWPORT_SCALE_Z = fui(vs->scale[2] * 2.0f); 391 cs->PA_VIEWPORT_OFFSET_Z = fui(vs->translate[2] - vs->scale[2]); 405 cs->PE_DEPTH_NEAR = fui(0.0); /* not affected if depth mode is Z (as in GL) */ 406 cs->PE_DEPTH_FAR = fui(1.0);
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/external/mesa3d/src/gallium/drivers/i915/ |
i915_prim_emit.c | 83 OUT_BATCH( fui(attrib[0]) ); 87 OUT_BATCH( fui(attrib[0]) ); 88 OUT_BATCH( fui(attrib[1]) ); 92 OUT_BATCH( fui(attrib[0]) ); 93 OUT_BATCH( fui(attrib[1]) ); 94 OUT_BATCH( fui(attrib[2]) ); 98 OUT_BATCH( fui(attrib[0]) ); 99 OUT_BATCH( fui(attrib[1]) ); 100 OUT_BATCH( fui(attrib[2]) ); 101 OUT_BATCH( fui(attrib[3]) ) [all...] |
/external/mesa3d/src/gallium/drivers/ilo/core/ |
ilo_state_viewport.c | 142 dw[0] = fui(mat->scale[0]); 143 dw[1] = fui(mat->scale[1]); 144 dw[2] = fui(mat->scale[2]); 145 dw[3] = fui(mat->translate[0]); 146 dw[4] = fui(mat->translate[1]); 147 dw[5] = fui(mat->translate[2]); 151 dw[8] = fui(min_gbx); 152 dw[9] = fui(max_gbx); 153 dw[10] = fui(min_gby); 154 dw[11] = fui(max_gby) [all...] |
ilo_state_sampler.c | 527 dw[1] = fui(rgba[0]); 528 dw[2] = fui(rgba[1]); 529 dw[3] = fui(rgba[2]); 530 dw[4] = fui(rgba[3]);
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ilo_state_raster.c | 419 rs->raster[1] = fui(params->depth_offset_const); 420 rs->raster[2] = fui(params->depth_offset_scale); 421 rs->raster[3] = fui(params->depth_offset_clamp); 542 rs->raster[1] = fui(params->depth_offset_const); 543 rs->raster[2] = fui(params->depth_offset_scale); 544 rs->raster[3] = fui(params->depth_offset_clamp); [all...] |
ilo_state_cc.c | 738 cc->cc[1] = fui(params->alpha_ref); 739 cc->cc[2] = fui(params->blend_rgba[0]); 740 cc->cc[3] = fui(params->blend_rgba[1]); 741 cc->cc[4] = fui(params->blend_rgba[2]); 742 cc->cc[5] = fui(params->blend_rgba[3]);
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/external/mesa3d/src/gallium/drivers/radeon/ |
r600_viewport.c | 207 radeon_emit(cs, fui(guardband_y)); /* R_028BE8_PA_CL_GB_VERT_CLIP_ADJ */ 208 radeon_emit(cs, fui(1.0)); /* R_028BEC_PA_CL_GB_VERT_DISC_ADJ */ 209 radeon_emit(cs, fui(guardband_x)); /* R_028BF0_PA_CL_GB_HORZ_CLIP_ADJ */ 210 radeon_emit(cs, fui(1.0)); /* R_028BF4_PA_CL_GB_HORZ_DISC_ADJ */ 288 radeon_emit(cs, fui(state->scale[0])); 289 radeon_emit(cs, fui(state->translate[0])); 290 radeon_emit(cs, fui(state->scale[1])); 291 radeon_emit(cs, fui(state->translate[1])); 292 radeon_emit(cs, fui(state->scale[2])); 293 radeon_emit(cs, fui(state->translate[2])) [all...] |
/external/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
fd2_gmem.c | 243 OUT_RING(ring, fui(x0)); 244 OUT_RING(ring, fui(y0)); 245 OUT_RING(ring, fui(x1)); 246 OUT_RING(ring, fui(y0)); 247 OUT_RING(ring, fui(x0)); 248 OUT_RING(ring, fui(y1)); 249 OUT_RING(ring, fui(x1)); 250 OUT_RING(ring, fui(y1)); 304 OUT_RING(ring, fui((float)bin_w/2.0)); /* PA_CL_VPORT_XSCALE */ 305 OUT_RING(ring, fui((float)bin_w/2.0)); /* PA_CL_VPORT_XOFFSET * [all...] |
fd2_zsa.c | 92 so->rb_alpha_ref = fui(cso->alpha.ref_value);
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fd2_emit.c | 237 OUT_RING(ring, fui(1.0)); /* PA_CL_GB_VERT_CLIP_ADJ */ 238 OUT_RING(ring, fui(1.0)); /* PA_CL_GB_VERT_DISC_ADJ */ 239 OUT_RING(ring, fui(1.0)); /* PA_CL_GB_HORZ_CLIP_ADJ */ 240 OUT_RING(ring, fui(1.0)); /* PA_CL_GB_HORZ_DISC_ADJ */ 262 OUT_RING(ring, fui(ctx->viewport.scale[0])); /* PA_CL_VPORT_XSCALE */ 263 OUT_RING(ring, fui(ctx->viewport.translate[0])); /* PA_CL_VPORT_XOFFSET */ 264 OUT_RING(ring, fui(ctx->viewport.scale[1])); /* PA_CL_VPORT_YSCALE */ 265 OUT_RING(ring, fui(ctx->viewport.translate[1])); /* PA_CL_VPORT_YOFFSET */ 266 OUT_RING(ring, fui(ctx->viewport.scale[2])); /* PA_CL_VPORT_ZSCALE */ 267 OUT_RING(ring, fui(ctx->viewport.translate[2])); /* PA_CL_VPORT_ZOFFSET * [all...] |
a2xx.xml.h | 797 return ((fui(val)) << A2XX_PA_CL_VPORT_XSCALE__SHIFT) & A2XX_PA_CL_VPORT_XSCALE__MASK; 805 return ((fui(val)) << A2XX_PA_CL_VPORT_XOFFSET__SHIFT) & A2XX_PA_CL_VPORT_XOFFSET__MASK; 813 return ((fui(val)) << A2XX_PA_CL_VPORT_YSCALE__SHIFT) & A2XX_PA_CL_VPORT_YSCALE__MASK; 821 return ((fui(val)) << A2XX_PA_CL_VPORT_YOFFSET__SHIFT) & A2XX_PA_CL_VPORT_YOFFSET__MASK; 829 return ((fui(val)) << A2XX_PA_CL_VPORT_ZSCALE__SHIFT) & A2XX_PA_CL_VPORT_ZSCALE__MASK; 837 return ((fui(val)) << A2XX_PA_CL_VPORT_ZOFFSET__SHIFT) & A2XX_PA_CL_VPORT_ZOFFSET__MASK; [all...] |
fd2_compiler.c | 867 get_immediate(ctx, &tmp_const, fui(c0)); 870 get_immediate(ctx, &tmp_const, fui(c1)); 888 get_immediate(ctx, &tmp_const, fui(1.0)); 949 get_immediate(ctx, &tmp_const, fui(0.5)); 952 get_immediate(ctx, &tmp_const, fui(0.159155)); 962 get_immediate(ctx, &tmp_const, fui(-3.141593)); 965 get_immediate(ctx, &tmp_const, fui(6.283185));
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/external/mesa3d/src/amd/vulkan/ |
si_cmd_buffer.c | 226 radeon_set_context_reg(cs, R_028A18_VGT_HOS_MAX_TESS_LEVEL, fui(64)); 227 radeon_set_context_reg(cs, R_028A1C_VGT_HOS_MIN_TESS_LEVEL, fui(0)); 250 radeon_set_context_reg(cs, R_0282D4_PA_SC_VPORT_ZMAX_0 + i*8, fui(1.0)); 358 radeon_set_context_reg(cs, R_028BE8_PA_CL_GB_VERT_CLIP_ADJ, fui(1.0)); 359 radeon_set_context_reg(cs, R_028BEC_PA_CL_GB_VERT_DISC_ADJ, fui(1.0)); 360 radeon_set_context_reg(cs, R_028BF0_PA_CL_GB_HORZ_CLIP_ADJ, fui(1.0)); 361 radeon_set_context_reg(cs, R_028BF4_PA_CL_GB_HORZ_DISC_ADJ, fui(1.0)); 461 radeon_emit(cs, fui(1.0)); 462 radeon_emit(cs, fui(0.0)); 463 radeon_emit(cs, fui(1.0)) [all...] |
/external/mesa3d/src/gallium/drivers/r300/ |
r300_cb.h | 128 OUT_CB(fui(value));
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r300_cs.h | 80 OUT_CS(fui(value))
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/external/mesa3d/src/gallium/auxiliary/util/ |
u_pack_color.h | 522 union fi fui; local 538 fui.f = (float)z; 539 return fui.ui; 564 union fi fui; local 571 fui.f = (float)z; 572 return fui.ui;
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/external/mesa3d/src/gallium/drivers/vc4/ |
vc4_cl.h | 138 cl_u32(cl, fui(f)); 144 cl_aligned_u32(cl, fui(f));
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/external/mesa3d/src/gallium/drivers/nouveau/nv50/ |
nv50_state.c | 257 SB_DATA (so, fui(cso->line_width)); 273 SB_DATA (so, fui(cso->point_size)); 311 SB_DATA (so, fui(cso->offset_scale)); 313 SB_DATA (so, fui(cso->offset_units * 2.0f)); 315 SB_DATA (so, fui(cso->offset_clamp)); 382 SB_DATA (so, fui(cso->depth.bounds_min)); 383 SB_DATA (so, fui(cso->depth.bounds_max)); 423 SB_DATA (so, fui(cso->alpha.ref_value)); 432 SB_DATA (so, fui(cso->alpha.ref_value)); 574 so->tsc[4] = fui(cso->border_color.f[0]) [all...] |
/external/mesa3d/src/gallium/drivers/virgl/ |
virgl_encode.c | 144 virgl_encoder_write_dword(ctx->cbuf, fui(dsa_state->alpha.ref_value)); 186 virgl_encoder_write_dword(ctx->cbuf, fui(state->point_size)); /* S1 */ 192 virgl_encoder_write_dword(ctx->cbuf, fui(state->line_width)); /* S4 */ 193 virgl_encoder_write_dword(ctx->cbuf, fui(state->offset_units)); /* S5 */ 194 virgl_encoder_write_dword(ctx->cbuf, fui(state->offset_scale)); /* S6 */ 195 virgl_encoder_write_dword(ctx->cbuf, fui(state->offset_clamp)); /* S7 */ 361 virgl_encoder_write_dword(ctx->cbuf, fui(states[v].scale[i])); 363 virgl_encoder_write_dword(ctx->cbuf, fui(states[v].translate[i])); 558 virgl_encoder_write_dword(ctx->cbuf, fui(state->lod_bias)); 559 virgl_encoder_write_dword(ctx->cbuf, fui(state->min_lod)) [all...] |
/external/mesa3d/src/gallium/drivers/nouveau/nv30/ |
nv30_state.c | 169 SB_DATA (so, fui(cso->offset_scale)); 170 SB_DATA (so, fui(cso->offset_units * 2.0)); 186 SB_DATA (so, fui(cso->point_size)); 230 SB_DATA (so, fui(cso->depth.bounds_min)); 231 SB_DATA (so, fui(cso->depth.bounds_max));
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nv30_screen.c | 642 PUSH_DATA (push, fui(0.0)); 643 PUSH_DATA (push, fui(0.0)); 644 PUSH_DATA (push, fui(1.0));
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/external/mesa3d/src/gallium/drivers/freedreno/ |
freedreno_texture.c | 181 bcolor32[desc->swizzle[j]] = fui(sampler->border_color.f[j]);
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/external/mesa3d/src/gallium/drivers/nouveau/nvc0/ |
nvc0_surface.c | 719 PUSH_DATA (push, fui(depth)); [all...] |