| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| arch6zk.s | 7 ldrexb r4, [r12]
|
| arch6zk.d | 9 0+004 <[^>]*> e1dc4f9f ? ldrexb r4, \[ip\]
|
| archv8m.s | 28 ldrexb r0, [r1] label
|
| archv8m-base.d | 31 0+.* <[^>]*> e8d1 0f4f ldrexb r0, \[r1\]
|
| archv8m-main-dsp-1.d | 31 0+.* <[^>]*> e8d1 0f4f ldrexb r0, \[r1\]
|
| archv8m-main.d | 31 0+.* <[^>]*> e8d1 0f4f ldrexb r0, \[r1\]
|
| sp-pc-validations-bad.s | 66 @ LDREXB
67 ldrexb pc,[r0] @ Unpredictable label
68 ldrexb r0,[pc] @ ditto label
|
| sp-pc-validations-bad-t.s | 114 ldrexb pc, [r0] @ BadReg label
115 ldrexb sp, [r0] @ ditto label
116 ldrexb r0, [pc] @ Unpredictable label
|
| sp-pc-validations-bad.l | 40 [^:]*:67: Error: r15 not allowed here -- `ldrexb pc,\[r0\]'
41 [^:]*:68: Error: r15 not allowed here -- `ldrexb r0,\[pc\]'
|
| sp-pc-validations-bad-t.l | 67 [^:]*:114: Error: r15 not allowed here -- `ldrexb pc,\[r0\]'
68 [^:]*:115: Error: r13 not allowed here -- `ldrexb sp,\[r0\]'
69 [^:]*:116: Error: r15 not allowed here -- `ldrexb r0,\[pc\]'
|
| thumb32.s | 396 ldrexb r1, [r4]
|
| thumb32.d | 552 0[0-9a-f]+ <[^>]+> e8d4 1f4f ldrexb r1, \[r4\]
[all...] |
| /external/llvm/test/MC/ARM/ |
| thumbv8m.s | 66 // CHECK: ldrexb r1, [r2] @ encoding: [0xd2,0xe8,0x4f,0x1f]
67 ldrexb r1, [r2] label
|
| basic-arm-instructions.s | [all...] |
| basic-thumb2-instructions.s | [all...] |
| /external/v8/src/arm/ |
| assembler-arm.h | [all...] |
| assembler-arm.cc | 2148 void Assembler::ldrexb(Register dst, Register src, Condition cond) { function in class:v8::internal::Assembler
[all...] |
| /external/vixl/src/aarch32/ |
| assembler-aarch32.h | 2431 void ldrexb(Register rt, const MemOperand& operand) { function in class:vixl::aarch32::Assembler
[all...] |
| disasm-aarch32.h | 852 void ldrexb(Condition cond, Register rt, const MemOperand& operand);
[all...] |
| assembler-aarch32.cc | 5841 void Assembler::ldrexb(Condition cond, Register rt, const MemOperand& operand) { function in class:vixl::aarch32::Assembler
[all...] |
| disasm-aarch32.cc | 1756 void Disassembler::ldrexb(Condition cond, function in class:vixl::aarch32::Disassembler
[all...] |
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| basic-arm-instructions.s | [all...] |
| basic-thumb2-instructions.s | 748 @ LDREX/LDREXB/LDREXH/LDREXD
753 ldrexb r5, [r7]
760 @ CHECK: ldrexb r5, [r7] @ encoding: [0xd7,0xe8,0x4f,0x5f]
[all...] |
| /external/capstone/suite/MC/ARM/ |
| basic-arm-instructions.s.cs | 328 0x9f,0x3f,0xd4,0xe1 = ldrexb r3, [r4]
[all...] |
| basic-thumb2-instructions.s.cs | 333 0xd7,0xe8,0x4f,0x5f = ldrexb r5, [r7]
[all...] |
