1 .syntax unified 2 .arch armv7-a 3 .thumb 4 .macro it_test opcode operands:vararg 5 itt eq 6 \opcode\()eq r15, \operands 7 moveq r0, r0 8 .endm 9 10 .macro it_testw opcode operands:vararg 11 itt eq 12 \opcode\()eq.w r15, \operands 13 moveq r0, r0 14 .endm 15 16 .macro LOAD operands:vararg 17 it_test ldr, \operands 18 .endm 19 20 .macro LOADw operands:vararg 21 it_testw ldr, \operands 22 .endm 23 24 @ Loads =============================================================== 25 26 @ LDR (register) 27 LOAD [r0] 28 LOAD [r0,#0] 29 LOAD [sp] 30 LOAD [sp,#0] 31 LOADw [r0] 32 LOADw [r0,#0] 33 LOAD [r0,#-4] 34 LOAD [r0],#4 35 LOAD [r0,#0]! 36 37 @ LDR (literal) 38 LOAD label 39 LOADw label 40 LOADw [pc, #-0] 41 42 @ LDR (register) 43 LOAD [r0, r1] 44 LOADw [r0, r1] 45 LOADw [r0, r1, LSL #2] 46 47 @ LDRB (immediate, Thumb) 48 ldrb pc, [r0,#4] @ low reg 49 @ldrb r0, [pc,#4] @ ALLOWED! 50 ldrb.w sp, [r0,#4] @ Unpredictable 51 ldrb.w pc, [r0,#4] @ => PLD 52 ldrb pc, [r0, #-4] @ => PLD 53 @ LDRB<c><q> <Rt>, [<Rn>, #+<imm>] => See LDRBT 54 ldrb pc, [r0],#4 @ BadReg 55 ldrb sp, [r0],#4 @ ditto 56 ldrb pc,[r0,#4]! @ ditto 57 ldrb sp,[r0,#4]! @ ditto 58 59 @ LDRB (literal) 60 ldrb pc,label @ => PLD 61 ldrb pc,[PC,#-0] @ => PLD (special case) 62 ldrb sp,label @ Unpredictable 63 ldrb sp,[PC,#-0] @ ditto 64 65 @ LDRB (register) 66 ldrb pc,[r0,r1] @ low reg 67 ldrb r0,[pc,r1] @ ditto 68 ldrb r0,[r1,pc] @ ditto 69 ldrb.w pc,[r0,r1,LSL #1] @ => PLD 70 ldrb.w sp,[r0,r1] @ Unpredictable 71 ldrb.w r2,[r0,pc,LSL #2] @ BadReg 72 ldrb.w r2,[r0,sp,LSL #2] @ ditto 73 74 @ LDRBT 75 ldrbt pc, [r0, #4] @ BadReg 76 ldrbt sp, [r0, #4] @ ditto 77 78 @ LDRD (immediate) 79 ldrd pc, r0, [r1] @ BadReg 80 ldrd sp, r0, [r1] @ ditto 81 ldrd r12, [r1] @ ditto 82 ldrd r14, [r1] @ ditto 83 ldrd r0, pc, [r1] @ ditto 84 ldrd r0, sp, [r1] @ ditto 85 ldrd pc, r0, [r1], #4 @ ditto 86 ldrd sp, r0, [r1], #4 @ ditto 87 ldrd r0, pc, [r1], #4 @ ditto 88 ldrd r0, sp, [r1], #4 @ ditto 89 ldrd r12, [r1], #4 @ ditto 90 ldrd r14, [r1], #4 @ ditto 91 ldrd pc, r0, [r1, #4]! @ ditto 92 ldrd sp, r0, [r1, #4]! @ ditto 93 ldrd r0, pc, [r1, #4]! @ ditto 94 ldrd r0, sp, [r1, #4]! @ ditto 95 ldrd r12, [r1, #4]! @ ditto 96 ldrd r14, [r1, #4]! @ ditto 97 98 @ LDRD (literal) 99 ldrd pc, r0, label @ BadReg 100 ldrd sp, r0, label @ ditto 101 ldrd r0, pc, label @ ditto 102 ldrd r0, sp, label @ ditto 103 ldrd pc, r0, [pc, #-0] @ ditto 104 ldrd sp, r0, [pc, #-0] @ ditto 105 ldrd r0, pc, [pc, #-0] @ ditto 106 ldrd r0, sp, [pc, #-0] @ ditto 107 108 @ LDRD (register): ARM only 109 110 @ LDREX/B/D/H 111 ldrex pc, [r0] @ BadReg 112 ldrex sp, [r0] @ ditto 113 ldrex r0, [pc] @ Unpredictable 114 ldrexb pc, [r0] @ BadReg 115 ldrexb sp, [r0] @ ditto 116 ldrexb r0, [pc] @ Unpredictable 117 ldrexd pc, r0, [r1] @ BadReg 118 ldrexd sp, r0, [r1] @ ditto 119 ldrexd r0, pc, [r1] @ ditto 120 ldrexd r0, sp, [r1] @ ditto 121 ldrexd r0, r1, [pc] @ Unpredictable 122 ldrexh pc, [r0] @ BadReg 123 ldrexh sp, [r0] @ ditto 124 ldrexh r0, [pc] @ Unpredictable 125 126 @ LDRH (immediate) 127 ldrh pc, [r0] @ low reg 128 ldrh pc, [r0, #4] @ ditto 129 @ldrh r0, [pc] @ ALLOWED! 130 @ldrh r0, [pc, #4] @ ditto 131 ldrh.w pc, [r0] @ => Unallocated memory hints 132 ldrh.w pc, [r0, #4] @ ditto 133 ldrh.w sp, [r0] @ Unpredictable 134 ldrh.w sp, [r0, #4] @ ditto 135 ldrh pc, [r0, #-3] @ => Unallocated memory hint 136 @ LDRH<c><q> <Rt>, [<Rn>, #+<imm>] => See LDRHT 137 ldrh pc,[r0],#4 @ BadReg 138 ldrh sp,[r0],#4 @ ditto 139 ldrh pc,[r0,#4]! @ ditto 140 ldrh sp,[r0,#4]! @ ditto 141 142 @ LDRH (literal) 143 ldrh pc, label @ Unallocated memory hint 144 ldrh pc, [pc, #-0] @ ditto 145 ldrh sp, label @ Unpredictable 146 ldrh sp, [pc, #-0] @ ditto 147 148 @ LDRH (register) 149 ldrh pc, [r0, r1] @ low reg 150 ldrh r0, [pc, r1] @ ditto 151 ldrh r0, [r1, pc] @ ditto 152 ldrh.w pc,[r0,r1,LSL #1] @ => Unallocated memory hints 153 ldrh.w sp,[r0,r1,LSL #1] @ Unpredictable 154 ldrh.w r2,[r0,pc,LSL #1] @ ditto 155 ldrh.w r2,[r0,sp,LSL #1] @ ditto 156 157 @ LDRHT 158 ldrht pc, [r0, #4] @ BadReg 159 ldrht sp, [r0, #4] @ ditto 160 161 @ LDRSB (immediate) 162 ldrsb pc, [r0, #4] @ => PLI 163 @ldrsb r0, [pc, #4] => LDRSB (literal) 164 ldrsb sp, [r0, #4] @ Unpredictable 165 ldrsb pc, [r0, #-4] @ => PLI 166 ldrsb sp,[r0,#-4] @ BadReg 167 ldrsb pc,[r0],#4 @ ditto 168 ldrsb sp,[r0],#4 @ ditto 169 ldrsb pc,[r0,#4]! @ ditto 170 ldrsb sp,[r0,#4]! @ ditto 171 172 @ LDRSB (literal) 173 ldrsb pc, label @ => PLI 174 ldrsb pc, [pc, #-0] @ => PLI 175 ldrsb sp, label @ Unpredictable 176 ldrsb sp, [pc, #-0] @ ditto 177 178 @ LDRSB (register) 179 ldrsb pc, [r0, r1] @ low reg 180 ldrsb r0, [pc, r1] @ ditto 181 ldrsb r0, [r1, pc] @ ditto 182 ldrsb.w pc, [r0, r1, LSL #2] @ => PLI 183 @ldrsb.w r0, [pc, r0, LSL #2] => LDRSB (literal) 184 ldrsb.w sp, [r0, r1, LSL #2] @ Unpredictable 185 ldrsb.w r2, [r0, pc, LSL #2] @ ditto 186 ldrsb.w r2, [r0, sp, LSL #2] @ ditto 187 188 @ LDRSBT 189 @ldrsbt r0, [pc, #4] => LDRSB (literal) 190 ldrsbt pc, [r0, #4] @ BadReg 191 ldrsbt sp, [r0, #4] @ ditto 192 193 @ LDRSH (immediate) 194 @ldrsh r0,[pc,#4] => LDRSH (literal) 195 ldrsh pc,[r0,#4] @ => Unallocated memory hints 196 ldrsh sp,[r0,#4] @ Unpredictable 197 ldrsh pc, [r0, #-4] @ => Unallocated memory hints 198 ldrsh pc,[r0],#4 @ BadReg 199 ldrsh pc,[r0,#4]! @ ditto 200 ldrsh sp,[r0,#-4] @ ditto 201 ldrsh sp,[r0],#4 @ ditto 202 ldrsh sp,[r0,#4]! @ ditto 203 204 @ LDRSH (literal) 205 ldrsh pc, label @ => Unallocated memory hints 206 ldrsh sp, label @ Unpredictable 207 ldrsh sp, [pc,#-0] @ ditto 208 209 @ LDRSH (register) 210 ldrsh pc,[r0,r1] @ low reg 211 ldrsh r0,[pc,r1] @ ditto 212 ldrsh r0,[r1,pc] @ ditto 213 @ldrsh.w r0,[pc,r1,LSL #3] => LDRSH (literal) 214 ldrsh.w pc,[r0,r1,LSL #3] @ => Unallocated memory hints 215 ldrsh.w sp,[r0,r1,LSL #3] @ Unpredictable 216 ldrsh.w r0,[r1,sp,LSL #3] @ BadReg 217 ldrsh.w r0,[r1,pc,LSL #3] @ ditto 218 219 @ LDRSHT 220 @ldrsht r0,[pc,#4] => LDRSH (literal) 221 ldrsht pc,[r0,#4] @ BadReg 222 ldrsht sp,[r0,#4] @ ditto 223 224 @ LDRT 225 @ldrt r0,[pc,#4] => LDR (literal) 226 ldrt pc,[r0,#4] @ BadReg 227 ldrt sp,[r0,#4] @ ditto 228 229 @ Stores ============================================================== 230 231 @ STR (immediate, Thumb) 232 str pc, [r0, #4] @ Unpredictable 233 str.w r0, [pc, #4] @ Undefined 234 str r0, [pc, #-4] @ ditto 235 str r0, [pc], #4 @ ditto 236 str r0, [pc, #4]! @ ditto 237 238 @ STR (register) 239 str.w r0,[pc,r1] @ Undefined 240 str.w r0,[pc,r1,LSL #2] @ ditto 241 @str.w pc,[r0,r1{,LSL #<imm2>}] @ Unpredictable 242 @str.w r1,[r0,sp{,LSL #<imm2>}] @ ditto 243 @str.w r1,[r0,pc{,LSL #<imm2>}] @ ditto 244 245 @ STRB (immediate, Thumb) 246 strb.w r0,[pc,#4] @ Undefined 247 strb.w pc,[r0,#4] @ Unpredictable 248 strb.w sp,[r0,#4] @ ditto 249 strb r0,[pc,#-4] @ Undefined 250 strb r0,[pc],#4 @ ditto 251 strb r0,[pc,#4]! @ ditto 252 strb pc,[r0,#-4] @ Unpredictable 253 strb pc,[r0],#4 @ ditto 254 strb pc,[r0,#4]! @ ditto 255 strb sp,[r0,#-4] @ ditto 256 strb sp,[r0],#4 @ ditto 257 strb sp,[r0,#4]! @ ditto 258 259 @ STRB (register) 260 strb.w r0,[pc,r1] @ Undefined 261 strb.w r0,[pc,r1,LSL #2] @ ditto 262 strb.w pc,[r0,r1] @ Unpredictable 263 strb.w pc,[r0,r1,LSL #2] @ ditto 264 strb.w sp,[r0,r1] @ ditto 265 strb.w sp,[r0,r1,LSL #2] @ ditto 266 strb.w r0,[r1,pc] @ ditto 267 strb.w r0,[r1,pc,LSL #2] @ ditto 268 strb.w r0,[r1,sp] @ ditto 269 strb.w r0,[r1,sp,LSL #2] @ ditto 270 271 @ STRBT 272 strbt r0,[pc,#4] @ Undefined 273 strbt pc,[r0,#4] @ Unpredictable 274 strbt sp,[r0,#4] @ ditto 275 276 @ STRD (immediate) 277 strd r0,r1,[pc,#4] @ Unpredictable 278 strd r0,r1,[pc],#4 @ ditto 279 strd r0,r1,[pc,#4]! @ ditto 280 strd pc,r0,[r1,#4] @ ditto 281 strd pc,r0,[r1],#4 @ ditto 282 strd pc,r0,[r1,#4]! @ ditto 283 strd sp,r0,[r1,#4] @ ditto 284 strd sp,r0,[r1],#4 @ ditto 285 strd sp,r0,[r1,#4]! @ ditto 286 strd r0,pc,[r1,#4] @ ditto 287 strd r0,pc,[r1],#4 @ ditto 288 strd r0,pc,[r1,#4]! @ ditto 289 strd r0,sp,[r1,#4] @ ditto 290 strd r0,sp,[r1],#4 @ ditto 291 strd r0,sp,[r1,#4]! @ ditto 292 293 @ STRD (register) 294 @No thumb. 295 296 @ STREX 297 strex pc,r0,[r1] @ Unpredictable 298 strex pc,r0,[r1,#4] @ ditto 299 strex sp,r0,[r1] @ ditto 300 strex sp,r0,[r1,#4] @ ditto 301 strex r0,pc,[r1] @ ditto 302 strex r0,pc,[r1,#4] @ ditto 303 strex r0,sp,[r1] @ ditto 304 strex r0,sp,[r1,#4] @ ditto 305 strex r0,r1,[pc] @ ditto 306 strex r0,r1,[pc,#4] @ ditto 307 308 @ STREXB 309 strexb pc,r0,[r1] @ Unpredictable 310 strexb sp,r0,[r1] @ ditto 311 strexb r0,pc,[r1] @ ditto 312 strexb r0,sp,[r1] @ ditto 313 strexb r0,r1,[pc] @ ditto 314 315 @ STREXD 316 strexd pc,r0,r1,[r2] @ Unpredictable 317 strexd sp,r0,r1,[r2] @ ditto 318 strexd r0,pc,r1,[r2] @ ditto 319 strexd r0,sp,r1,[r2] @ ditto 320 strexd r0,r1,pc,[r2] @ ditto 321 strexd r0,r1,sp,[r2] @ ditto 322 strexd r0,r1,r2,[pc] @ ditto 323 324 @ STREXH 325 strexh pc,r0,[r1] @ Unpredictable 326 strexh sp,r0,[r1] @ ditto 327 strexh r0,pc,[r1] @ ditto 328 strexh r0,sp,[r1] @ ditto 329 strexh r0,r1,[pc] @ ditto 330 331 @ STRH (immediate, Thumb) 332 strh.w r0,[pc] @ Undefined 333 strh.w r0,[pc,#4] @ ditto 334 strh r0,[pc,#-4] @ ditto 335 strh r0,[pc],#4 @ ditto 336 strh r0,[pc,#4]! @ ditto 337 338 @ STRH (register) 339 strh.w r0,[pc,r1] @ Undefined 340 strh.w r0,[pc,r1,LSL #2] @ ditto 341 strh.w pc,[r0,#4] @ Unpredictable 342 strh.w pc,[r0] @ ditto 343 strh.w sp,[r0,#4] @ ditto 344 strh.w sp,[r0] @ ditto 345 strh pc,[r0,#-4] @ ditto 346 strh pc,[r0],#4 @ ditto 347 strh pc,[r0,#4]! @ ditto 348 strh sp,[r0,#-4] @ ditto 349 strh sp,[r0],#4 @ ditto 350 strh sp,[r0,#4]! @ ditto 351 strh.w pc,[r0,r1] @ ditto 352 strh.w sp,[r0,r1] @ ditto 353 strh.w r0,[r1,pc] @ ditto 354 strh.w r0,[r1,sp] @ ditto 355 strh.w pc,[r0,r1,LSL #2] @ ditto 356 strh.w sp,[r0,r1,LSL #2] @ ditto 357 strh.w r0,[r1,pc,LSL #2] @ ditto 358 strh.w r0,[r1,sp,LSL #2] @ ditto 359 360 @ STRHT 361 strht r0,[pc,#4] @ Undefined 362 strht pc,[r0,#4] @ Unpredictable 363 strht sp,[pc,#4] @ ditto 364 365 @ STRT 366 strt r0,[pc,#4] @ Undefined 367 strt pc,[r0,#4] @ Unpredictable 368 strt sp,[r0,#4] @ ditto 369 370 @ ============================================================================ 371 372 .label: 373 ldr r0, [r1] 374
