| /external/mesa3d/src/intel/common/ |
| gen_device_info.h | 100 unsigned max_tcs_threads; /**< Maximum Hull Shader threads */ member in struct:gen_device_info
|
| gen_device_info.c | 130 .max_tcs_threads = 36,
154 .max_tcs_threads = 128,
179 .max_tcs_threads = 36,
209 .max_tcs_threads = 70,
233 .max_tcs_threads = 256,
257 .max_tcs_threads = 256,
287 .max_tcs_threads = 504, \
354 .max_tcs_threads = 80,
385 .max_tcs_threads = 336, \
409 .max_tcs_threads = 112,
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| gen8_hs_state.c | 50 (devinfo->max_tcs_threads - 1) << GEN8_HS_MAX_THREADS_SHIFT |
|
| gen7_hs_state.c | 82 (devinfo->max_tcs_threads - 1));
|
| brw_tcs.c | 280 devinfo->max_tcs_threads);
|
| /external/mesa3d/src/intel/vulkan/ |
| anv_allocator.c | 960 [MESA_SHADER_TESS_CTRL] = devinfo->max_tcs_threads,
|
| genX_pipeline.c | [all...] |
