| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| tgsi_lowering.c | 135 struct tgsi_full_instruction new_inst; local
137 new_inst = tgsi_default_full_instruction();
138 new_inst.Instruction.Opcode = TGSI_OPCODE_MOV;
139 new_inst.Instruction.Saturate = saturate;
140 new_inst.Instruction.NumDstRegs = 1;
141 reg_dst(&new_inst.Dst[0], dst, mask);
142 new_inst.Instruction.NumSrcRegs = 1;
143 reg_src(&new_inst.Src[0], src, SWIZ(X, Y, Z, W));
144 tctx->emit_instruction(tctx, &new_inst);
203 struct tgsi_full_instruction new_inst; local
282 struct tgsi_full_instruction new_inst; local
344 struct tgsi_full_instruction new_inst; local
409 struct tgsi_full_instruction new_inst; local
457 struct tgsi_full_instruction new_inst; local
503 struct tgsi_full_instruction new_inst; local
562 struct tgsi_full_instruction new_inst; local
678 struct tgsi_full_instruction new_inst; local
801 struct tgsi_full_instruction new_inst; local
953 struct tgsi_full_instruction new_inst; local
1061 struct tgsi_full_instruction new_inst; local
1115 struct tgsi_full_instruction new_inst; local
1188 struct tgsi_full_instruction new_inst; local
1322 struct tgsi_full_instruction new_inst; local
[all...] |
| tgsi_emulate.c | 66 struct tgsi_full_instruction new_inst; local
84 new_inst = tgsi_default_full_instruction();
85 new_inst.Instruction.Opcode = TGSI_OPCODE_MOV;
87 new_inst.Instruction.NumDstRegs = 1;
88 new_inst.Dst[0].Register.File = TGSI_FILE_OUTPUT;
89 new_inst.Dst[0].Register.Index = ctx->info.num_outputs;
90 new_inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW;
92 new_inst.Instruction.NumSrcRegs = 1;
93 new_inst.Src[0].Register.File = TGSI_FILE_INPUT;
94 new_inst.Src[0].Register.Index = ctx->info.num_inputs
[all...] |
| /external/mesa3d/src/gallium/drivers/r300/ |
| r300_vs_draw.c | 226 struct tgsi_full_instruction new_inst; local
248 new_inst = tgsi_default_full_instruction();
249 new_inst.Instruction.Opcode = TGSI_OPCODE_MOV;
250 new_inst.Instruction.NumDstRegs = 1;
251 new_inst.Dst[0].Register.File = TGSI_FILE_OUTPUT;
252 new_inst.Dst[0].Register.Index = vsctx->pos_output;
253 new_inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW;
254 new_inst.Instruction.NumSrcRegs = 1;
255 new_inst.Src[0].Register.File = TGSI_FILE_TEMPORARY;
256 new_inst.Src[0].Register.Index = vsctx->pos_temp
[all...] |
| /external/mesa3d/src/gallium/drivers/r300/compiler/ |
| radeon_vert_fc.c | 111 struct rc_instruction * new_inst = local
129 new_inst->U.I.Opcode = RC_ME_PRED_SEQ;
130 build_pred_dst(&new_inst->U.I.DstReg, fc_state);
131 new_inst->U.I.SrcReg[0].Index = 0;
132 new_inst->U.I.SrcReg[0].File = RC_FILE_NONE;
133 new_inst->U.I.SrcReg[0].Swizzle = RC_SWIZZLE_0000;
141 build_pred_src(&new_inst->U.I.SrcReg[0], fc_state);
149 new_inst->U.I.Opcode = RC_OPCODE_ADD;
150 build_pred_dst(&new_inst->U.I.DstReg, fc_state);
151 new_inst->U.I.SrcReg[1].Index = 0
180 struct rc_instruction * new_inst = local
[all...] |
| r3xx_vertprog.c | 681 struct rc_instruction *new_inst; local
688 new_inst = rc_insert_new_instruction(c, inst->Prev);
689 new_inst->U.I.Opcode = RC_OPCODE_MAX;
690 new_inst->U.I.DstReg.File = RC_FILE_TEMPORARY;
691 new_inst->U.I.DstReg.Index = temp;
692 new_inst->U.I.SrcReg[0] = inst->U.I.SrcReg[i];
693 new_inst->U.I.SrcReg[1] = inst->U.I.SrcReg[i];
694 new_inst->U.I.SrcReg[1].Negate ^= RC_MASK_XYZW;
|
| /prebuilts/ndk/r16/sources/third_party/shaderc/third_party/spirv-tools/source/opt/ |
| flatten_decoration_pass.cpp | 91 std::unique_ptr<Instruction> new_inst(new Instruction(*inst_iter));
92 new_inst->SetInOperand(0, Words{target});
93 inst_iter = inst_iter.InsertBefore(std::move(new_inst));
116 std::unique_ptr<Instruction> new_inst(
118 inst_iter = inst_iter.InsertBefore(std::move(new_inst));
|
| fold_spec_constant_op_and_composite_pass.cpp | 591 auto new_inst = CreateInstruction(new_id, new_const); local
592 if (!new_inst) return nullptr;
593 auto* new_inst_ptr = new_inst.get();
594 *pos = pos->InsertBefore(std::move(new_inst));
|
| /external/mesa3d/src/gallium/drivers/ilo/shader/ |
| toy_compiler.h | 210 struct toy_inst *new_inst; local
212 new_inst = slab_alloc_st(&tc->mempool);
213 if (!new_inst)
216 *new_inst = *inst;
217 list_addtail(&new_inst->list, tc->iter_next);
219 return new_inst;
|
| /art/compiler/optimizing/ |
| prepare_for_register_allocation.cc | 186 HNewInstance* new_inst = allocation_inst->AsNewInstance(); local
189 if (new_inst != nullptr && new_inst->GetEntrypoint() == kQuickAllocObjectResolved) {
|
| instruction_builder.cc | 1132 HNewInstance* new_inst = allocation->AsNewInstance(); local
[all...] |
| /toolchain/binutils/binutils-2.27/gas/config/ |
| tc-aarch64.c | 6667 aarch64_inst *new_inst = fixP->tc_fix_data.inst; local
[all...] |
| tc-arm.c | 22447 int op, new_inst; local
22526 int op, new_inst; local
[all...] |
| /external/mesa3d/src/gallium/drivers/r300/compiler/tests/ |
| rc_test_helpers.c | 460 struct rc_instruction * new_inst = local
463 parse_rc_normal_instruction(new_inst, inst_string);
|
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_vec4.h | 185 vec4_instruction *new_inst);
|
| brw_vec4_visitor.cpp | 77 vec4_instruction *new_inst)
79 new_inst->ir = inst->ir;
80 new_inst->annotation = inst->annotation;
82 inst->insert_before(block, new_inst);
[all...] |
| brw_fs_nir.cpp | [all...] |
| /prebuilts/ndk/r16/sources/third_party/shaderc/third_party/spirv-tools/source/ |
| validate_id.cpp | 1458 spv_instruction_t new_inst = *inst; local
[all...] |
| /external/mesa3d/src/mesa/state_tracker/ |
| st_glsl_to_tgsi.cpp | 3051 glsl_to_tgsi_instruction *inst, *new_inst; local
[all...] |
