1 /* Altera Nios II assembler. 2 Copyright (C) 2012-2016 Free Software Foundation, Inc. 3 Contributed by Nigel Gray (ngray (at) altera.com). 4 Contributed by Mentor Graphics, Inc. 5 6 This file is part of GAS, the GNU Assembler. 7 8 GAS is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 3, or (at your option) 11 any later version. 12 13 GAS is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with GAS; see the file COPYING. If not, write to the Free 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 21 02110-1301, USA. */ 22 23 #include "as.h" 24 #include "opcode/nios2.h" 25 #include "elf/nios2.h" 26 #include "tc-nios2.h" 27 #include "bfd.h" 28 #include "libbfd.h" 29 #include "dwarf2dbg.h" 30 #include "subsegs.h" 31 #include "safe-ctype.h" 32 #include "dw2gencfi.h" 33 34 #ifndef OBJ_ELF 35 /* We are not supporting any other target so we throw a compile time error. */ 36 OBJ_ELF not defined 37 #endif 38 39 /* We can choose our endianness at run-time, regardless of configuration. */ 40 extern int target_big_endian; 41 42 /* This array holds the chars that always start a comment. If the 43 pre-processor is disabled, these aren't very useful. */ 44 const char comment_chars[] = "#"; 45 46 /* This array holds the chars that only start a comment at the beginning of 47 a line. If the line seems to have the form '# 123 filename' 48 .line and .file directives will appear in the pre-processed output. */ 49 /* Note that input_file.c hand checks for '#' at the beginning of the 50 first line of the input file. This is because the compiler outputs 51 #NO_APP at the beginning of its output. */ 52 /* Also note that C style comments are always supported. */ 53 const char line_comment_chars[] = "#"; 54 55 /* This array holds machine specific line separator characters. */ 56 const char line_separator_chars[] = ";"; 57 58 /* Chars that can be used to separate mant from exp in floating point nums. */ 59 const char EXP_CHARS[] = "eE"; 60 61 /* Chars that mean this number is a floating point constant. */ 62 /* As in 0f12.456 */ 63 /* or 0d1.2345e12 */ 64 const char FLT_CHARS[] = "rRsSfFdDxXpP"; 65 66 /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be 67 changed in read.c. Ideally it shouldn't have to know about it at all, 68 but nothing is ideal around here. */ 69 70 /* Machine-dependent command-line options. */ 71 72 const char *md_shortopts = "r"; 73 74 struct option md_longopts[] = { 75 #define OPTION_RELAX_ALL (OPTION_MD_BASE + 0) 76 {"relax-all", no_argument, NULL, OPTION_RELAX_ALL}, 77 #define OPTION_NORELAX (OPTION_MD_BASE + 1) 78 {"no-relax", no_argument, NULL, OPTION_NORELAX}, 79 #define OPTION_RELAX_SECTION (OPTION_MD_BASE + 2) 80 {"relax-section", no_argument, NULL, OPTION_RELAX_SECTION}, 81 #define OPTION_EB (OPTION_MD_BASE + 3) 82 {"EB", no_argument, NULL, OPTION_EB}, 83 #define OPTION_EL (OPTION_MD_BASE + 4) 84 {"EL", no_argument, NULL, OPTION_EL}, 85 #define OPTION_MARCH (OPTION_MD_BASE + 5) 86 {"march", required_argument, NULL, OPTION_MARCH} 87 }; 88 89 size_t md_longopts_size = sizeof (md_longopts); 90 91 /* The assembler supports three different relaxation modes, controlled by 92 command-line options. */ 93 typedef enum 94 { 95 relax_section = 0, 96 relax_none, 97 relax_all 98 } relax_optionT; 99 100 /* Struct contains all assembler options set with .set. */ 101 static struct 102 { 103 /* .set noat -> noat = 1 allows assembly code to use at without warning 104 and macro expansions generate a warning. 105 .set at -> noat = 0, assembly code using at warn but macro expansions 106 do not generate warnings. */ 107 bfd_boolean noat; 108 109 /* .set nobreak -> nobreak = 1 allows assembly code to use ba,bt without 110 warning. 111 .set break -> nobreak = 0, assembly code using ba,bt warns. */ 112 bfd_boolean nobreak; 113 114 /* .cmd line option -relax-all allows all branches and calls to be replaced 115 with longer versions. 116 -no-relax inhibits branch/call conversion. 117 The default value is relax_section, which relaxes branches within 118 a section. */ 119 relax_optionT relax; 120 121 } nios2_as_options = {FALSE, FALSE, relax_section}; 122 123 124 typedef struct nios2_insn_reloc 125 { 126 /* Any expression in the instruction is parsed into this field, 127 which is passed to fix_new_exp() to generate a fixup. */ 128 expressionS reloc_expression; 129 130 /* The type of the relocation to be applied. */ 131 bfd_reloc_code_real_type reloc_type; 132 133 /* PC-relative. */ 134 unsigned int reloc_pcrel; 135 136 /* The next relocation to be applied to the instruction. */ 137 struct nios2_insn_reloc *reloc_next; 138 } nios2_insn_relocS; 139 140 /* This struct is used to hold state when assembling instructions. */ 141 typedef struct nios2_insn_info 142 { 143 /* Assembled instruction. */ 144 unsigned long insn_code; 145 146 /* Constant bits masked into insn_code for self-check mode. */ 147 unsigned long constant_bits; 148 149 /* Pointer to the relevant bit of the opcode table. */ 150 const struct nios2_opcode *insn_nios2_opcode; 151 /* After parsing ptrs to the tokens in the instruction fill this array 152 it is terminated with a null pointer (hence the first +1). 153 The second +1 is because in some parts of the code the opcode 154 is not counted as a token, but still placed in this array. */ 155 const char *insn_tokens[NIOS2_MAX_INSN_TOKENS + 1 + 1]; 156 157 /* This holds information used to generate fixups 158 and eventually relocations if it is not null. */ 159 nios2_insn_relocS *insn_reloc; 160 } nios2_insn_infoS; 161 162 163 /* This struct is used to convert Nios II pseudo-ops into the 164 corresponding real op. */ 165 typedef struct nios2_ps_insn_info 166 { 167 /* Map this pseudo_op... */ 168 const char *pseudo_insn; 169 170 /* ...to this real instruction. */ 171 const char *insn; 172 173 /* Call this function to modify the operands.... */ 174 void (*arg_modifer_func) (char ** parsed_args, const char *arg, int num, 175 int start); 176 177 /* ...with these arguments. */ 178 const char *arg_modifier; 179 int num; 180 int index; 181 182 /* If arg_modifier_func allocates new memory, provide this function 183 to free it afterwards. */ 184 void (*arg_cleanup_func) (char **parsed_args, int num, int start); 185 } nios2_ps_insn_infoS; 186 187 /* Opcode hash table. */ 188 static struct hash_control *nios2_opcode_hash = NULL; 189 #define nios2_opcode_lookup(NAME) \ 190 ((struct nios2_opcode *) hash_find (nios2_opcode_hash, (NAME))) 191 192 /* Register hash table. */ 193 static struct hash_control *nios2_reg_hash = NULL; 194 #define nios2_reg_lookup(NAME) \ 195 ((struct nios2_reg *) hash_find (nios2_reg_hash, (NAME))) 196 197 198 /* Pseudo-op hash table. */ 199 static struct hash_control *nios2_ps_hash = NULL; 200 #define nios2_ps_lookup(NAME) \ 201 ((nios2_ps_insn_infoS *) hash_find (nios2_ps_hash, (NAME))) 202 203 /* The known current alignment of the current section. */ 204 static int nios2_current_align; 205 static segT nios2_current_align_seg; 206 207 static int nios2_auto_align_on = 1; 208 209 /* The last seen label in the current section. This is used to auto-align 210 labels preceeding instructions. */ 211 static symbolS *nios2_last_label; 212 213 /* If we saw a 16-bit CDX instruction, we can align on 2-byte boundaries 214 instead of 4-bytes. Use this to keep track of the minimum power-of-2 215 alignment. */ 216 static int nios2_min_align = 2; 217 218 #ifdef OBJ_ELF 219 /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */ 220 symbolS *GOT_symbol; 221 #endif 222 223 /* The processor architecture value, EF_NIOS2_ARCH_R1 by default. */ 224 static int nios2_architecture = EF_NIOS2_ARCH_R1; 225 226 227 /** Utility routines. */ 229 /* Function md_chars_to_number takes the sequence of 230 bytes in buf and returns the corresponding value 231 in an int. n must be 1, 2 or 4. */ 232 static valueT 233 md_chars_to_number (char *buf, int n) 234 { 235 int i; 236 valueT val; 237 238 gas_assert (n == 1 || n == 2 || n == 4); 239 240 val = 0; 241 if (target_big_endian) 242 for (i = 0; i < n; ++i) 243 val = val | ((buf[i] & 0xff) << 8 * (n - (i + 1))); 244 else 245 for (i = 0; i < n; ++i) 246 val = val | ((buf[i] & 0xff) << 8 * i); 247 return val; 248 } 249 250 251 /* This function turns a C long int, short int or char 252 into the series of bytes that represent the number 253 on the target machine. */ 254 void 255 md_number_to_chars (char *buf, valueT val, int n) 256 { 257 gas_assert (n == 1 || n == 2 || n == 4 || n == 8); 258 if (target_big_endian) 259 number_to_chars_bigendian (buf, val, n); 260 else 261 number_to_chars_littleendian (buf, val, n); 262 } 263 264 /* Turn a string in input_line_pointer into a floating point constant 265 of type TYPE, and store the appropriate bytes in *LITP. The number 266 of LITTLENUMS emitted is stored in *SIZEP. An error message is 267 returned, or NULL on OK. */ 268 const char * 269 md_atof (int type, char *litP, int *sizeP) 270 { 271 int prec; 272 LITTLENUM_TYPE words[4]; 273 char *t; 274 int i; 275 276 switch (type) 277 { 278 case 'f': 279 prec = 2; 280 break; 281 case 'd': 282 prec = 4; 283 break; 284 default: 285 *sizeP = 0; 286 return _("bad call to md_atof"); 287 } 288 289 t = atof_ieee (input_line_pointer, type, words); 290 if (t) 291 input_line_pointer = t; 292 293 *sizeP = prec * 2; 294 295 if (! target_big_endian) 296 for (i = prec - 1; i >= 0; i--, litP += 2) 297 md_number_to_chars (litP, (valueT) words[i], 2); 298 else 299 for (i = 0; i < prec; i++, litP += 2) 300 md_number_to_chars (litP, (valueT) words[i], 2); 301 302 return NULL; 303 } 304 305 /* Return true if STR starts with PREFIX, which should be a string literal. */ 306 #define strprefix(STR, PREFIX) \ 307 (strncmp ((STR), PREFIX, strlen (PREFIX)) == 0) 308 309 310 /* Return true if STR is prefixed with a special relocation operator. */ 311 static int 312 nios2_special_relocation_p (const char *str) 313 { 314 return (strprefix (str, "%lo") 315 || strprefix (str, "%hi") 316 || strprefix (str, "%hiadj") 317 || strprefix (str, "%gprel") 318 || strprefix (str, "%got") 319 || strprefix (str, "%call") 320 || strprefix (str, "%gotoff_lo") 321 || strprefix (str, "%gotoff_hiadj") 322 || strprefix (str, "%tls_gd") 323 || strprefix (str, "%tls_ldm") 324 || strprefix (str, "%tls_ldo") 325 || strprefix (str, "%tls_ie") 326 || strprefix (str, "%tls_le") 327 || strprefix (str, "%gotoff")); 328 } 329 330 331 /* nop fill patterns for text section. */ 332 static char const nop_r1[4] = { 0x3a, 0x88, 0x01, 0x00 }; 333 static char const nop_r2[4] = { 0x20, 0x00, 0x00, 0xc4 }; 334 static char const nop_r2_cdx[2] = { 0x3b, 0x00 }; 335 static char const *nop32 = nop_r1; 336 static char const *nop16 = NULL; 337 338 /* Handles all machine-dependent alignment needs. */ 339 static void 340 nios2_align (int log_size, const char *pfill, symbolS *label) 341 { 342 int align; 343 long max_alignment = 15; 344 345 /* The front end is prone to changing segments out from under us 346 temporarily when -g is in effect. */ 347 int switched_seg_p = (nios2_current_align_seg != now_seg); 348 349 align = log_size; 350 if (align > max_alignment) 351 { 352 align = max_alignment; 353 as_bad (_("Alignment too large: %d. assumed"), align); 354 } 355 else if (align < 0) 356 { 357 as_warn (_("Alignment negative: 0 assumed")); 358 align = 0; 359 } 360 361 if (align != 0) 362 { 363 if (subseg_text_p (now_seg) && align >= nios2_min_align) 364 { 365 /* First, make sure we're on the minimum boundary, in case 366 someone has been putting .byte values the text section. */ 367 if (nios2_current_align < nios2_min_align || switched_seg_p) 368 frag_align (nios2_min_align, 0, 0); 369 370 /* If we might be on a 2-byte boundary, first align to a 371 4-byte boundary using the 2-byte nop as fill. */ 372 if (nios2_min_align == 1 373 && align > nios2_min_align 374 && pfill == nop32 ) 375 { 376 gas_assert (nop16); 377 frag_align_pattern (2, nop16, 2, 0); 378 } 379 380 /* Now fill in the alignment pattern. */ 381 if (pfill != NULL) 382 frag_align_pattern (align, pfill, 4, 0); 383 else 384 frag_align (align, 0, 0); 385 } 386 else 387 frag_align (align, 0, 0); 388 389 if (!switched_seg_p) 390 nios2_current_align = align; 391 392 /* If the last label was in a different section we can't align it. */ 393 if (label != NULL && !switched_seg_p) 394 { 395 symbolS *sym; 396 int label_seen = FALSE; 397 struct frag *old_frag; 398 valueT old_value; 399 valueT new_value; 400 401 gas_assert (S_GET_SEGMENT (label) == now_seg); 402 403 old_frag = symbol_get_frag (label); 404 old_value = S_GET_VALUE (label); 405 new_value = (valueT) frag_now_fix (); 406 407 /* It is possible to have more than one label at a particular 408 address, especially if debugging is enabled, so we must 409 take care to adjust all the labels at this address in this 410 fragment. To save time we search from the end of the symbol 411 list, backwards, since the symbols we are interested in are 412 almost certainly the ones that were most recently added. 413 Also to save time we stop searching once we have seen at least 414 one matching label, and we encounter a label that is no longer 415 in the target fragment. Note, this search is guaranteed to 416 find at least one match when sym == label, so no special case 417 code is necessary. */ 418 for (sym = symbol_lastP; sym != NULL; sym = symbol_previous (sym)) 419 if (symbol_get_frag (sym) == old_frag 420 && S_GET_VALUE (sym) == old_value) 421 { 422 label_seen = TRUE; 423 symbol_set_frag (sym, frag_now); 424 S_SET_VALUE (sym, new_value); 425 } 426 else if (label_seen && symbol_get_frag (sym) != old_frag) 427 break; 428 } 429 record_alignment (now_seg, align); 430 } 431 } 432 433 434 /** Support for self-check mode. */ 436 437 /* Mode of the assembler. */ 438 typedef enum 439 { 440 NIOS2_MODE_ASSEMBLE, /* Ordinary operation. */ 441 NIOS2_MODE_TEST /* Hidden mode used for self testing. */ 442 } NIOS2_MODE; 443 444 static NIOS2_MODE nios2_mode = NIOS2_MODE_ASSEMBLE; 445 446 /* This function is used to in self-checking mode 447 to check the assembled instruction 448 opcode should be the assembled opcode, and exp_opcode 449 the parsed string representing the expected opcode. */ 450 static void 451 nios2_check_assembly (unsigned int opcode, const char *exp_opcode) 452 { 453 if (nios2_mode == NIOS2_MODE_TEST) 454 { 455 if (exp_opcode == NULL) 456 as_bad (_("expecting opcode string in self test mode")); 457 else if (opcode != strtoul (exp_opcode, NULL, 16)) 458 as_bad (_("assembly 0x%08x, expected %s"), opcode, exp_opcode); 459 } 460 } 461 462 463 /** Support for machine-dependent assembler directives. */ 465 /* Handle the .align pseudo-op. This aligns to a power of two. It 466 also adjusts any current instruction label. We treat this the same 467 way the MIPS port does: .align 0 turns off auto alignment. */ 468 static void 469 s_nios2_align (int ignore ATTRIBUTE_UNUSED) 470 { 471 int align; 472 char fill; 473 const char *pfill = NULL; 474 long max_alignment = 15; 475 476 align = get_absolute_expression (); 477 if (align > max_alignment) 478 { 479 align = max_alignment; 480 as_bad (_("Alignment too large: %d. assumed"), align); 481 } 482 else if (align < 0) 483 { 484 as_warn (_("Alignment negative: 0 assumed")); 485 align = 0; 486 } 487 488 if (*input_line_pointer == ',') 489 { 490 input_line_pointer++; 491 fill = get_absolute_expression (); 492 pfill = (const char *) &fill; 493 } 494 else if (subseg_text_p (now_seg)) 495 pfill = (const char *) nop32; 496 else 497 { 498 pfill = NULL; 499 nios2_last_label = NULL; 500 } 501 502 if (align != 0) 503 { 504 nios2_auto_align_on = 1; 505 nios2_align (align, pfill, nios2_last_label); 506 nios2_last_label = NULL; 507 } 508 else 509 nios2_auto_align_on = 0; 510 511 demand_empty_rest_of_line (); 512 } 513 514 /* Handle the .text pseudo-op. This is like the usual one, but it 515 clears the saved last label and resets known alignment. */ 516 static void 517 s_nios2_text (int i) 518 { 519 s_text (i); 520 nios2_last_label = NULL; 521 nios2_current_align = 0; 522 nios2_current_align_seg = now_seg; 523 } 524 525 /* Handle the .data pseudo-op. This is like the usual one, but it 526 clears the saved last label and resets known alignment. */ 527 static void 528 s_nios2_data (int i) 529 { 530 s_data (i); 531 nios2_last_label = NULL; 532 nios2_current_align = 0; 533 nios2_current_align_seg = now_seg; 534 } 535 536 /* Handle the .section pseudo-op. This is like the usual one, but it 537 clears the saved last label and resets known alignment. */ 538 static void 539 s_nios2_section (int ignore) 540 { 541 obj_elf_section (ignore); 542 nios2_last_label = NULL; 543 nios2_current_align = 0; 544 nios2_current_align_seg = now_seg; 545 } 546 547 /* Explicitly unaligned cons. */ 548 static void 549 s_nios2_ucons (int nbytes) 550 { 551 int hold; 552 hold = nios2_auto_align_on; 553 nios2_auto_align_on = 0; 554 cons (nbytes); 555 nios2_auto_align_on = hold; 556 } 557 558 /* Handle the .sdata directive. */ 559 static void 560 s_nios2_sdata (int ignore ATTRIBUTE_UNUSED) 561 { 562 get_absolute_expression (); /* Ignored. */ 563 subseg_new (".sdata", 0); 564 demand_empty_rest_of_line (); 565 } 566 567 /* .set sets assembler options eg noat/at and is also used 568 to set symbol values (.equ, .equiv ). */ 569 static void 570 s_nios2_set (int equiv) 571 { 572 char *save = input_line_pointer; 573 char *directive; 574 char delim = get_symbol_name (&directive); 575 char *endline = input_line_pointer; 576 577 (void) restore_line_pointer (delim); 578 579 /* We only want to handle ".set XXX" if the 580 user has tried ".set XXX, YYY" they are not 581 trying a directive. This prevents 582 us from polluting the name space. */ 583 SKIP_WHITESPACE (); 584 if (is_end_of_line[(unsigned char) *input_line_pointer]) 585 { 586 bfd_boolean done = TRUE; 587 *endline = 0; 588 589 if (!strcmp (directive, "noat")) 590 nios2_as_options.noat = TRUE; 591 else if (!strcmp (directive, "at")) 592 nios2_as_options.noat = FALSE; 593 else if (!strcmp (directive, "nobreak")) 594 nios2_as_options.nobreak = TRUE; 595 else if (!strcmp (directive, "break")) 596 nios2_as_options.nobreak = FALSE; 597 else if (!strcmp (directive, "norelax")) 598 nios2_as_options.relax = relax_none; 599 else if (!strcmp (directive, "relaxsection")) 600 nios2_as_options.relax = relax_section; 601 else if (!strcmp (directive, "relaxall")) 602 nios2_as_options.relax = relax_all; 603 else 604 done = FALSE; 605 606 if (done) 607 { 608 *endline = delim; 609 demand_empty_rest_of_line (); 610 return; 611 } 612 } 613 614 /* If we fall through to here, either we have ".set XXX, YYY" 615 or we have ".set XXX" where XXX is unknown or we have 616 a syntax error. */ 617 input_line_pointer = save; 618 s_set (equiv); 619 } 620 621 /* Machine-dependent assembler directives. 622 Format of each entry is: 623 { "directive", handler_func, param } */ 624 const pseudo_typeS md_pseudo_table[] = { 625 {"align", s_nios2_align, 0}, 626 {"text", s_nios2_text, 0}, 627 {"data", s_nios2_data, 0}, 628 {"section", s_nios2_section, 0}, 629 {"section.s", s_nios2_section, 0}, 630 {"sect", s_nios2_section, 0}, 631 {"sect.s", s_nios2_section, 0}, 632 /* .dword and .half are included for compatibility with MIPS. */ 633 {"dword", cons, 8}, 634 {"half", cons, 2}, 635 /* NIOS2 native word size is 4 bytes, so we override 636 the GAS default of 2. */ 637 {"word", cons, 4}, 638 /* Explicitly unaligned directives. */ 639 {"2byte", s_nios2_ucons, 2}, 640 {"4byte", s_nios2_ucons, 4}, 641 {"8byte", s_nios2_ucons, 8}, 642 {"16byte", s_nios2_ucons, 16}, 643 #ifdef OBJ_ELF 644 {"sdata", s_nios2_sdata, 0}, 645 #endif 646 {"set", s_nios2_set, 0}, 647 {NULL, NULL, 0} 648 }; 649 650 651 /** Relaxation support. */ 653 654 /* We support two relaxation modes: a limited PC-relative mode with 655 -relax-section (the default), and an absolute jump mode with -relax-all. 656 657 Nios II PC-relative branch instructions only support 16-bit offsets. 658 And, there's no good way to add a 32-bit constant to the PC without 659 using two registers. 660 661 To deal with this, for the pc-relative relaxation mode we convert 662 br label 663 into a series of 16-bit adds, like: 664 nextpc at 665 addi at, at, 32767 666 ... 667 addi at, at, remainder 668 jmp at 669 670 Similarly, conditional branches are converted from 671 b(condition) r, s, label 672 into a series like: 673 b(opposite condition) r, s, skip 674 nextpc at 675 addi at, at, 32767 676 ... 677 addi at, at, remainder 678 jmp at 679 skip: 680 681 The compiler can do a better job, either by converting the branch 682 directly into a JMP (going through the GOT for PIC) or by allocating 683 a second register for the 32-bit displacement. 684 685 For the -relax-all relaxation mode, the conversions are 686 movhi at, %hi(symbol+offset) 687 ori at, %lo(symbol+offset) 688 jmp at 689 and 690 b(opposite condition), r, s, skip 691 movhi at, %hi(symbol+offset) 692 ori at, %lo(symbol+offset) 693 jmp at 694 skip: 695 respectively. 696 697 16-bit CDX branch instructions are relaxed first into equivalent 698 32-bit branches and then the above transformations are applied 699 if necessary. 700 701 */ 702 703 /* Arbitrarily limit the number of addis we can insert; we need to be able 704 to specify the maximum growth size for each frag that contains a 705 relaxable branch. There's no point in specifying a huge number here 706 since that means the assembler needs to allocate that much extra 707 memory for every branch, and almost no real code will ever need it. 708 Plus, as already noted a better solution is to just use a jmp, or 709 allocate a second register to hold a 32-bit displacement. 710 FIXME: Rather than making this a constant, it could be controlled by 711 a command-line argument. */ 712 #define RELAX_MAX_ADDI 32 713 714 /* The fr_subtype field represents the target-specific relocation state. 715 It has type relax_substateT (unsigned int). We use it to track the 716 number of addis necessary, plus a bit to track whether this is a 717 conditional branch and a bit for 16-bit CDX instructions. 718 Regardless of the smaller RELAX_MAX_ADDI limit, we reserve 16 bits 719 in the fr_subtype to encode the number of addis so that the whole 720 theoretically-valid range is representable. 721 For the -relax-all mode, N = 0 represents an in-range branch and N = 1 722 represents a branch that needs to be relaxed. */ 723 #define UBRANCH (0 << 16) 724 #define CBRANCH (1 << 16) 725 #define CDXBRANCH (1 << 17) 726 #define IS_CBRANCH(SUBTYPE) ((SUBTYPE) & CBRANCH) 727 #define IS_UBRANCH(SUBTYPE) (!IS_CBRANCH (SUBTYPE)) 728 #define IS_CDXBRANCH(SUBTYPE) ((SUBTYPE) & CDXBRANCH) 729 #define UBRANCH_SUBTYPE(N) (UBRANCH | (N)) 730 #define CBRANCH_SUBTYPE(N) (CBRANCH | (N)) 731 #define CDX_UBRANCH_SUBTYPE(N) (CDXBRANCH | UBRANCH | (N)) 732 #define CDX_CBRANCH_SUBTYPE(N) (CDXBRANCH | CBRANCH | (N)) 733 #define SUBTYPE_ADDIS(SUBTYPE) ((SUBTYPE) & 0xffff) 734 735 /* For the -relax-section mode, unconditional branches require 2 extra i 736 nstructions besides the addis, conditional branches require 3. */ 737 #define UBRANCH_ADDIS_TO_SIZE(N) (((N) + 2) * 4) 738 #define CBRANCH_ADDIS_TO_SIZE(N) (((N) + 3) * 4) 739 740 /* For the -relax-all mode, unconditional branches require 3 instructions 741 and conditional branches require 4. */ 742 #define UBRANCH_JUMP_SIZE 12 743 #define CBRANCH_JUMP_SIZE 16 744 745 /* Maximum sizes of relaxation sequences. */ 746 #define UBRANCH_MAX_SIZE \ 747 (nios2_as_options.relax == relax_all \ 748 ? UBRANCH_JUMP_SIZE \ 749 : UBRANCH_ADDIS_TO_SIZE (RELAX_MAX_ADDI)) 750 #define CBRANCH_MAX_SIZE \ 751 (nios2_as_options.relax == relax_all \ 752 ? CBRANCH_JUMP_SIZE \ 753 : CBRANCH_ADDIS_TO_SIZE (RELAX_MAX_ADDI)) 754 755 /* Register number of AT, the assembler temporary. */ 756 #define AT_REGNUM 1 757 758 /* Determine how many bytes are required to represent the sequence 759 indicated by SUBTYPE. */ 760 static int 761 nios2_relax_subtype_size (relax_substateT subtype) 762 { 763 int n = SUBTYPE_ADDIS (subtype); 764 if (n == 0) 765 /* Regular conditional/unconditional branch instruction. */ 766 return (IS_CDXBRANCH (subtype) ? 2 : 4); 767 else if (nios2_as_options.relax == relax_all) 768 return (IS_CBRANCH (subtype) ? CBRANCH_JUMP_SIZE : UBRANCH_JUMP_SIZE); 769 else if (IS_CBRANCH (subtype)) 770 return CBRANCH_ADDIS_TO_SIZE (n); 771 else 772 return UBRANCH_ADDIS_TO_SIZE (n); 773 } 774 775 /* Estimate size of fragp before relaxation. 776 This could also examine the offset in fragp and adjust 777 fragp->fr_subtype, but we will do that in nios2_relax_frag anyway. */ 778 int 779 md_estimate_size_before_relax (fragS *fragp, segT segment ATTRIBUTE_UNUSED) 780 { 781 return nios2_relax_subtype_size (fragp->fr_subtype); 782 } 783 784 /* Implement md_relax_frag, returning the change in size of the frag. */ 785 long 786 nios2_relax_frag (segT segment, fragS *fragp, long stretch) 787 { 788 addressT target = fragp->fr_offset; 789 relax_substateT subtype = fragp->fr_subtype; 790 symbolS *symbolp = fragp->fr_symbol; 791 792 if (symbolp) 793 { 794 fragS *sym_frag = symbol_get_frag (symbolp); 795 offsetT offset; 796 int n; 797 bfd_boolean is_cdx = FALSE; 798 799 target += S_GET_VALUE (symbolp); 800 801 /* See comments in write.c:relax_frag about handling of stretch. */ 802 if (stretch != 0 803 && sym_frag->relax_marker != fragp->relax_marker) 804 { 805 if (stretch < 0 || sym_frag->region == fragp->region) 806 target += stretch; 807 else if (target < fragp->fr_address) 808 target = fragp->fr_next->fr_address + stretch; 809 } 810 811 /* We subtract fr_var (4 for 32-bit insns) because all pc relative 812 branches are from the next instruction. */ 813 offset = target - fragp->fr_address - fragp->fr_fix - fragp->fr_var; 814 if (IS_CDXBRANCH (subtype) && IS_UBRANCH (subtype) 815 && offset >= -1024 && offset < 1024) 816 /* PC-relative CDX branch with 11-bit offset. */ 817 is_cdx = TRUE; 818 else if (IS_CDXBRANCH (subtype) && IS_CBRANCH (subtype) 819 && offset >= -128 && offset < 128) 820 /* PC-relative CDX branch with 8-bit offset. */ 821 is_cdx = TRUE; 822 else if (offset >= -32768 && offset < 32768) 823 /* Fits in PC-relative branch. */ 824 n = 0; 825 else if (nios2_as_options.relax == relax_all) 826 /* Convert to jump. */ 827 n = 1; 828 else if (nios2_as_options.relax == relax_section 829 && S_GET_SEGMENT (symbolp) == segment 830 && S_IS_DEFINED (symbolp)) 831 /* Attempt a PC-relative relaxation on a branch to a defined 832 symbol in the same segment. */ 833 { 834 /* The relaxation for conditional branches is offset by 4 835 bytes because we insert the inverted branch around the 836 sequence. */ 837 if (IS_CBRANCH (subtype)) 838 offset = offset - 4; 839 if (offset > 0) 840 n = offset / 32767 + 1; 841 else 842 n = offset / -32768 + 1; 843 844 /* Bail out immediately if relaxation has failed. If we try to 845 defer the diagnostic to md_convert_frag, some pathological test 846 cases (e.g. gcc/testsuite/gcc.c-torture/compile/20001226-1.c) 847 apparently never converge. By returning 0 here we could pretend 848 to the caller that nothing has changed, but that leaves things 849 in an inconsistent state when we get to md_convert_frag. */ 850 if (n > RELAX_MAX_ADDI) 851 { 852 as_bad_where (fragp->fr_file, fragp->fr_line, 853 _("branch offset out of range\n")); 854 as_fatal (_("branch relaxation failed\n")); 855 } 856 } 857 else 858 /* We cannot handle this case, diagnose overflow later. */ 859 return 0; 860 861 if (is_cdx) 862 fragp->fr_subtype = subtype; 863 else if (IS_CBRANCH (subtype)) 864 fragp->fr_subtype = CBRANCH_SUBTYPE (n); 865 else 866 fragp->fr_subtype = UBRANCH_SUBTYPE (n); 867 868 return (nios2_relax_subtype_size (fragp->fr_subtype) 869 - nios2_relax_subtype_size (subtype)); 870 } 871 872 /* If we got here, it's probably an error. */ 873 return 0; 874 } 875 876 877 /* Complete fragp using the data from the relaxation pass. */ 878 void 879 md_convert_frag (bfd *headers ATTRIBUTE_UNUSED, segT segment ATTRIBUTE_UNUSED, 880 fragS *fragp) 881 { 882 char *buffer = fragp->fr_literal + fragp->fr_fix; 883 relax_substateT subtype = fragp->fr_subtype; 884 int n = SUBTYPE_ADDIS (subtype); 885 addressT target = fragp->fr_offset; 886 symbolS *symbolp = fragp->fr_symbol; 887 offsetT offset; 888 unsigned int addend_mask, addi_mask, op; 889 offsetT addend, remainder; 890 int i; 891 bfd_boolean is_r2 = (bfd_get_mach (stdoutput) == bfd_mach_nios2r2); 892 893 /* If this is a CDX branch we're not relaxing, just generate the fixup. */ 894 if (IS_CDXBRANCH (subtype)) 895 { 896 gas_assert (is_r2); 897 fix_new (fragp, fragp->fr_fix, 2, fragp->fr_symbol, 898 fragp->fr_offset, 1, 899 (IS_UBRANCH (subtype) 900 ? BFD_RELOC_NIOS2_R2_I10_1_PCREL 901 : BFD_RELOC_NIOS2_R2_T1I7_1_PCREL)); 902 fragp->fr_fix += 2; 903 return; 904 } 905 906 /* If this is a CDX branch we are relaxing, turn it into an equivalent 907 32-bit branch and then fall through to the normal non-CDX cases. */ 908 if (fragp->fr_var == 2) 909 { 910 unsigned int opcode = md_chars_to_number (buffer, 2); 911 gas_assert (is_r2); 912 if (IS_CBRANCH (subtype)) 913 { 914 unsigned int reg = nios2_r2_reg3_mappings[GET_IW_T1I7_A3 (opcode)]; 915 if (GET_IW_R2_OP (opcode) == R2_OP_BNEZ_N) 916 opcode = MATCH_R2_BNE | SET_IW_F2I16_A (reg); 917 else 918 opcode = MATCH_R2_BEQ | SET_IW_F2I16_A (reg); 919 } 920 else 921 opcode = MATCH_R2_BR; 922 md_number_to_chars (buffer, opcode, 4); 923 fragp->fr_var = 4; 924 } 925 926 /* If we didn't or can't relax, this is a regular branch instruction. 927 We just need to generate the fixup for the symbol and offset. */ 928 if (n == 0) 929 { 930 fix_new (fragp, fragp->fr_fix, 4, fragp->fr_symbol, 931 fragp->fr_offset, 1, BFD_RELOC_16_PCREL); 932 fragp->fr_fix += 4; 933 return; 934 } 935 936 /* Replace the cbranch at fr_fix with one that has the opposite condition 937 in order to jump around the block of instructions we'll be adding. */ 938 if (IS_CBRANCH (subtype)) 939 { 940 unsigned int br_opcode; 941 unsigned int old_op, new_op; 942 int nbytes; 943 944 /* Account for the nextpc and jmp in the pc-relative case, or the two 945 load instructions and jump in the absolute case. */ 946 if (nios2_as_options.relax == relax_section) 947 nbytes = (n + 2) * 4; 948 else 949 nbytes = 12; 950 951 br_opcode = md_chars_to_number (buffer, 4); 952 if (is_r2) 953 { 954 old_op = GET_IW_R2_OP (br_opcode); 955 switch (old_op) 956 { 957 case R2_OP_BEQ: 958 new_op = R2_OP_BNE; 959 break; 960 case R2_OP_BNE: 961 new_op = R2_OP_BEQ; 962 break; 963 case R2_OP_BGE: 964 new_op = R2_OP_BLT; 965 break; 966 case R2_OP_BGEU: 967 new_op = R2_OP_BLTU; 968 break; 969 case R2_OP_BLT: 970 new_op = R2_OP_BGE; 971 break; 972 case R2_OP_BLTU: 973 new_op = R2_OP_BGEU; 974 break; 975 default: 976 abort (); 977 } 978 br_opcode = ((br_opcode & ~IW_R2_OP_SHIFTED_MASK) 979 | SET_IW_R2_OP (new_op)); 980 br_opcode = br_opcode | SET_IW_F2I16_IMM16 (nbytes); 981 } 982 else 983 { 984 old_op = GET_IW_R1_OP (br_opcode); 985 switch (old_op) 986 { 987 case R1_OP_BEQ: 988 new_op = R1_OP_BNE; 989 break; 990 case R1_OP_BNE: 991 new_op = R1_OP_BEQ; 992 break; 993 case R1_OP_BGE: 994 new_op = R1_OP_BLT; 995 break; 996 case R1_OP_BGEU: 997 new_op = R1_OP_BLTU; 998 break; 999 case R1_OP_BLT: 1000 new_op = R1_OP_BGE; 1001 break; 1002 case R1_OP_BLTU: 1003 new_op = R1_OP_BGEU; 1004 break; 1005 default: 1006 abort (); 1007 } 1008 br_opcode = ((br_opcode & ~IW_R1_OP_SHIFTED_MASK) 1009 | SET_IW_R1_OP (new_op)); 1010 br_opcode = br_opcode | SET_IW_I_IMM16 (nbytes); 1011 } 1012 md_number_to_chars (buffer, br_opcode, 4); 1013 fragp->fr_fix += 4; 1014 buffer += 4; 1015 } 1016 1017 /* Load at for the PC-relative case. */ 1018 if (nios2_as_options.relax == relax_section) 1019 { 1020 /* Insert the nextpc instruction. */ 1021 if (is_r2) 1022 op = MATCH_R2_NEXTPC | SET_IW_F3X6L5_C (AT_REGNUM); 1023 else 1024 op = MATCH_R1_NEXTPC | SET_IW_R_C (AT_REGNUM); 1025 md_number_to_chars (buffer, op, 4); 1026 fragp->fr_fix += 4; 1027 buffer += 4; 1028 1029 /* We need to know whether the offset is positive or negative. */ 1030 target += S_GET_VALUE (symbolp); 1031 offset = target - fragp->fr_address - fragp->fr_fix; 1032 if (offset > 0) 1033 addend = 32767; 1034 else 1035 addend = -32768; 1036 if (is_r2) 1037 addend_mask = SET_IW_F2I16_IMM16 ((unsigned int)addend); 1038 else 1039 addend_mask = SET_IW_I_IMM16 ((unsigned int)addend); 1040 1041 /* Insert n-1 addi instructions. */ 1042 if (is_r2) 1043 addi_mask = (MATCH_R2_ADDI 1044 | SET_IW_F2I16_B (AT_REGNUM) 1045 | SET_IW_F2I16_A (AT_REGNUM)); 1046 else 1047 addi_mask = (MATCH_R1_ADDI 1048 | SET_IW_I_B (AT_REGNUM) 1049 | SET_IW_I_A (AT_REGNUM)); 1050 for (i = 0; i < n - 1; i ++) 1051 { 1052 md_number_to_chars (buffer, addi_mask | addend_mask, 4); 1053 fragp->fr_fix += 4; 1054 buffer += 4; 1055 } 1056 1057 /* Insert the last addi instruction to hold the remainder. */ 1058 remainder = offset - addend * (n - 1); 1059 gas_assert (remainder >= -32768 && remainder <= 32767); 1060 if (is_r2) 1061 addend_mask = SET_IW_F2I16_IMM16 ((unsigned int)remainder); 1062 else 1063 addend_mask = SET_IW_I_IMM16 ((unsigned int)remainder); 1064 md_number_to_chars (buffer, addi_mask | addend_mask, 4); 1065 fragp->fr_fix += 4; 1066 buffer += 4; 1067 } 1068 1069 /* Load at for the absolute case. */ 1070 else 1071 { 1072 if (is_r2) 1073 op = MATCH_R2_ORHI | SET_IW_F2I16_B (AT_REGNUM) | SET_IW_F2I16_A (0); 1074 else 1075 op = MATCH_R1_ORHI | SET_IW_I_B (AT_REGNUM) | SET_IW_I_A (0); 1076 md_number_to_chars (buffer, op, 4); 1077 fix_new (fragp, fragp->fr_fix, 4, fragp->fr_symbol, fragp->fr_offset, 1078 0, BFD_RELOC_NIOS2_HI16); 1079 fragp->fr_fix += 4; 1080 buffer += 4; 1081 if (is_r2) 1082 op = (MATCH_R2_ORI | SET_IW_F2I16_B (AT_REGNUM) 1083 | SET_IW_F2I16_A (AT_REGNUM)); 1084 else 1085 op = (MATCH_R1_ORI | SET_IW_I_B (AT_REGNUM) 1086 | SET_IW_I_A (AT_REGNUM)); 1087 md_number_to_chars (buffer, op, 4); 1088 fix_new (fragp, fragp->fr_fix, 4, fragp->fr_symbol, fragp->fr_offset, 1089 0, BFD_RELOC_NIOS2_LO16); 1090 fragp->fr_fix += 4; 1091 buffer += 4; 1092 } 1093 1094 /* Insert the jmp instruction. */ 1095 if (is_r2) 1096 op = MATCH_R2_JMP | SET_IW_F3X6L5_A (AT_REGNUM); 1097 else 1098 op = MATCH_R1_JMP | SET_IW_R_A (AT_REGNUM); 1099 md_number_to_chars (buffer, op, 4); 1100 fragp->fr_fix += 4; 1101 buffer += 4; 1102 } 1103 1104 1105 /** Fixups and overflow checking. */ 1107 1108 /* Check a fixup for overflow. */ 1109 static bfd_boolean 1110 nios2_check_overflow (valueT fixup, reloc_howto_type *howto) 1111 { 1112 /* If there is a rightshift, check that the low-order bits are 1113 zero before applying it. */ 1114 if (howto->rightshift) 1115 { 1116 if ((~(~((valueT) 0) << howto->rightshift) & fixup) 1117 && howto->complain_on_overflow != complain_overflow_dont) 1118 return TRUE; 1119 fixup = ((signed)fixup) >> howto->rightshift; 1120 } 1121 1122 /* Check for overflow - return TRUE if overflow, FALSE if not. */ 1123 switch (howto->complain_on_overflow) 1124 { 1125 case complain_overflow_dont: 1126 break; 1127 case complain_overflow_bitfield: 1128 if ((fixup >> howto->bitsize) != 0 1129 && ((signed) fixup >> howto->bitsize) != -1) 1130 return TRUE; 1131 break; 1132 case complain_overflow_signed: 1133 if ((fixup & 0x80000000) > 0) 1134 { 1135 /* Check for negative overflow. */ 1136 if ((signed) fixup < (signed) (~0U << (howto->bitsize - 1))) 1137 return TRUE; 1138 } 1139 else 1140 { 1141 /* Check for positive overflow. */ 1142 if (fixup >= ((unsigned) 1 << (howto->bitsize - 1))) 1143 return TRUE; 1144 } 1145 break; 1146 case complain_overflow_unsigned: 1147 if ((fixup >> howto->bitsize) != 0) 1148 return TRUE; 1149 break; 1150 default: 1151 as_bad (_("error checking for overflow - broken assembler")); 1152 break; 1153 } 1154 return FALSE; 1155 } 1156 1157 /* Emit diagnostic for fixup overflow. */ 1158 static void 1159 nios2_diagnose_overflow (valueT fixup, reloc_howto_type *howto, 1160 fixS *fixP, valueT value) 1161 { 1162 if (fixP->fx_r_type == BFD_RELOC_8 1163 || fixP->fx_r_type == BFD_RELOC_16 1164 || fixP->fx_r_type == BFD_RELOC_32) 1165 /* These relocs are against data, not instructions. */ 1166 as_bad_where (fixP->fx_file, fixP->fx_line, 1167 _("immediate value 0x%x truncated to 0x%x"), 1168 (unsigned int) fixup, 1169 (unsigned int) (~(~(valueT) 0 << howto->bitsize) & fixup)); 1170 else 1171 { 1172 /* What opcode is the instruction? This will determine 1173 whether we check for overflow in immediate values 1174 and what error message we get. */ 1175 const struct nios2_opcode *opcode; 1176 enum overflow_type overflow_msg_type; 1177 unsigned int range_min; 1178 unsigned int range_max; 1179 unsigned int address; 1180 1181 opcode = nios2_find_opcode_hash (value, bfd_get_mach (stdoutput)); 1182 gas_assert (opcode); 1183 gas_assert (fixP->fx_size == opcode->size); 1184 overflow_msg_type = opcode->overflow_msg; 1185 switch (overflow_msg_type) 1186 { 1187 case call_target_overflow: 1188 range_min 1189 = ((fixP->fx_frag->fr_address + fixP->fx_where) & 0xf0000000); 1190 range_max = range_min + 0x0fffffff; 1191 address = fixup | range_min; 1192 1193 as_bad_where (fixP->fx_file, fixP->fx_line, 1194 _("call target address 0x%08x out of range 0x%08x to 0x%08x"), 1195 address, range_min, range_max); 1196 break; 1197 case branch_target_overflow: 1198 if (opcode->format == iw_i_type || opcode->format == iw_F2I16_type) 1199 as_bad_where (fixP->fx_file, fixP->fx_line, 1200 _("branch offset %d out of range %d to %d"), 1201 (int)fixup, -32768, 32767); 1202 else 1203 as_bad_where (fixP->fx_file, fixP->fx_line, 1204 _("branch offset %d out of range"), 1205 (int)fixup); 1206 break; 1207 case address_offset_overflow: 1208 if (opcode->format == iw_i_type || opcode->format == iw_F2I16_type) 1209 as_bad_where (fixP->fx_file, fixP->fx_line, 1210 _("%s offset %d out of range %d to %d"), 1211 opcode->name, (int)fixup, -32768, 32767); 1212 else 1213 as_bad_where (fixP->fx_file, fixP->fx_line, 1214 _("%s offset %d out of range"), 1215 opcode->name, (int)fixup); 1216 break; 1217 case signed_immed16_overflow: 1218 as_bad_where (fixP->fx_file, fixP->fx_line, 1219 _("immediate value %d out of range %d to %d"), 1220 (int)fixup, -32768, 32767); 1221 break; 1222 case unsigned_immed16_overflow: 1223 as_bad_where (fixP->fx_file, fixP->fx_line, 1224 _("immediate value %u out of range %u to %u"), 1225 (unsigned int)fixup, 0, 65535); 1226 break; 1227 case unsigned_immed5_overflow: 1228 as_bad_where (fixP->fx_file, fixP->fx_line, 1229 _("immediate value %u out of range %u to %u"), 1230 (unsigned int)fixup, 0, 31); 1231 break; 1232 case signed_immed12_overflow: 1233 as_bad_where (fixP->fx_file, fixP->fx_line, 1234 _("immediate value %d out of range %d to %d"), 1235 (int)fixup, -2048, 2047); 1236 break; 1237 case custom_opcode_overflow: 1238 as_bad_where (fixP->fx_file, fixP->fx_line, 1239 _("custom instruction opcode %u out of range %u to %u"), 1240 (unsigned int)fixup, 0, 255); 1241 break; 1242 default: 1243 as_bad_where (fixP->fx_file, fixP->fx_line, 1244 _("overflow in immediate argument")); 1245 break; 1246 } 1247 } 1248 } 1249 1250 /* Apply a fixup to the object file. */ 1251 void 1252 md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) 1253 { 1254 /* Assert that the fixup is one we can handle. */ 1255 gas_assert (fixP != NULL && valP != NULL 1256 && (fixP->fx_r_type == BFD_RELOC_8 1257 || fixP->fx_r_type == BFD_RELOC_16 1258 || fixP->fx_r_type == BFD_RELOC_32 1259 || fixP->fx_r_type == BFD_RELOC_64 1260 || fixP->fx_r_type == BFD_RELOC_NIOS2_S16 1261 || fixP->fx_r_type == BFD_RELOC_NIOS2_U16 1262 || fixP->fx_r_type == BFD_RELOC_16_PCREL 1263 || fixP->fx_r_type == BFD_RELOC_NIOS2_CALL26 1264 || fixP->fx_r_type == BFD_RELOC_NIOS2_IMM5 1265 || fixP->fx_r_type == BFD_RELOC_NIOS2_CACHE_OPX 1266 || fixP->fx_r_type == BFD_RELOC_NIOS2_IMM6 1267 || fixP->fx_r_type == BFD_RELOC_NIOS2_IMM8 1268 || fixP->fx_r_type == BFD_RELOC_NIOS2_HI16 1269 || fixP->fx_r_type == BFD_RELOC_NIOS2_LO16 1270 || fixP->fx_r_type == BFD_RELOC_NIOS2_HIADJ16 1271 || fixP->fx_r_type == BFD_RELOC_NIOS2_GPREL 1272 || fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT 1273 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY 1274 || fixP->fx_r_type == BFD_RELOC_NIOS2_UJMP 1275 || fixP->fx_r_type == BFD_RELOC_NIOS2_CJMP 1276 || fixP->fx_r_type == BFD_RELOC_NIOS2_CALLR 1277 || fixP->fx_r_type == BFD_RELOC_NIOS2_ALIGN 1278 || fixP->fx_r_type == BFD_RELOC_NIOS2_GOT16 1279 || fixP->fx_r_type == BFD_RELOC_NIOS2_CALL16 1280 || fixP->fx_r_type == BFD_RELOC_NIOS2_GOTOFF_LO 1281 || fixP->fx_r_type == BFD_RELOC_NIOS2_GOTOFF_HA 1282 || fixP->fx_r_type == BFD_RELOC_NIOS2_TLS_GD16 1283 || fixP->fx_r_type == BFD_RELOC_NIOS2_TLS_LDM16 1284 || fixP->fx_r_type == BFD_RELOC_NIOS2_TLS_LDO16 1285 || fixP->fx_r_type == BFD_RELOC_NIOS2_TLS_IE16 1286 || fixP->fx_r_type == BFD_RELOC_NIOS2_TLS_LE16 1287 || fixP->fx_r_type == BFD_RELOC_NIOS2_GOTOFF 1288 || fixP->fx_r_type == BFD_RELOC_NIOS2_TLS_DTPREL 1289 || fixP->fx_r_type == BFD_RELOC_NIOS2_CALL26_NOAT 1290 || fixP->fx_r_type == BFD_RELOC_NIOS2_GOT_LO 1291 || fixP->fx_r_type == BFD_RELOC_NIOS2_GOT_HA 1292 || fixP->fx_r_type == BFD_RELOC_NIOS2_CALL_LO 1293 || fixP->fx_r_type == BFD_RELOC_NIOS2_CALL_HA 1294 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_S12 1295 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_I10_1_PCREL 1296 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T1I7_1_PCREL 1297 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T1I7_2 1298 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T2I4 1299 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T2I4_1 1300 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T2I4_2 1301 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_X1I7_2 1302 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_X2L5 1303 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_F1I5_2 1304 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_L5I4X1 1305 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T1X1I6 1306 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T1X1I6_2 1307 /* Add other relocs here as we generate them. */ 1308 )); 1309 1310 if (fixP->fx_r_type == BFD_RELOC_64) 1311 { 1312 /* We may reach here due to .8byte directives, but we never output 1313 BFD_RELOC_64; it must be resolved. */ 1314 if (fixP->fx_addsy != NULL) 1315 as_bad_where (fixP->fx_file, fixP->fx_line, 1316 _("cannot create 64-bit relocation")); 1317 else 1318 { 1319 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, 1320 *valP, 8); 1321 fixP->fx_done = 1; 1322 } 1323 return; 1324 } 1325 1326 /* The value passed in valP can be the value of a fully 1327 resolved expression, or it can be the value of a partially 1328 resolved expression. In the former case, both fixP->fx_addsy 1329 and fixP->fx_subsy are NULL, and fixP->fx_offset == *valP, and 1330 we can fix up the instruction that fixP relates to. 1331 In the latter case, one or both of fixP->fx_addsy and 1332 fixP->fx_subsy are not NULL, and fixP->fx_offset may or may not 1333 equal *valP. We don't need to check for fixP->fx_subsy being null 1334 because the generic part of the assembler generates an error if 1335 it is not an absolute symbol. */ 1336 if (fixP->fx_addsy != NULL) 1337 /* Partially resolved expression. */ 1338 { 1339 fixP->fx_addnumber = fixP->fx_offset; 1340 fixP->fx_done = 0; 1341 1342 switch (fixP->fx_r_type) 1343 { 1344 case BFD_RELOC_NIOS2_TLS_GD16: 1345 case BFD_RELOC_NIOS2_TLS_LDM16: 1346 case BFD_RELOC_NIOS2_TLS_LDO16: 1347 case BFD_RELOC_NIOS2_TLS_IE16: 1348 case BFD_RELOC_NIOS2_TLS_LE16: 1349 case BFD_RELOC_NIOS2_TLS_DTPMOD: 1350 case BFD_RELOC_NIOS2_TLS_DTPREL: 1351 case BFD_RELOC_NIOS2_TLS_TPREL: 1352 S_SET_THREAD_LOCAL (fixP->fx_addsy); 1353 break; 1354 default: 1355 break; 1356 } 1357 } 1358 else 1359 /* Fully resolved fixup. */ 1360 { 1361 reloc_howto_type *howto 1362 = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type); 1363 1364 if (howto == NULL) 1365 as_bad_where (fixP->fx_file, fixP->fx_line, 1366 _("relocation is not supported")); 1367 else 1368 { 1369 valueT fixup = *valP; 1370 valueT value; 1371 char *buf; 1372 1373 /* If this is a pc-relative relocation, we need to 1374 subtract the current offset within the object file 1375 FIXME : for some reason fixP->fx_pcrel isn't 1 when it should be 1376 so I'm using the howto structure instead to determine this. */ 1377 if (howto->pc_relative == 1) 1378 { 1379 fixup = (fixup - (fixP->fx_frag->fr_address + fixP->fx_where 1380 + fixP->fx_size)); 1381 *valP = fixup; 1382 } 1383 1384 /* Get the instruction or data to be fixed up. */ 1385 buf = fixP->fx_frag->fr_literal + fixP->fx_where; 1386 value = md_chars_to_number (buf, fixP->fx_size); 1387 1388 /* Check for overflow, emitting a diagnostic if necessary. */ 1389 if (nios2_check_overflow (fixup, howto)) 1390 nios2_diagnose_overflow (fixup, howto, fixP, value); 1391 1392 /* Apply the right shift. */ 1393 fixup = ((signed)fixup) >> howto->rightshift; 1394 1395 /* Truncate the fixup to right size. */ 1396 switch (fixP->fx_r_type) 1397 { 1398 case BFD_RELOC_NIOS2_HI16: 1399 fixup = (fixup >> 16) & 0xFFFF; 1400 break; 1401 case BFD_RELOC_NIOS2_LO16: 1402 fixup = fixup & 0xFFFF; 1403 break; 1404 case BFD_RELOC_NIOS2_HIADJ16: 1405 fixup = ((((fixup >> 16) & 0xFFFF) + ((fixup >> 15) & 0x01)) 1406 & 0xFFFF); 1407 break; 1408 default: 1409 { 1410 int n = sizeof (fixup) * 8 - howto->bitsize; 1411 fixup = (fixup << n) >> n; 1412 break; 1413 } 1414 } 1415 1416 /* Fix up the instruction. */ 1417 value = (value & ~howto->dst_mask) | (fixup << howto->bitpos); 1418 md_number_to_chars (buf, value, fixP->fx_size); 1419 } 1420 1421 fixP->fx_done = 1; 1422 } 1423 1424 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT) 1425 { 1426 fixP->fx_done = 0; 1427 if (fixP->fx_addsy 1428 && !S_IS_DEFINED (fixP->fx_addsy) && !S_IS_WEAK (fixP->fx_addsy)) 1429 S_SET_WEAK (fixP->fx_addsy); 1430 } 1431 else if (fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) 1432 fixP->fx_done = 0; 1433 } 1434 1435 1436 1437 /** Instruction parsing support. */ 1439 1440 /* General internal error routine. */ 1441 1442 static void 1443 bad_opcode (const struct nios2_opcode *op) 1444 { 1445 fprintf (stderr, _("internal error: broken opcode descriptor for `%s %s'\n"), 1446 op->name, op->args); 1447 as_fatal (_("Broken assembler. No assembly attempted.")); 1448 } 1449 1450 /* Special relocation directive strings. */ 1451 1452 struct nios2_special_relocS 1453 { 1454 const char *string; 1455 bfd_reloc_code_real_type reloc_type; 1456 }; 1457 1458 /* This table is sorted so that prefix strings are listed after the longer 1459 strings that include them -- e.g., %got after %got_hiadj, etc. */ 1460 1461 struct nios2_special_relocS nios2_special_reloc[] = { 1462 {"%hiadj", BFD_RELOC_NIOS2_HIADJ16}, 1463 {"%hi", BFD_RELOC_NIOS2_HI16}, 1464 {"%lo", BFD_RELOC_NIOS2_LO16}, 1465 {"%gprel", BFD_RELOC_NIOS2_GPREL}, 1466 {"%call_lo", BFD_RELOC_NIOS2_CALL_LO}, 1467 {"%call_hiadj", BFD_RELOC_NIOS2_CALL_HA}, 1468 {"%call", BFD_RELOC_NIOS2_CALL16}, 1469 {"%gotoff_lo", BFD_RELOC_NIOS2_GOTOFF_LO}, 1470 {"%gotoff_hiadj", BFD_RELOC_NIOS2_GOTOFF_HA}, 1471 {"%gotoff", BFD_RELOC_NIOS2_GOTOFF}, 1472 {"%got_hiadj", BFD_RELOC_NIOS2_GOT_HA}, 1473 {"%got_lo", BFD_RELOC_NIOS2_GOT_LO}, 1474 {"%got", BFD_RELOC_NIOS2_GOT16}, 1475 {"%tls_gd", BFD_RELOC_NIOS2_TLS_GD16}, 1476 {"%tls_ldm", BFD_RELOC_NIOS2_TLS_LDM16}, 1477 {"%tls_ldo", BFD_RELOC_NIOS2_TLS_LDO16}, 1478 {"%tls_ie", BFD_RELOC_NIOS2_TLS_IE16}, 1479 {"%tls_le", BFD_RELOC_NIOS2_TLS_LE16}, 1480 }; 1481 1482 #define NIOS2_NUM_SPECIAL_RELOCS \ 1483 (sizeof(nios2_special_reloc)/sizeof(nios2_special_reloc[0])) 1484 const int nios2_num_special_relocs = NIOS2_NUM_SPECIAL_RELOCS; 1485 1486 /* Creates a new nios2_insn_relocS and returns a pointer to it. */ 1487 static nios2_insn_relocS * 1488 nios2_insn_reloc_new (bfd_reloc_code_real_type reloc_type, unsigned int pcrel) 1489 { 1490 nios2_insn_relocS *retval; 1491 retval = XNEW (nios2_insn_relocS); 1492 if (retval == NULL) 1493 { 1494 as_bad (_("can't create relocation")); 1495 abort (); 1496 } 1497 1498 /* Fill out the fields with default values. */ 1499 retval->reloc_next = NULL; 1500 retval->reloc_type = reloc_type; 1501 retval->reloc_pcrel = pcrel; 1502 return retval; 1503 } 1504 1505 /* Frees up memory previously allocated by nios2_insn_reloc_new(). */ 1506 /* FIXME: this is never called; memory leak? */ 1507 #if 0 1508 static void 1509 nios2_insn_reloc_destroy (nios2_insn_relocS *reloc) 1510 { 1511 gas_assert (reloc != NULL); 1512 free (reloc); 1513 } 1514 #endif 1515 1516 /* Look up a register name and validate it for the given regtype. 1517 Return the register mapping or NULL on failure. */ 1518 static struct nios2_reg * 1519 nios2_parse_reg (const char *token, unsigned long regtype) 1520 { 1521 struct nios2_reg *reg = nios2_reg_lookup (token); 1522 1523 if (reg == NULL) 1524 { 1525 as_bad (_("unknown register %s"), token); 1526 return NULL; 1527 } 1528 1529 /* Matched a register, but is it the wrong type? */ 1530 if (!(regtype & reg->regtype)) 1531 { 1532 if (regtype & REG_CONTROL) 1533 as_bad (_("expecting control register")); 1534 else if (reg->regtype & REG_CONTROL) 1535 as_bad (_("illegal use of control register")); 1536 else if (reg->regtype & REG_COPROCESSOR) 1537 as_bad (_("illegal use of coprocessor register")); 1538 else 1539 as_bad (_("invalid register %s"), token); 1540 return NULL; 1541 } 1542 1543 /* Warn for explicit use of special registers. */ 1544 if (reg->regtype & REG_NORMAL) 1545 { 1546 if (!nios2_as_options.noat && reg->index == 1) 1547 as_warn (_("Register at (r1) can sometimes be corrupted by " 1548 "assembler optimizations.\n" 1549 "Use .set noat to turn off those optimizations " 1550 "(and this warning).")); 1551 if (!nios2_as_options.nobreak && reg->index == 25) 1552 as_warn (_("The debugger will corrupt bt (r25).\n" 1553 "If you don't need to debug this " 1554 "code use .set nobreak to turn off this warning.")); 1555 if (!nios2_as_options.nobreak && reg->index == 30) 1556 as_warn (_("The debugger will corrupt sstatus/ba (r30).\n" 1557 "If you don't need to debug this " 1558 "code use .set nobreak to turn off this warning.")); 1559 } 1560 1561 return reg; 1562 } 1563 1564 /* This function parses a reglist for ldwm/stwm and push.n/pop.n 1565 instructions, given as a brace-enclosed register list. The tokenizer 1566 has replaced commas in the token with spaces. 1567 The return value is a bitmask of registers in the set. It also 1568 sets nios2_reglist_mask and nios2_reglist_dir to allow error checking 1569 when parsing the base register. */ 1570 1571 static unsigned long nios2_reglist_mask; 1572 static int nios2_reglist_dir; 1573 1574 static unsigned long 1575 nios2_parse_reglist (char *token, const struct nios2_opcode *op) 1576 { 1577 unsigned long mask = 0; 1578 int dir = 0; 1579 unsigned long regtype = 0; 1580 int last = -1; 1581 const char *regname; 1582 1583 nios2_reglist_mask = 0; 1584 nios2_reglist_dir = 0; 1585 1586 if (op->match == MATCH_R2_LDWM || op->match == MATCH_R2_STWM) 1587 { 1588 regtype = REG_LDWM; 1589 dir = 0; 1590 } 1591 else if (op->match == MATCH_R2_PUSH_N) 1592 { 1593 regtype = REG_POP; 1594 dir = -1; 1595 } 1596 else if (op->match == MATCH_R2_POP_N) 1597 { 1598 regtype = REG_POP; 1599 dir = 1; 1600 } 1601 else 1602 bad_opcode (op); 1603 1604 for (regname = strtok (token, "{ }"); 1605 regname; 1606 regname = strtok (NULL, "{ }")) 1607 { 1608 int regno; 1609 struct nios2_reg *reg = nios2_parse_reg (regname, regtype); 1610 1611 if (!reg) 1612 break; 1613 regno = reg->index; 1614 1615 /* Make sure registers are listed in proper sequence. */ 1616 if (last >= 0) 1617 { 1618 if (regno == last) 1619 { 1620 as_bad ("duplicate register %s\n", reg->name); 1621 return 0; 1622 } 1623 else if (dir == 0) 1624 dir = (regno < last ? -1 : 1); 1625 else if ((dir > 0 && regno < last) 1626 || (dir < 0 && regno > last) 1627 || (op->match == MATCH_R2_PUSH_N 1628 && ! ((last == 31 && regno == 28) 1629 || (last == 31 && regno <= 23) 1630 || (last == 28 && regno <= 23) 1631 || (regno < 23 && regno == last - 1))) 1632 || (op->match == MATCH_R2_POP_N 1633 && ! ((regno == 31 && last == 28) 1634 || (regno == 31 && last <= 23) 1635 || (regno == 28 && last <= 23) 1636 || (last < 23 && last == regno - 1)))) 1637 { 1638 as_bad ("invalid register order"); 1639 return 0; 1640 } 1641 } 1642 1643 mask |= 1 << regno; 1644 last = regno; 1645 } 1646 1647 /* Check that all ldwm/stwm regs belong to the same set. */ 1648 if ((op->match == MATCH_R2_LDWM || op->match == MATCH_R2_STWM) 1649 && (mask & 0x00003ffc) && (mask & 0x90ffc000)) 1650 { 1651 as_bad ("invalid register set in reglist"); 1652 return 0; 1653 } 1654 1655 /* Check that push.n/pop.n regs include RA. */ 1656 if ((op->match == MATCH_R2_PUSH_N || op->match == MATCH_R2_POP_N) 1657 && ((mask & 0x80000000) == 0)) 1658 { 1659 as_bad ("reglist must include ra (r31)"); 1660 return 0; 1661 } 1662 1663 /* Check that there is at least one register in the set. */ 1664 if (!mask) 1665 { 1666 as_bad ("reglist must include at least one register"); 1667 return 0; 1668 } 1669 1670 /* OK, reglist passed validation. */ 1671 nios2_reglist_mask = mask; 1672 nios2_reglist_dir = dir; 1673 return mask; 1674 } 1675 1676 /* This function parses the base register and options used by the ldwm/stwm 1677 instructions. Returns the base register and sets the option arguments 1678 accordingly. On failure, returns NULL. */ 1679 static struct nios2_reg * 1680 nios2_parse_base_register (char *str, int *direction, int *writeback, int *ret) 1681 { 1682 char *regname; 1683 struct nios2_reg *reg; 1684 1685 *direction = 0; 1686 *writeback = 0; 1687 *ret = 0; 1688 1689 /* Check for --. */ 1690 if (strncmp (str, "--", 2) == 0) 1691 { 1692 str += 2; 1693 *direction -= 1; 1694 } 1695 1696 /* Extract the base register. */ 1697 if (*str != '(') 1698 { 1699 as_bad ("expected '(' before base register"); 1700 return NULL; 1701 } 1702 str++; 1703 regname = str; 1704 str = strchr (str, ')'); 1705 if (!str) 1706 { 1707 as_bad ("expected ')' after base register"); 1708 return NULL; 1709 } 1710 *str = '\0'; 1711 str++; 1712 reg = nios2_parse_reg (regname, REG_NORMAL); 1713 if (reg == NULL) 1714 return NULL; 1715 1716 /* Check for ++. */ 1717 if (strncmp (str, "++", 2) == 0) 1718 { 1719 str += 2; 1720 *direction += 1; 1721 } 1722 1723 /* Ensure that either -- or ++ is specified, but not both. */ 1724 if (*direction == 0) 1725 { 1726 as_bad ("invalid base register syntax"); 1727 return NULL;; 1728 } 1729 1730 /* Check for options. The tokenizer has replaced commas with spaces. */ 1731 while (*str) 1732 { 1733 while (*str == ' ') 1734 str++; 1735 if (strncmp (str, "writeback", 9) == 0) 1736 { 1737 *writeback = 1; 1738 str += 9; 1739 } 1740 else if (strncmp (str, "ret", 3) == 0) 1741 { 1742 *ret = 1; 1743 str += 3; 1744 } 1745 else if (*str) 1746 { 1747 as_bad ("invalid option syntax"); 1748 return NULL; 1749 } 1750 } 1751 1752 return reg; 1753 } 1754 1755 1756 /* The various nios2_assemble_* functions call this 1757 function to generate an expression from a string representing an expression. 1758 It then tries to evaluate the expression, and if it can, returns its value. 1759 If not, it creates a new nios2_insn_relocS and stores the expression and 1760 reloc_type for future use. */ 1761 static unsigned long 1762 nios2_assemble_expression (const char *exprstr, 1763 nios2_insn_infoS *insn, 1764 bfd_reloc_code_real_type orig_reloc_type, 1765 unsigned int pcrel) 1766 { 1767 nios2_insn_relocS *reloc; 1768 char *saved_line_ptr; 1769 unsigned long value = 0; 1770 int i; 1771 bfd_reloc_code_real_type reloc_type = orig_reloc_type; 1772 1773 gas_assert (exprstr != NULL); 1774 gas_assert (insn != NULL); 1775 1776 /* Check for relocation operators. 1777 Change the relocation type and advance the ptr to the start of 1778 the expression proper. */ 1779 for (i = 0; i < nios2_num_special_relocs; i++) 1780 if (strstr (exprstr, nios2_special_reloc[i].string) != NULL) 1781 { 1782 reloc_type = nios2_special_reloc[i].reloc_type; 1783 exprstr += strlen (nios2_special_reloc[i].string) + 1; 1784 1785 /* %lo and %hiadj have different meanings for PC-relative 1786 expressions. */ 1787 if (pcrel) 1788 { 1789 if (reloc_type == BFD_RELOC_NIOS2_LO16) 1790 reloc_type = BFD_RELOC_NIOS2_PCREL_LO; 1791 if (reloc_type == BFD_RELOC_NIOS2_HIADJ16) 1792 reloc_type = BFD_RELOC_NIOS2_PCREL_HA; 1793 } 1794 1795 break; 1796 } 1797 1798 /* No relocation allowed; we must have a constant expression. */ 1799 if (orig_reloc_type == BFD_RELOC_NONE) 1800 { 1801 expressionS exp; 1802 1803 /* Parse the expression string. */ 1804 saved_line_ptr = input_line_pointer; 1805 input_line_pointer = (char *) exprstr; 1806 expression (&exp); 1807 input_line_pointer = saved_line_ptr; 1808 1809 /* If we don't have a constant, give an error. */ 1810 if (reloc_type != orig_reloc_type || exp.X_op != O_constant) 1811 as_bad (_("expression must be constant")); 1812 else 1813 value = exp.X_add_number; 1814 return (unsigned long) value; 1815 } 1816 1817 /* We potentially have a relocation. */ 1818 reloc = nios2_insn_reloc_new (reloc_type, pcrel); 1819 reloc->reloc_next = insn->insn_reloc; 1820 insn->insn_reloc = reloc; 1821 1822 /* Parse the expression string. */ 1823 saved_line_ptr = input_line_pointer; 1824 input_line_pointer = (char *) exprstr; 1825 expression (&reloc->reloc_expression); 1826 input_line_pointer = saved_line_ptr; 1827 1828 /* This is redundant as the fixup will put this into 1829 the instruction, but it is included here so that 1830 self-test mode (-r) works. */ 1831 if (nios2_mode == NIOS2_MODE_TEST 1832 && reloc->reloc_expression.X_op == O_constant) 1833 value = reloc->reloc_expression.X_add_number; 1834 1835 return (unsigned long) value; 1836 } 1837 1838 /* Encode a 3-bit register number, giving an error if this is not possible. */ 1839 static unsigned int 1840 nios2_assemble_reg3 (const char *token) 1841 { 1842 struct nios2_reg *reg = nios2_parse_reg (token, REG_3BIT); 1843 int j; 1844 1845 if (reg == NULL) 1846 return 0; 1847 1848 for (j = 0; j < nios2_num_r2_reg3_mappings; j++) 1849 if (nios2_r2_reg3_mappings[j] == reg->index) 1850 return j; 1851 1852 /* Should never get here if we passed validation. */ 1853 as_bad (_("invalid register %s"), token); 1854 return 0; 1855 } 1856 1857 /* Argument assemble functions. */ 1858 1859 1860 /* Control register index. */ 1861 static void 1862 nios2_assemble_arg_c (const char *token, nios2_insn_infoS *insn) 1863 { 1864 struct nios2_reg *reg = nios2_parse_reg (token, REG_CONTROL); 1865 const struct nios2_opcode *op = insn->insn_nios2_opcode; 1866 1867 if (reg == NULL) 1868 return; 1869 1870 switch (op->format) 1871 { 1872 case iw_r_type: 1873 insn->insn_code |= SET_IW_R_IMM5 (reg->index); 1874 break; 1875 case iw_F3X6L5_type: 1876 insn->insn_code |= SET_IW_F3X6L5_IMM5 (reg->index); 1877 break; 1878 default: 1879 bad_opcode (op); 1880 } 1881 } 1882 1883 /* Destination register. */ 1884 static void 1885 nios2_assemble_arg_d (const char *token, nios2_insn_infoS *insn) 1886 { 1887 const struct nios2_opcode *op = insn->insn_nios2_opcode; 1888 unsigned long regtype = REG_NORMAL; 1889 struct nios2_reg *reg; 1890 1891 if (op->format == iw_custom_type || op->format == iw_F3X8_type) 1892 regtype |= REG_COPROCESSOR; 1893 reg = nios2_parse_reg (token, regtype); 1894 if (reg == NULL) 1895 return; 1896 1897 switch (op->format) 1898 { 1899 case iw_r_type: 1900 insn->insn_code |= SET_IW_R_C (reg->index); 1901 break; 1902 case iw_custom_type: 1903 insn->insn_code |= SET_IW_CUSTOM_C (reg->index); 1904 if (reg->regtype & REG_COPROCESSOR) 1905 insn->insn_code |= SET_IW_CUSTOM_READC (0); 1906 else 1907 insn->insn_code |= SET_IW_CUSTOM_READC (1); 1908 break; 1909 case iw_F3X6L5_type: 1910 case iw_F3X6_type: 1911 insn->insn_code |= SET_IW_F3X6L5_C (reg->index); 1912 break; 1913 case iw_F3X8_type: 1914 insn->insn_code |= SET_IW_F3X8_C (reg->index); 1915 if (reg->regtype & REG_COPROCESSOR) 1916 insn->insn_code |= SET_IW_F3X8_READC (0); 1917 else 1918 insn->insn_code |= SET_IW_F3X8_READC (1); 1919 break; 1920 case iw_F2_type: 1921 insn->insn_code |= SET_IW_F2_B (reg->index); 1922 break; 1923 default: 1924 bad_opcode (op); 1925 } 1926 } 1927 1928 /* Source register 1. */ 1929 static void 1930 nios2_assemble_arg_s (const char *token, nios2_insn_infoS *insn) 1931 { 1932 const struct nios2_opcode *op = insn->insn_nios2_opcode; 1933 unsigned long regtype = REG_NORMAL; 1934 struct nios2_reg *reg; 1935 1936 if (op->format == iw_custom_type || op->format == iw_F3X8_type) 1937 regtype |= REG_COPROCESSOR; 1938 reg = nios2_parse_reg (token, regtype); 1939 if (reg == NULL) 1940 return; 1941 1942 switch (op->format) 1943 { 1944 case iw_r_type: 1945 if (op->match == MATCH_R1_JMP && reg->index == 31) 1946 as_bad (_("r31 cannot be used with jmp; use ret instead")); 1947 insn->insn_code |= SET_IW_R_A (reg->index); 1948 break; 1949 case iw_i_type: 1950 insn->insn_code |= SET_IW_I_A (reg->index); 1951 break; 1952 case iw_custom_type: 1953 insn->insn_code |= SET_IW_CUSTOM_A (reg->index); 1954 if (reg->regtype & REG_COPROCESSOR) 1955 insn->insn_code |= SET_IW_CUSTOM_READA (0); 1956 else 1957 insn->insn_code |= SET_IW_CUSTOM_READA (1); 1958 break; 1959 case iw_F2I16_type: 1960 insn->insn_code |= SET_IW_F2I16_A (reg->index); 1961 break; 1962 case iw_F2X4I12_type: 1963 insn->insn_code |= SET_IW_F2X4I12_A (reg->index); 1964 break; 1965 case iw_F1X4I12_type: 1966 insn->insn_code |= SET_IW_F1X4I12_A (reg->index); 1967 break; 1968 case iw_F1X4L17_type: 1969 insn->insn_code |= SET_IW_F1X4L17_A (reg->index); 1970 break; 1971 case iw_F3X6L5_type: 1972 case iw_F3X6_type: 1973 if (op->match == MATCH_R2_JMP && reg->index == 31) 1974 as_bad (_("r31 cannot be used with jmp; use ret instead")); 1975 insn->insn_code |= SET_IW_F3X6L5_A (reg->index); 1976 break; 1977 case iw_F2X6L10_type: 1978 insn->insn_code |= SET_IW_F2X6L10_A (reg->index); 1979 break; 1980 case iw_F3X8_type: 1981 insn->insn_code |= SET_IW_F3X8_A (reg->index); 1982 if (reg->regtype & REG_COPROCESSOR) 1983 insn->insn_code |= SET_IW_F3X8_READA (0); 1984 else 1985 insn->insn_code |= SET_IW_F3X8_READA (1); 1986 break; 1987 case iw_F1X1_type: 1988 if (op->match == MATCH_R2_JMPR_N && reg->index == 31) 1989 as_bad (_("r31 cannot be used with jmpr.n; use ret.n instead")); 1990 insn->insn_code |= SET_IW_F1X1_A (reg->index); 1991 break; 1992 case iw_F1I5_type: 1993 /* Implicit stack pointer reference. */ 1994 if (reg->index != 27) 1995 as_bad (_("invalid register %s"), token); 1996 break; 1997 case iw_F2_type: 1998 insn->insn_code |= SET_IW_F2_A (reg->index); 1999 break; 2000 default: 2001 bad_opcode (op); 2002 } 2003 } 2004 2005 /* Source register 2. */ 2006 static void 2007 nios2_assemble_arg_t (const char *token, nios2_insn_infoS *insn) 2008 { 2009 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2010 unsigned long regtype = REG_NORMAL; 2011 struct nios2_reg *reg; 2012 2013 if (op->format == iw_custom_type || op->format == iw_F3X8_type) 2014 regtype |= REG_COPROCESSOR; 2015 reg = nios2_parse_reg (token, regtype); 2016 if (reg == NULL) 2017 return; 2018 2019 switch (op->format) 2020 { 2021 case iw_r_type: 2022 insn->insn_code |= SET_IW_R_B (reg->index); 2023 break; 2024 case iw_i_type: 2025 insn->insn_code |= SET_IW_I_B (reg->index); 2026 break; 2027 case iw_custom_type: 2028 insn->insn_code |= SET_IW_CUSTOM_B (reg->index); 2029 if (reg->regtype & REG_COPROCESSOR) 2030 insn->insn_code |= SET_IW_CUSTOM_READB (0); 2031 else 2032 insn->insn_code |= SET_IW_CUSTOM_READB (1); 2033 break; 2034 case iw_F2I16_type: 2035 insn->insn_code |= SET_IW_F2I16_B (reg->index); 2036 break; 2037 case iw_F2X4I12_type: 2038 insn->insn_code |= SET_IW_F2X4I12_B (reg->index); 2039 break; 2040 case iw_F3X6L5_type: 2041 case iw_F3X6_type: 2042 insn->insn_code |= SET_IW_F3X6L5_B (reg->index); 2043 break; 2044 case iw_F2X6L10_type: 2045 insn->insn_code |= SET_IW_F2X6L10_B (reg->index); 2046 break; 2047 case iw_F3X8_type: 2048 insn->insn_code |= SET_IW_F3X8_B (reg->index); 2049 if (reg->regtype & REG_COPROCESSOR) 2050 insn->insn_code |= SET_IW_F3X8_READB (0); 2051 else 2052 insn->insn_code |= SET_IW_F3X8_READB (1); 2053 break; 2054 case iw_F1I5_type: 2055 insn->insn_code |= SET_IW_F1I5_B (reg->index); 2056 break; 2057 case iw_F2_type: 2058 insn->insn_code |= SET_IW_F2_B (reg->index); 2059 break; 2060 case iw_T1X1I6_type: 2061 /* Implicit zero register reference. */ 2062 if (reg->index != 0) 2063 as_bad (_("invalid register %s"), token); 2064 break; 2065 2066 default: 2067 bad_opcode (op); 2068 } 2069 } 2070 2071 /* Destination register w/3-bit encoding. */ 2072 static void 2073 nios2_assemble_arg_D (const char *token, nios2_insn_infoS *insn) 2074 { 2075 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2076 int reg = nios2_assemble_reg3 (token); 2077 2078 switch (op->format) 2079 { 2080 case iw_T1I7_type: 2081 insn->insn_code |= SET_IW_T1I7_A3 (reg); 2082 break; 2083 case iw_T2X1L3_type: 2084 insn->insn_code |= SET_IW_T2X1L3_B3 (reg); 2085 break; 2086 case iw_T2X1I3_type: 2087 insn->insn_code |= SET_IW_T2X1I3_B3 (reg); 2088 break; 2089 case iw_T3X1_type: 2090 insn->insn_code |= SET_IW_T3X1_C3 (reg); 2091 break; 2092 case iw_T2X3_type: 2093 /* Some instructions using this encoding take 3 register arguments, 2094 requiring the destination register to be the same as the first 2095 source register. */ 2096 if (op->num_args == 3) 2097 insn->insn_code |= SET_IW_T2X3_A3 (reg); 2098 else 2099 insn->insn_code |= SET_IW_T2X3_B3 (reg); 2100 break; 2101 default: 2102 bad_opcode (op); 2103 } 2104 } 2105 2106 /* Source register w/3-bit encoding. */ 2107 static void 2108 nios2_assemble_arg_S (const char *token, nios2_insn_infoS *insn) 2109 { 2110 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2111 int reg = nios2_assemble_reg3 (token); 2112 2113 switch (op->format) 2114 { 2115 case iw_T1I7_type: 2116 insn->insn_code |= SET_IW_T1I7_A3 (reg); 2117 break; 2118 case iw_T2I4_type: 2119 insn->insn_code |= SET_IW_T2I4_A3 (reg); 2120 break; 2121 case iw_T2X1L3_type: 2122 insn->insn_code |= SET_IW_T2X1L3_A3 (reg); 2123 break; 2124 case iw_T2X1I3_type: 2125 insn->insn_code |= SET_IW_T2X1I3_A3 (reg); 2126 break; 2127 case iw_T3X1_type: 2128 insn->insn_code |= SET_IW_T3X1_A3 (reg); 2129 break; 2130 case iw_T2X3_type: 2131 /* Some instructions using this encoding take 3 register arguments, 2132 requiring the destination register to be the same as the first 2133 source register. */ 2134 if (op->num_args == 3) 2135 { 2136 int dreg = GET_IW_T2X3_A3 (insn->insn_code); 2137 if (dreg != reg) 2138 as_bad ("source and destination registers must be the same"); 2139 } 2140 else 2141 insn->insn_code |= SET_IW_T2X3_A3 (reg); 2142 break; 2143 case iw_T1X1I6_type: 2144 insn->insn_code |= SET_IW_T1X1I6_A3 (reg); 2145 break; 2146 default: 2147 bad_opcode (op); 2148 } 2149 } 2150 2151 /* Source register 2 w/3-bit encoding. */ 2152 static void 2153 nios2_assemble_arg_T (const char *token, nios2_insn_infoS *insn) 2154 { 2155 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2156 int reg = nios2_assemble_reg3 (token); 2157 2158 switch (op->format) 2159 { 2160 case iw_T2I4_type: 2161 insn->insn_code |= SET_IW_T2I4_B3 (reg); 2162 break; 2163 case iw_T3X1_type: 2164 insn->insn_code |= SET_IW_T3X1_B3 (reg); 2165 break; 2166 case iw_T2X3_type: 2167 insn->insn_code |= SET_IW_T2X3_B3 (reg); 2168 break; 2169 default: 2170 bad_opcode (op); 2171 } 2172 } 2173 2174 /* 16-bit signed immediate. */ 2175 static void 2176 nios2_assemble_arg_i (const char *token, nios2_insn_infoS *insn) 2177 { 2178 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2179 unsigned int val; 2180 2181 switch (op->format) 2182 { 2183 case iw_i_type: 2184 val = nios2_assemble_expression (token, insn, 2185 BFD_RELOC_NIOS2_S16, 0); 2186 insn->constant_bits |= SET_IW_I_IMM16 (val); 2187 break; 2188 case iw_F2I16_type: 2189 val = nios2_assemble_expression (token, insn, 2190 BFD_RELOC_NIOS2_S16, 0); 2191 insn->constant_bits |= SET_IW_F2I16_IMM16 (val); 2192 break; 2193 default: 2194 bad_opcode (op); 2195 } 2196 } 2197 2198 /* 12-bit signed immediate. */ 2199 static void 2200 nios2_assemble_arg_I (const char *token, nios2_insn_infoS *insn) 2201 { 2202 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2203 unsigned int val; 2204 2205 switch (op->format) 2206 { 2207 case iw_F2X4I12_type: 2208 val = nios2_assemble_expression (token, insn, 2209 BFD_RELOC_NIOS2_R2_S12, 0); 2210 insn->constant_bits |= SET_IW_F2X4I12_IMM12 (val); 2211 break; 2212 case iw_F1X4I12_type: 2213 val = nios2_assemble_expression (token, insn, 2214 BFD_RELOC_NIOS2_R2_S12, 0); 2215 insn->constant_bits |= SET_IW_F2X4I12_IMM12 (val); 2216 break; 2217 default: 2218 bad_opcode (op); 2219 } 2220 } 2221 2222 /* 16-bit unsigned immediate. */ 2223 static void 2224 nios2_assemble_arg_u (const char *token, nios2_insn_infoS *insn) 2225 { 2226 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2227 unsigned int val; 2228 2229 switch (op->format) 2230 { 2231 case iw_i_type: 2232 val = nios2_assemble_expression (token, insn, 2233 BFD_RELOC_NIOS2_U16, 0); 2234 insn->constant_bits |= SET_IW_I_IMM16 (val); 2235 break; 2236 case iw_F2I16_type: 2237 val = nios2_assemble_expression (token, insn, 2238 BFD_RELOC_NIOS2_U16, 0); 2239 insn->constant_bits |= SET_IW_F2I16_IMM16 (val); 2240 break; 2241 default: 2242 bad_opcode (op); 2243 } 2244 } 2245 2246 /* 7-bit unsigned immediate with 2-bit shift. */ 2247 static void 2248 nios2_assemble_arg_U (const char *token, nios2_insn_infoS *insn) 2249 { 2250 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2251 unsigned int val; 2252 2253 switch (op->format) 2254 { 2255 case iw_T1I7_type: 2256 val = nios2_assemble_expression (token, insn, 2257 BFD_RELOC_NIOS2_R2_T1I7_2, 0); 2258 insn->constant_bits |= SET_IW_T1I7_IMM7 (val >> 2); 2259 break; 2260 case iw_X1I7_type: 2261 val = nios2_assemble_expression (token, insn, 2262 BFD_RELOC_NIOS2_R2_X1I7_2, 0); 2263 insn->constant_bits |= SET_IW_X1I7_IMM7 (val >> 2); 2264 break; 2265 default: 2266 bad_opcode (op); 2267 } 2268 } 2269 2270 /* 5-bit unsigned immediate with 2-bit shift. */ 2271 static void 2272 nios2_assemble_arg_V (const char *token, nios2_insn_infoS *insn) 2273 { 2274 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2275 unsigned int val; 2276 2277 switch (op->format) 2278 { 2279 case iw_F1I5_type: 2280 val = nios2_assemble_expression (token, insn, 2281 BFD_RELOC_NIOS2_R2_F1I5_2, 0); 2282 insn->constant_bits |= SET_IW_F1I5_IMM5 (val >> 2); 2283 break; 2284 default: 2285 bad_opcode (op); 2286 } 2287 } 2288 2289 /* 4-bit unsigned immediate with 2-bit shift. */ 2290 static void 2291 nios2_assemble_arg_W (const char *token, nios2_insn_infoS *insn) 2292 { 2293 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2294 unsigned int val; 2295 2296 switch (op->format) 2297 { 2298 case iw_T2I4_type: 2299 val = nios2_assemble_expression (token, insn, 2300 BFD_RELOC_NIOS2_R2_T2I4_2, 0); 2301 insn->constant_bits |= SET_IW_T2I4_IMM4 (val >> 2); 2302 break; 2303 case iw_L5I4X1_type: 2304 /* This argument is optional for push.n/pop.n, and defaults to 2305 zero if unspecified. */ 2306 if (token == NULL) 2307 return; 2308 2309 val = nios2_assemble_expression (token, insn, 2310 BFD_RELOC_NIOS2_R2_L5I4X1, 0); 2311 insn->constant_bits |= SET_IW_L5I4X1_IMM4 (val >> 2); 2312 break; 2313 default: 2314 bad_opcode (op); 2315 } 2316 } 2317 2318 /* 4-bit unsigned immediate with 1-bit shift. */ 2319 static void 2320 nios2_assemble_arg_X (const char *token, nios2_insn_infoS *insn) 2321 { 2322 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2323 unsigned int val; 2324 2325 switch (op->format) 2326 { 2327 case iw_T2I4_type: 2328 val = nios2_assemble_expression (token, insn, 2329 BFD_RELOC_NIOS2_R2_T2I4_1, 0); 2330 insn->constant_bits |= SET_IW_T2I4_IMM4 (val >> 1); 2331 break; 2332 default: 2333 bad_opcode (op); 2334 } 2335 } 2336 2337 /* 4-bit unsigned immediate without shift. */ 2338 static void 2339 nios2_assemble_arg_Y (const char *token, nios2_insn_infoS *insn) 2340 { 2341 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2342 unsigned int val; 2343 2344 switch (op->format) 2345 { 2346 case iw_T2I4_type: 2347 val = nios2_assemble_expression (token, insn, 2348 BFD_RELOC_NIOS2_R2_T2I4, 0); 2349 insn->constant_bits |= SET_IW_T2I4_IMM4 (val); 2350 break; 2351 default: 2352 bad_opcode (op); 2353 } 2354 } 2355 2356 2357 /* 16-bit signed immediate address offset. */ 2358 static void 2359 nios2_assemble_arg_o (const char *token, nios2_insn_infoS *insn) 2360 { 2361 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2362 unsigned int val; 2363 2364 switch (op->format) 2365 { 2366 case iw_i_type: 2367 val = nios2_assemble_expression (token, insn, 2368 BFD_RELOC_16_PCREL, 1); 2369 insn->constant_bits |= SET_IW_I_IMM16 (val); 2370 break; 2371 case iw_F2I16_type: 2372 val = nios2_assemble_expression (token, insn, 2373 BFD_RELOC_16_PCREL, 1); 2374 insn->constant_bits |= SET_IW_F2I16_IMM16 (val); 2375 break; 2376 default: 2377 bad_opcode (op); 2378 } 2379 } 2380 2381 /* 10-bit signed address offset with 1-bit shift. */ 2382 static void 2383 nios2_assemble_arg_O (const char *token, nios2_insn_infoS *insn) 2384 { 2385 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2386 unsigned int val; 2387 2388 switch (op->format) 2389 { 2390 case iw_I10_type: 2391 val = nios2_assemble_expression (token, insn, 2392 BFD_RELOC_NIOS2_R2_I10_1_PCREL, 1); 2393 insn->constant_bits |= SET_IW_I10_IMM10 (val >> 1); 2394 break; 2395 default: 2396 bad_opcode (op); 2397 } 2398 } 2399 2400 /* 7-bit signed address offset with 1-bit shift. */ 2401 static void 2402 nios2_assemble_arg_P (const char *token, nios2_insn_infoS *insn) 2403 { 2404 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2405 unsigned int val; 2406 2407 switch (op->format) 2408 { 2409 case iw_T1I7_type: 2410 val = nios2_assemble_expression (token, insn, 2411 BFD_RELOC_NIOS2_R2_T1I7_1_PCREL, 1); 2412 insn->constant_bits |= SET_IW_T1I7_IMM7 (val >> 1); 2413 break; 2414 default: 2415 bad_opcode (op); 2416 } 2417 } 2418 2419 /* 5-bit unsigned immediate. */ 2420 static void 2421 nios2_assemble_arg_j (const char *token, nios2_insn_infoS *insn) 2422 { 2423 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2424 unsigned int val; 2425 2426 switch (op->format) 2427 { 2428 case iw_r_type: 2429 val = nios2_assemble_expression (token, insn, 2430 BFD_RELOC_NIOS2_IMM5, 0); 2431 insn->constant_bits |= SET_IW_R_IMM5 (val); 2432 break; 2433 case iw_F3X6L5_type: 2434 if (op->match == MATCH_R2_ENI) 2435 /* Value must be constant 0 or 1. */ 2436 { 2437 val = nios2_assemble_expression (token, insn, BFD_RELOC_NONE, 0); 2438 if (val != 0 && val != 1) 2439 as_bad ("invalid eni argument %u", val); 2440 insn->insn_code |= SET_IW_F3X6L5_IMM5 (val); 2441 } 2442 else 2443 { 2444 val = nios2_assemble_expression (token, insn, 2445 BFD_RELOC_NIOS2_IMM5, 0); 2446 insn->constant_bits |= SET_IW_F3X6L5_IMM5 (val); 2447 } 2448 break; 2449 case iw_F2X6L10_type: 2450 /* Only constant expression without relocation permitted for 2451 bit position. */ 2452 val = nios2_assemble_expression (token, insn, BFD_RELOC_NONE, 0); 2453 if (val > 31) 2454 as_bad ("invalid bit position %u", val); 2455 insn->insn_code |= SET_IW_F2X6L10_MSB (val); 2456 break; 2457 case iw_X2L5_type: 2458 val = nios2_assemble_expression (token, insn, 2459 BFD_RELOC_NIOS2_R2_X2L5, 0); 2460 insn->constant_bits |= SET_IW_X2L5_IMM5 (val); 2461 break; 2462 default: 2463 bad_opcode (op); 2464 } 2465 } 2466 2467 /* Second 5-bit unsigned immediate field. */ 2468 static void 2469 nios2_assemble_arg_k (const char *token, nios2_insn_infoS *insn) 2470 { 2471 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2472 unsigned int val; 2473 2474 switch (op->format) 2475 { 2476 case iw_F2X6L10_type: 2477 /* Only constant expression without relocation permitted for 2478 bit position. */ 2479 val = nios2_assemble_expression (token, insn, 2480 BFD_RELOC_NONE, 0); 2481 if (val > 31) 2482 as_bad ("invalid bit position %u", val); 2483 else if (GET_IW_F2X6L10_MSB (insn->insn_code) < val) 2484 as_bad ("MSB must be greater than or equal to LSB"); 2485 insn->insn_code |= SET_IW_F2X6L10_LSB (val); 2486 break; 2487 default: 2488 bad_opcode (op); 2489 } 2490 } 2491 2492 /* 8-bit unsigned immediate. */ 2493 static void 2494 nios2_assemble_arg_l (const char *token, nios2_insn_infoS *insn) 2495 { 2496 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2497 unsigned int val; 2498 2499 switch (op->format) 2500 { 2501 case iw_custom_type: 2502 val = nios2_assemble_expression (token, insn, 2503 BFD_RELOC_NIOS2_IMM8, 0); 2504 insn->constant_bits |= SET_IW_CUSTOM_N (val); 2505 break; 2506 case iw_F3X8_type: 2507 val = nios2_assemble_expression (token, insn, 2508 BFD_RELOC_NIOS2_IMM8, 0); 2509 insn->constant_bits |= SET_IW_F3X8_N (val); 2510 break; 2511 default: 2512 bad_opcode (op); 2513 } 2514 } 2515 2516 /* 26-bit unsigned immediate. */ 2517 static void 2518 nios2_assemble_arg_m (const char *token, nios2_insn_infoS *insn) 2519 { 2520 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2521 unsigned int val; 2522 2523 switch (op->format) 2524 { 2525 case iw_j_type: 2526 val = nios2_assemble_expression (token, insn, 2527 (nios2_as_options.noat 2528 ? BFD_RELOC_NIOS2_CALL26_NOAT 2529 : BFD_RELOC_NIOS2_CALL26), 2530 0); 2531 insn->constant_bits |= SET_IW_J_IMM26 (val); 2532 break; 2533 case iw_L26_type: 2534 val = nios2_assemble_expression (token, insn, 2535 (nios2_as_options.noat 2536 ? BFD_RELOC_NIOS2_CALL26_NOAT 2537 : BFD_RELOC_NIOS2_CALL26), 2538 0); 2539 insn->constant_bits |= SET_IW_L26_IMM26 (val); 2540 break; 2541 default: 2542 bad_opcode (op); 2543 } 2544 } 2545 2546 /* 6-bit unsigned immediate with no shifting. */ 2547 static void 2548 nios2_assemble_arg_M (const char *token, nios2_insn_infoS *insn) 2549 { 2550 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2551 unsigned int val; 2552 2553 switch (op->format) 2554 { 2555 case iw_T1X1I6_type: 2556 val = nios2_assemble_expression (token, insn, 2557 BFD_RELOC_NIOS2_R2_T1X1I6, 0); 2558 insn->constant_bits |= SET_IW_T1X1I6_IMM6 (val); 2559 break; 2560 default: 2561 bad_opcode (op); 2562 } 2563 } 2564 2565 /* 6-bit unsigned immediate with 2-bit shift. */ 2566 static void 2567 nios2_assemble_arg_N (const char *token, nios2_insn_infoS *insn) 2568 { 2569 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2570 unsigned int val; 2571 2572 switch (op->format) 2573 { 2574 case iw_T1X1I6_type: 2575 val = nios2_assemble_expression (token, insn, 2576 BFD_RELOC_NIOS2_R2_T1X1I6_2, 0); 2577 insn->constant_bits |= SET_IW_T1X1I6_IMM6 (val >> 2); 2578 break; 2579 default: 2580 bad_opcode (op); 2581 } 2582 } 2583 2584 2585 /* Encoded enumeration for addi.n/subi.n. */ 2586 static void 2587 nios2_assemble_arg_e (const char *token, nios2_insn_infoS *insn) 2588 { 2589 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2590 unsigned int val; 2591 int i; 2592 2593 switch (op->format) 2594 { 2595 case iw_T2X1I3_type: 2596 val = nios2_assemble_expression (token, insn, BFD_RELOC_NONE, 0); 2597 for (i = 0; i < nios2_num_r2_asi_n_mappings; i++) 2598 if (val == nios2_r2_asi_n_mappings[i]) 2599 break; 2600 if (i == nios2_num_r2_asi_n_mappings) 2601 { 2602 as_bad (_("Invalid constant operand %s"), token); 2603 return; 2604 } 2605 insn->insn_code |= SET_IW_T2X1I3_IMM3 ((unsigned)i); 2606 break; 2607 default: 2608 bad_opcode (op); 2609 } 2610 } 2611 2612 /* Encoded enumeration for slli.n/srli.n. */ 2613 static void 2614 nios2_assemble_arg_f (const char *token, nios2_insn_infoS *insn) 2615 { 2616 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2617 unsigned int val; 2618 int i; 2619 2620 switch (op->format) 2621 { 2622 case iw_T2X1L3_type: 2623 val = nios2_assemble_expression (token, insn, BFD_RELOC_NONE, 0); 2624 for (i = 0; i < nios2_num_r2_shi_n_mappings; i++) 2625 if (val == nios2_r2_shi_n_mappings[i]) 2626 break; 2627 if (i == nios2_num_r2_shi_n_mappings) 2628 { 2629 as_bad (_("Invalid constant operand %s"), token); 2630 return; 2631 } 2632 insn->insn_code |= SET_IW_T2X1L3_SHAMT ((unsigned)i); 2633 break; 2634 default: 2635 bad_opcode (op); 2636 } 2637 } 2638 2639 /* Encoded enumeration for andi.n. */ 2640 static void 2641 nios2_assemble_arg_g (const char *token, nios2_insn_infoS *insn) 2642 { 2643 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2644 unsigned int val; 2645 int i; 2646 2647 switch (op->format) 2648 { 2649 case iw_T2I4_type: 2650 val = nios2_assemble_expression (token, insn, BFD_RELOC_NONE, 0); 2651 for (i = 0; i < nios2_num_r2_andi_n_mappings; i++) 2652 if (val == nios2_r2_andi_n_mappings[i]) 2653 break; 2654 if (i == nios2_num_r2_andi_n_mappings) 2655 { 2656 as_bad (_("Invalid constant operand %s"), token); 2657 return; 2658 } 2659 insn->insn_code |= SET_IW_T2I4_IMM4 ((unsigned)i); 2660 break; 2661 default: 2662 bad_opcode (op); 2663 } 2664 } 2665 2666 /* Encoded enumeration for movi.n. */ 2667 static void 2668 nios2_assemble_arg_h (const char *token, nios2_insn_infoS *insn) 2669 { 2670 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2671 unsigned int val; 2672 int i; 2673 2674 switch (op->format) 2675 { 2676 case iw_T1I7_type: 2677 val = nios2_assemble_expression (token, insn, BFD_RELOC_NONE, 0); 2678 i = (signed) val; 2679 if ((signed) i == -1) 2680 val = 127; 2681 else if (i == -2) 2682 val = 126; 2683 else if (i == 0xff) 2684 val = 125; 2685 else if (i < 0 || i > 125) 2686 { 2687 as_bad (_("Invalid constant operand %s"), token); 2688 return; 2689 } 2690 insn->insn_code |= SET_IW_T1I7_IMM7 (val); 2691 break; 2692 default: 2693 bad_opcode (op); 2694 } 2695 } 2696 2697 /* Encoded REGMASK for ldwm/stwm or push.n/pop.n. */ 2698 static void 2699 nios2_assemble_arg_R (const char *token, nios2_insn_infoS *insn) 2700 { 2701 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2702 unsigned long mask; 2703 char *buf = strdup (token); 2704 unsigned long reglist = nios2_parse_reglist (buf, op); 2705 free (buf); 2706 2707 if (reglist == 0) 2708 return; 2709 2710 switch (op->format) 2711 { 2712 case iw_F1X4L17_type: 2713 /* Encoding for ldwm/stwm. */ 2714 if (reglist & 0x00003ffc) 2715 mask = reglist >> 2; 2716 else 2717 { 2718 insn->insn_code |= SET_IW_F1X4L17_RS (1); 2719 mask = (reglist & 0x00ffc000) >> 14; 2720 if (reglist & (1 << 28)) 2721 mask |= 1 << 10; 2722 if (reglist & (1 << 31)) 2723 mask |= 1 << 11; 2724 } 2725 insn->insn_code |= SET_IW_F1X4L17_REGMASK (mask); 2726 break; 2727 2728 case iw_L5I4X1_type: 2729 /* Encoding for push.n/pop.n. */ 2730 if (reglist & (1 << 28)) 2731 insn->insn_code |= SET_IW_L5I4X1_FP (1); 2732 mask = reglist & 0x00ff0000; 2733 if (mask) 2734 { 2735 int i; 2736 2737 for (i = 0; i < nios2_num_r2_reg_range_mappings; i++) 2738 if (nios2_r2_reg_range_mappings[i] == mask) 2739 break; 2740 if (i == nios2_num_r2_reg_range_mappings) 2741 { 2742 as_bad ("invalid reglist"); 2743 return; 2744 } 2745 insn->insn_code |= SET_IW_L5I4X1_REGRANGE (i); 2746 insn->insn_code |= SET_IW_L5I4X1_CS (1); 2747 } 2748 break; 2749 2750 default: 2751 bad_opcode (op); 2752 } 2753 } 2754 2755 /* Base register for ldwm/stwm. */ 2756 static void 2757 nios2_assemble_arg_B (const char *token, nios2_insn_infoS *insn) 2758 { 2759 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2760 int direction, writeback, ret; 2761 char *str = strdup (token); 2762 struct nios2_reg *reg 2763 = nios2_parse_base_register (str, &direction, &writeback, &ret); 2764 2765 free (str); 2766 if (!reg) 2767 return; 2768 2769 switch (op->format) 2770 { 2771 case iw_F1X4L17_type: 2772 /* For ldwm, check to see if the base register is already inside the 2773 register list. */ 2774 if (op->match == MATCH_R2_LDWM 2775 && (nios2_reglist_mask & (1 << reg->index))) 2776 { 2777 as_bad ("invalid base register; %s is inside the reglist", reg->name); 2778 return; 2779 } 2780 2781 /* For stwm, ret option is not allowed. */ 2782 if (op->match == MATCH_R2_STWM && ret) 2783 { 2784 as_bad ("invalid option syntax"); 2785 return; 2786 } 2787 2788 /* Check that the direction matches the ordering of the reglist. */ 2789 if (nios2_reglist_dir && direction != nios2_reglist_dir) 2790 { 2791 as_bad ("reglist order does not match increment/decrement mode"); 2792 return; 2793 } 2794 2795 insn->insn_code |= SET_IW_F1X4L17_A (reg->index); 2796 if (direction > 0) 2797 insn->insn_code |= SET_IW_F1X4L17_ID (1); 2798 if (writeback) 2799 insn->insn_code |= SET_IW_F1X4L17_WB (1); 2800 if (ret) 2801 insn->insn_code |= SET_IW_F1X4L17_PC (1); 2802 break; 2803 2804 default: 2805 bad_opcode (op); 2806 } 2807 } 2808 2809 static void 2810 nios2_assemble_args (nios2_insn_infoS *insn) 2811 { 2812 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2813 const char *argptr; 2814 unsigned int tokidx, ntok; 2815 2816 /* Make sure there are enough arguments. */ 2817 ntok = (op->pinfo & NIOS2_INSN_OPTARG) ? op->num_args - 1 : op->num_args; 2818 for (tokidx = 1; tokidx <= ntok; tokidx++) 2819 if (insn->insn_tokens[tokidx] == NULL) 2820 { 2821 as_bad ("missing argument"); 2822 return; 2823 } 2824 2825 for (argptr = op->args, tokidx = 1; 2826 *argptr && insn->insn_tokens[tokidx]; 2827 argptr++) 2828 switch (*argptr) 2829 { 2830 case ',': 2831 case '(': 2832 case ')': 2833 break; 2834 2835 case 'c': 2836 nios2_assemble_arg_c (insn->insn_tokens[tokidx++], insn); 2837 break; 2838 2839 case 'd': 2840 nios2_assemble_arg_d (insn->insn_tokens[tokidx++], insn); 2841 break; 2842 2843 case 's': 2844 nios2_assemble_arg_s (insn->insn_tokens[tokidx++], insn); 2845 break; 2846 2847 case 't': 2848 nios2_assemble_arg_t (insn->insn_tokens[tokidx++], insn); 2849 break; 2850 2851 case 'D': 2852 nios2_assemble_arg_D (insn->insn_tokens[tokidx++], insn); 2853 break; 2854 2855 case 'S': 2856 nios2_assemble_arg_S (insn->insn_tokens[tokidx++], insn); 2857 break; 2858 2859 case 'T': 2860 nios2_assemble_arg_T (insn->insn_tokens[tokidx++], insn); 2861 break; 2862 2863 case 'i': 2864 nios2_assemble_arg_i (insn->insn_tokens[tokidx++], insn); 2865 break; 2866 2867 case 'I': 2868 nios2_assemble_arg_I (insn->insn_tokens[tokidx++], insn); 2869 break; 2870 2871 case 'u': 2872 nios2_assemble_arg_u (insn->insn_tokens[tokidx++], insn); 2873 break; 2874 2875 case 'U': 2876 nios2_assemble_arg_U (insn->insn_tokens[tokidx++], insn); 2877 break; 2878 2879 case 'V': 2880 nios2_assemble_arg_V (insn->insn_tokens[tokidx++], insn); 2881 break; 2882 2883 case 'W': 2884 nios2_assemble_arg_W (insn->insn_tokens[tokidx++], insn); 2885 break; 2886 2887 case 'X': 2888 nios2_assemble_arg_X (insn->insn_tokens[tokidx++], insn); 2889 break; 2890 2891 case 'Y': 2892 nios2_assemble_arg_Y (insn->insn_tokens[tokidx++], insn); 2893 break; 2894 2895 case 'o': 2896 nios2_assemble_arg_o (insn->insn_tokens[tokidx++], insn); 2897 break; 2898 2899 case 'O': 2900 nios2_assemble_arg_O (insn->insn_tokens[tokidx++], insn); 2901 break; 2902 2903 case 'P': 2904 nios2_assemble_arg_P (insn->insn_tokens[tokidx++], insn); 2905 break; 2906 2907 case 'j': 2908 nios2_assemble_arg_j (insn->insn_tokens[tokidx++], insn); 2909 break; 2910 2911 case 'k': 2912 nios2_assemble_arg_k (insn->insn_tokens[tokidx++], insn); 2913 break; 2914 2915 case 'l': 2916 nios2_assemble_arg_l (insn->insn_tokens[tokidx++], insn); 2917 break; 2918 2919 case 'm': 2920 nios2_assemble_arg_m (insn->insn_tokens[tokidx++], insn); 2921 break; 2922 2923 case 'M': 2924 nios2_assemble_arg_M (insn->insn_tokens[tokidx++], insn); 2925 break; 2926 2927 case 'N': 2928 nios2_assemble_arg_N (insn->insn_tokens[tokidx++], insn); 2929 break; 2930 2931 case 'e': 2932 nios2_assemble_arg_e (insn->insn_tokens[tokidx++], insn); 2933 break; 2934 2935 case 'f': 2936 nios2_assemble_arg_f (insn->insn_tokens[tokidx++], insn); 2937 break; 2938 2939 case 'g': 2940 nios2_assemble_arg_g (insn->insn_tokens[tokidx++], insn); 2941 break; 2942 2943 case 'h': 2944 nios2_assemble_arg_h (insn->insn_tokens[tokidx++], insn); 2945 break; 2946 2947 case 'R': 2948 nios2_assemble_arg_R (insn->insn_tokens[tokidx++], insn); 2949 break; 2950 2951 case 'B': 2952 nios2_assemble_arg_B (insn->insn_tokens[tokidx++], insn); 2953 break; 2954 2955 default: 2956 bad_opcode (op); 2957 break; 2958 } 2959 2960 /* Perform argument checking. */ 2961 nios2_check_assembly (insn->insn_code | insn->constant_bits, 2962 insn->insn_tokens[tokidx]); 2963 } 2964 2965 2966 /* The function consume_arg takes a pointer into a string 2967 of instruction tokens (args) and a pointer into a string 2968 representing the expected sequence of tokens and separators. 2969 It checks whether the first argument in argstr is of the 2970 expected type, throwing an error if it is not, and returns 2971 the pointer argstr. */ 2972 static char * 2973 nios2_consume_arg (char *argstr, const char *parsestr) 2974 { 2975 char *temp; 2976 2977 switch (*parsestr) 2978 { 2979 case 'c': 2980 case 'd': 2981 case 's': 2982 case 't': 2983 case 'D': 2984 case 'S': 2985 case 'T': 2986 break; 2987 2988 case 'i': 2989 case 'u': 2990 if (*argstr == '%') 2991 { 2992 if (nios2_special_relocation_p (argstr)) 2993 { 2994 /* We zap the parentheses because we don't want them confused 2995 with separators. */ 2996 temp = strchr (argstr, '('); 2997 if (temp != NULL) 2998 *temp = ' '; 2999 temp = strchr (argstr, ')'); 3000 if (temp != NULL) 3001 *temp = ' '; 3002 } 3003 else 3004 as_bad (_("badly formed expression near %s"), argstr); 3005 } 3006 break; 3007 case 'm': 3008 case 'j': 3009 case 'k': 3010 case 'l': 3011 case 'I': 3012 case 'U': 3013 case 'V': 3014 case 'W': 3015 case 'X': 3016 case 'Y': 3017 case 'O': 3018 case 'P': 3019 case 'e': 3020 case 'f': 3021 case 'g': 3022 case 'h': 3023 case 'M': 3024 case 'N': 3025 3026 /* We can't have %hi, %lo or %hiadj here. */ 3027 if (*argstr == '%') 3028 as_bad (_("badly formed expression near %s"), argstr); 3029 break; 3030 3031 case 'R': 3032 /* Register list for ldwm/stwm or push.n/pop.n. Replace the commas 3033 in the list with spaces so we don't confuse them with separators. */ 3034 if (*argstr != '{') 3035 { 3036 as_bad ("missing '{' in register list"); 3037 break; 3038 } 3039 for (temp = argstr + 1; *temp; temp++) 3040 { 3041 if (*temp == '}') 3042 break; 3043 else if (*temp == ',') 3044 *temp = ' '; 3045 } 3046 if (!*temp) 3047 { 3048 as_bad ("missing '}' in register list"); 3049 break; 3050 } 3051 break; 3052 3053 case 'B': 3054 /* Base register and options for ldwm/stwm. This is the final argument 3055 and consumes the rest of the argument string; replace commas 3056 with spaces so that the token splitter doesn't think they are 3057 separate arguments. */ 3058 for (temp = argstr; *temp; temp++) 3059 if (*temp == ',') 3060 *temp = ' '; 3061 break; 3062 3063 case 'o': 3064 case 'E': 3065 break; 3066 default: 3067 BAD_CASE (*parsestr); 3068 break; 3069 } 3070 3071 return argstr; 3072 } 3073 3074 /* The function consume_separator takes a pointer into a string 3075 of instruction tokens (args) and a pointer into a string representing 3076 the expected sequence of tokens and separators. It finds the first 3077 instance of the character pointed to by separator in argstr, and 3078 returns a pointer to the next element of argstr, which is the 3079 following token in the sequence. */ 3080 static char * 3081 nios2_consume_separator (char *argstr, const char *separator) 3082 { 3083 char *p; 3084 3085 /* If we have a opcode reg, expr(reg) type instruction, and 3086 * we are separating the expr from the (reg), we find the last 3087 * (, just in case the expression has parentheses. */ 3088 3089 if (*separator == '(') 3090 p = strrchr (argstr, *separator); 3091 else 3092 p = strchr (argstr, *separator); 3093 3094 if (p != NULL) 3095 *p++ = 0; 3096 return p; 3097 } 3098 3099 /* The principal argument parsing function which takes a string argstr 3100 representing the instruction arguments for insn, and extracts the argument 3101 tokens matching parsestr into parsed_args. */ 3102 static void 3103 nios2_parse_args (nios2_insn_infoS *insn, char *argstr, 3104 const char *parsestr, char **parsed_args) 3105 { 3106 char *p; 3107 char *end = NULL; 3108 int i; 3109 p = argstr; 3110 i = 0; 3111 bfd_boolean terminate = FALSE; 3112 3113 /* This rest of this function is it too fragile and it mostly works, 3114 therefore special case this one. */ 3115 if (*parsestr == 0 && argstr != 0) 3116 { 3117 as_bad (_("too many arguments")); 3118 parsed_args[0] = NULL; 3119 return; 3120 } 3121 3122 while (p != NULL && !terminate && i < NIOS2_MAX_INSN_TOKENS) 3123 { 3124 parsed_args[i] = nios2_consume_arg (p, parsestr); 3125 ++parsestr; 3126 while (*parsestr == '(' || *parsestr == ')' || *parsestr == ',') 3127 { 3128 char *context = p; 3129 p = nios2_consume_separator (p, parsestr); 3130 /* Check for missing separators. */ 3131 if (!p && !(insn->insn_nios2_opcode->pinfo & NIOS2_INSN_OPTARG)) 3132 { 3133 as_bad (_("expecting %c near %s"), *parsestr, context); 3134 break; 3135 } 3136 ++parsestr; 3137 } 3138 3139 if (*parsestr == '\0') 3140 { 3141 /* Check that the argument string has no trailing arguments. */ 3142 end = strpbrk (p, ","); 3143 if (end != NULL) 3144 as_bad (_("too many arguments")); 3145 } 3146 3147 if (*parsestr == '\0' || (p != NULL && *p == '\0')) 3148 terminate = TRUE; 3149 ++i; 3150 } 3151 3152 parsed_args[i] = NULL; 3153 } 3154 3155 3156 3157 /** Support for pseudo-op parsing. These are macro-like opcodes that 3159 expand into real insns by suitable fiddling with the operands. */ 3160 3161 /* Append the string modifier to the string contained in the argument at 3162 parsed_args[ndx]. */ 3163 static void 3164 nios2_modify_arg (char **parsed_args, const char *modifier, 3165 int unused ATTRIBUTE_UNUSED, int ndx) 3166 { 3167 char *tmp = parsed_args[ndx]; 3168 3169 parsed_args[ndx] = concat (tmp, modifier, (char *) NULL); 3170 } 3171 3172 /* Modify parsed_args[ndx] by negating that argument. */ 3173 static void 3174 nios2_negate_arg (char **parsed_args, const char *modifier ATTRIBUTE_UNUSED, 3175 int unused ATTRIBUTE_UNUSED, int ndx) 3176 { 3177 char *tmp = parsed_args[ndx]; 3178 3179 parsed_args[ndx] = concat ("~(", tmp, ")+1", (char *) NULL); 3180 } 3181 3182 /* The function nios2_swap_args swaps the pointers at indices index_1 and 3183 index_2 in the array parsed_args[] - this is used for operand swapping 3184 for comparison operations. */ 3185 static void 3186 nios2_swap_args (char **parsed_args, const char *unused ATTRIBUTE_UNUSED, 3187 int index_1, int index_2) 3188 { 3189 char *tmp; 3190 gas_assert (index_1 < NIOS2_MAX_INSN_TOKENS 3191 && index_2 < NIOS2_MAX_INSN_TOKENS); 3192 tmp = parsed_args[index_1]; 3193 parsed_args[index_1] = parsed_args[index_2]; 3194 parsed_args[index_2] = tmp; 3195 } 3196 3197 /* This function appends the string appnd to the array of strings in 3198 parsed_args num times starting at index start in the array. */ 3199 static void 3200 nios2_append_arg (char **parsed_args, const char *appnd, int num, 3201 int start) 3202 { 3203 int i, count; 3204 char *tmp; 3205 3206 gas_assert ((start + num) < NIOS2_MAX_INSN_TOKENS); 3207 3208 if (nios2_mode == NIOS2_MODE_TEST) 3209 tmp = parsed_args[start]; 3210 else 3211 tmp = NULL; 3212 3213 for (i = start, count = num; count > 0; ++i, --count) 3214 parsed_args[i] = (char *) appnd; 3215 3216 gas_assert (i == (start + num)); 3217 parsed_args[i] = tmp; 3218 parsed_args[i + 1] = NULL; 3219 } 3220 3221 /* This function inserts the string insert num times in the array 3222 parsed_args, starting at the index start. */ 3223 static void 3224 nios2_insert_arg (char **parsed_args, const char *insert, int num, 3225 int start) 3226 { 3227 int i, count; 3228 3229 gas_assert ((start + num) < NIOS2_MAX_INSN_TOKENS); 3230 3231 /* Move the existing arguments up to create space. */ 3232 for (i = NIOS2_MAX_INSN_TOKENS; i - num >= start; --i) 3233 parsed_args[i] = parsed_args[i - num]; 3234 3235 for (i = start, count = num; count > 0; ++i, --count) 3236 parsed_args[i] = (char *) insert; 3237 } 3238 3239 /* Cleanup function to free malloc'ed arg strings. */ 3240 static void 3241 nios2_free_arg (char **parsed_args, int num ATTRIBUTE_UNUSED, int start) 3242 { 3243 if (parsed_args[start]) 3244 { 3245 free (parsed_args[start]); 3246 parsed_args[start] = NULL; 3247 } 3248 } 3249 3250 /* This function swaps the pseudo-op for a real op. */ 3251 static nios2_ps_insn_infoS* 3252 nios2_translate_pseudo_insn (nios2_insn_infoS *insn) 3253 { 3254 3255 nios2_ps_insn_infoS *ps_insn; 3256 3257 /* Find which real insn the pseudo-op transates to and 3258 switch the insn_info ptr to point to it. */ 3259 ps_insn = nios2_ps_lookup (insn->insn_nios2_opcode->name); 3260 3261 if (ps_insn != NULL) 3262 { 3263 insn->insn_nios2_opcode = nios2_opcode_lookup (ps_insn->insn); 3264 insn->insn_tokens[0] = insn->insn_nios2_opcode->name; 3265 /* Modify the args so they work with the real insn. */ 3266 ps_insn->arg_modifer_func ((char **) insn->insn_tokens, 3267 ps_insn->arg_modifier, ps_insn->num, 3268 ps_insn->index); 3269 } 3270 else 3271 /* we cannot recover from this. */ 3272 as_fatal (_("unrecognized pseudo-instruction %s"), 3273 insn->insn_nios2_opcode->name); 3274 return ps_insn; 3275 } 3276 3277 /* Invoke the cleanup handler for pseudo-insn ps_insn on insn. */ 3278 static void 3279 nios2_cleanup_pseudo_insn (nios2_insn_infoS *insn, 3280 nios2_ps_insn_infoS *ps_insn) 3281 { 3282 if (ps_insn->arg_cleanup_func) 3283 (ps_insn->arg_cleanup_func) ((char **) insn->insn_tokens, 3284 ps_insn->num, ps_insn->index); 3285 } 3286 3287 const nios2_ps_insn_infoS nios2_ps_insn_info_structs[] = { 3288 /* pseudo-op, real-op, arg, arg_modifier_func, num, index, arg_cleanup_func */ 3289 {"mov", "add", nios2_append_arg, "zero", 1, 3, NULL}, 3290 {"movi", "addi", nios2_insert_arg, "zero", 1, 2, NULL}, 3291 {"movhi", "orhi", nios2_insert_arg, "zero", 1, 2, NULL}, 3292 {"movui", "ori", nios2_insert_arg, "zero", 1, 2, NULL}, 3293 {"movia", "orhi", nios2_insert_arg, "zero", 1, 2, NULL}, 3294 {"nop", "add", nios2_append_arg, "zero", 3, 1, NULL}, 3295 {"bgt", "blt", nios2_swap_args, "", 1, 2, NULL}, 3296 {"bgtu", "bltu", nios2_swap_args, "", 1, 2, NULL}, 3297 {"ble", "bge", nios2_swap_args, "", 1, 2, NULL}, 3298 {"bleu", "bgeu", nios2_swap_args, "", 1, 2, NULL}, 3299 {"cmpgt", "cmplt", nios2_swap_args, "", 2, 3, NULL}, 3300 {"cmpgtu", "cmpltu", nios2_swap_args, "", 2, 3, NULL}, 3301 {"cmple", "cmpge", nios2_swap_args, "", 2, 3, NULL}, 3302 {"cmpleu", "cmpgeu", nios2_swap_args, "", 2, 3, NULL}, 3303 {"cmpgti", "cmpgei", nios2_modify_arg, "+1", 0, 3, nios2_free_arg}, 3304 {"cmpgtui", "cmpgeui", nios2_modify_arg, "+1", 0, 3, nios2_free_arg}, 3305 {"cmplei", "cmplti", nios2_modify_arg, "+1", 0, 3, nios2_free_arg}, 3306 {"cmpleui", "cmpltui", nios2_modify_arg, "+1", 0, 3, nios2_free_arg}, 3307 {"subi", "addi", nios2_negate_arg, "", 0, 3, nios2_free_arg}, 3308 {"nop.n", "mov.n", nios2_append_arg, "zero", 2, 1, NULL} 3309 /* Add further pseudo-ops here. */ 3310 }; 3311 3312 #define NIOS2_NUM_PSEUDO_INSNS \ 3313 ((sizeof(nios2_ps_insn_info_structs)/ \ 3314 sizeof(nios2_ps_insn_info_structs[0]))) 3315 const int nios2_num_ps_insn_info_structs = NIOS2_NUM_PSEUDO_INSNS; 3316 3317 3318 /** Assembler output support. */ 3320 3321 /* Output a normal instruction. */ 3322 static void 3323 output_insn (nios2_insn_infoS *insn) 3324 { 3325 char *f; 3326 nios2_insn_relocS *reloc; 3327 f = frag_more (insn->insn_nios2_opcode->size); 3328 /* This allocates enough space for the instruction 3329 and puts it in the current frag. */ 3330 md_number_to_chars (f, insn->insn_code, insn->insn_nios2_opcode->size); 3331 /* Emit debug info. */ 3332 dwarf2_emit_insn (insn->insn_nios2_opcode->size); 3333 /* Create any fixups to be acted on later. */ 3334 3335 for (reloc = insn->insn_reloc; reloc != NULL; reloc = reloc->reloc_next) 3336 fix_new_exp (frag_now, f - frag_now->fr_literal, 3337 insn->insn_nios2_opcode->size, 3338 &reloc->reloc_expression, reloc->reloc_pcrel, 3339 reloc->reloc_type); 3340 } 3341 3342 /* Output an unconditional branch. */ 3343 static void 3344 output_ubranch (nios2_insn_infoS *insn) 3345 { 3346 nios2_insn_relocS *reloc = insn->insn_reloc; 3347 3348 /* If the reloc is NULL, there was an error assembling the branch. */ 3349 if (reloc != NULL) 3350 { 3351 symbolS *symp = reloc->reloc_expression.X_add_symbol; 3352 offsetT offset = reloc->reloc_expression.X_add_number; 3353 char *f; 3354 bfd_boolean is_cdx = (insn->insn_nios2_opcode->size == 2); 3355 3356 /* Tag dwarf2 debug info to the address at the start of the insn. 3357 We must do it before frag_var() below closes off the frag. */ 3358 dwarf2_emit_insn (0); 3359 3360 /* We create a machine dependent frag which can grow 3361 to accommodate the largest possible instruction sequence 3362 this may generate. */ 3363 f = frag_var (rs_machine_dependent, 3364 UBRANCH_MAX_SIZE, insn->insn_nios2_opcode->size, 3365 (is_cdx ? CDX_UBRANCH_SUBTYPE (0) : UBRANCH_SUBTYPE (0)), 3366 symp, offset, NULL); 3367 3368 md_number_to_chars (f, insn->insn_code, insn->insn_nios2_opcode->size); 3369 3370 /* We leave fixup generation to md_convert_frag. */ 3371 } 3372 } 3373 3374 /* Output a conditional branch. */ 3375 static void 3376 output_cbranch (nios2_insn_infoS *insn) 3377 { 3378 nios2_insn_relocS *reloc = insn->insn_reloc; 3379 3380 /* If the reloc is NULL, there was an error assembling the branch. */ 3381 if (reloc != NULL) 3382 { 3383 symbolS *symp = reloc->reloc_expression.X_add_symbol; 3384 offsetT offset = reloc->reloc_expression.X_add_number; 3385 char *f; 3386 bfd_boolean is_cdx = (insn->insn_nios2_opcode->size == 2); 3387 3388 /* Tag dwarf2 debug info to the address at the start of the insn. 3389 We must do it before frag_var() below closes off the frag. */ 3390 dwarf2_emit_insn (0); 3391 3392 /* We create a machine dependent frag which can grow 3393 to accommodate the largest possible instruction sequence 3394 this may generate. */ 3395 f = frag_var (rs_machine_dependent, 3396 CBRANCH_MAX_SIZE, insn->insn_nios2_opcode->size, 3397 (is_cdx ? CDX_CBRANCH_SUBTYPE (0) : CBRANCH_SUBTYPE (0)), 3398 symp, offset, NULL); 3399 3400 md_number_to_chars (f, insn->insn_code, insn->insn_nios2_opcode->size); 3401 3402 /* We leave fixup generation to md_convert_frag. */ 3403 } 3404 } 3405 3406 /* Output a call sequence. Since calls are not pc-relative for NIOS2, 3407 but are page-relative, we cannot tell at any stage in assembly 3408 whether a call will be out of range since a section may be linked 3409 at any address. So if we are relaxing, we convert all call instructions 3410 to long call sequences, and rely on the linker to relax them back to 3411 short calls. */ 3412 static void 3413 output_call (nios2_insn_infoS *insn) 3414 { 3415 /* This allocates enough space for the instruction 3416 and puts it in the current frag. */ 3417 char *f = frag_more (12); 3418 nios2_insn_relocS *reloc = insn->insn_reloc; 3419 const struct nios2_opcode *op = insn->insn_nios2_opcode; 3420 3421 switch (op->format) 3422 { 3423 case iw_j_type: 3424 md_number_to_chars (f, 3425 (MATCH_R1_ORHI | SET_IW_I_B (AT_REGNUM) 3426 | SET_IW_I_A (0)), 3427 4); 3428 dwarf2_emit_insn (4); 3429 fix_new_exp (frag_now, f - frag_now->fr_literal, 4, 3430 &reloc->reloc_expression, 0, BFD_RELOC_NIOS2_HI16); 3431 md_number_to_chars (f + 4, 3432 (MATCH_R1_ORI | SET_IW_I_B (AT_REGNUM) 3433 | SET_IW_I_A (AT_REGNUM)), 3434 4); 3435 dwarf2_emit_insn (4); 3436 fix_new_exp (frag_now, f - frag_now->fr_literal + 4, 4, 3437 &reloc->reloc_expression, 0, BFD_RELOC_NIOS2_LO16); 3438 md_number_to_chars (f + 8, MATCH_R1_CALLR | SET_IW_R_A (AT_REGNUM), 4); 3439 dwarf2_emit_insn (4); 3440 break; 3441 case iw_L26_type: 3442 md_number_to_chars (f, 3443 (MATCH_R2_ORHI | SET_IW_F2I16_B (AT_REGNUM) 3444 | SET_IW_F2I16_A (0)), 3445 4); 3446 dwarf2_emit_insn (4); 3447 fix_new_exp (frag_now, f - frag_now->fr_literal, 4, 3448 &reloc->reloc_expression, 0, BFD_RELOC_NIOS2_HI16); 3449 md_number_to_chars (f + 4, 3450 (MATCH_R2_ORI | SET_IW_F2I16_B (AT_REGNUM) 3451 | SET_IW_F2I16_A (AT_REGNUM)), 3452 4); 3453 dwarf2_emit_insn (4); 3454 fix_new_exp (frag_now, f - frag_now->fr_literal + 4, 4, 3455 &reloc->reloc_expression, 0, BFD_RELOC_NIOS2_LO16); 3456 md_number_to_chars (f + 8, MATCH_R2_CALLR | SET_IW_F3X6L5_A (AT_REGNUM), 3457 4); 3458 dwarf2_emit_insn (4); 3459 break; 3460 default: 3461 bad_opcode (op); 3462 } 3463 } 3464 3465 /* Output a movhi/addi pair for the movia pseudo-op. */ 3466 static void 3467 output_movia (nios2_insn_infoS *insn) 3468 { 3469 /* This allocates enough space for the instruction 3470 and puts it in the current frag. */ 3471 char *f = frag_more (8); 3472 nios2_insn_relocS *reloc = insn->insn_reloc; 3473 unsigned long reg, code = 0; 3474 const struct nios2_opcode *op = insn->insn_nios2_opcode; 3475 3476 /* If the reloc is NULL, there was an error assembling the movia. */ 3477 if (reloc != NULL) 3478 { 3479 switch (op->format) 3480 { 3481 case iw_i_type: 3482 reg = GET_IW_I_B (insn->insn_code); 3483 code = MATCH_R1_ADDI | SET_IW_I_A (reg) | SET_IW_I_B (reg); 3484 break; 3485 case iw_F2I16_type: 3486 reg = GET_IW_F2I16_B (insn->insn_code); 3487 code = MATCH_R2_ADDI | SET_IW_F2I16_A (reg) | SET_IW_F2I16_B (reg); 3488 break; 3489 default: 3490 bad_opcode (op); 3491 } 3492 3493 md_number_to_chars (f, insn->insn_code, 4); 3494 dwarf2_emit_insn (4); 3495 fix_new (frag_now, f - frag_now->fr_literal, 4, 3496 reloc->reloc_expression.X_add_symbol, 3497 reloc->reloc_expression.X_add_number, 0, 3498 BFD_RELOC_NIOS2_HIADJ16); 3499 md_number_to_chars (f + 4, code, 4); 3500 dwarf2_emit_insn (4); 3501 fix_new (frag_now, f + 4 - frag_now->fr_literal, 4, 3502 reloc->reloc_expression.X_add_symbol, 3503 reloc->reloc_expression.X_add_number, 0, BFD_RELOC_NIOS2_LO16); 3504 } 3505 } 3506 3507 3508 3509 /** External interfaces. */ 3511 3512 /* Update the selected architecture based on ARCH, giving an error if 3513 ARCH is an invalid value. */ 3514 3515 static void 3516 nios2_use_arch (const char *arch) 3517 { 3518 if (strcmp (arch, "nios2") == 0 || strcmp (arch, "r1") == 0) 3519 { 3520 nios2_architecture |= EF_NIOS2_ARCH_R1; 3521 nios2_opcodes = (struct nios2_opcode *) nios2_r1_opcodes; 3522 nios2_num_opcodes = nios2_num_r1_opcodes; 3523 nop32 = nop_r1; 3524 nop16 = NULL; 3525 return; 3526 } 3527 else if (strcmp (arch, "r2") == 0) 3528 { 3529 nios2_architecture |= EF_NIOS2_ARCH_R2; 3530 nios2_opcodes = (struct nios2_opcode *) nios2_r2_opcodes; 3531 nios2_num_opcodes = nios2_num_r2_opcodes; 3532 nop32 = nop_r2; 3533 nop16 = nop_r2_cdx; 3534 return; 3535 } 3536 3537 as_bad (_("unknown architecture '%s'"), arch); 3538 } 3539 3540 /* The following functions are called by machine-independent parts of 3541 the assembler. */ 3542 int 3543 md_parse_option (int c, const char *arg ATTRIBUTE_UNUSED) 3544 { 3545 switch (c) 3546 { 3547 case 'r': 3548 /* Hidden option for self-test mode. */ 3549 nios2_mode = NIOS2_MODE_TEST; 3550 break; 3551 case OPTION_RELAX_ALL: 3552 nios2_as_options.relax = relax_all; 3553 break; 3554 case OPTION_NORELAX: 3555 nios2_as_options.relax = relax_none; 3556 break; 3557 case OPTION_RELAX_SECTION: 3558 nios2_as_options.relax = relax_section; 3559 break; 3560 case OPTION_EB: 3561 target_big_endian = 1; 3562 break; 3563 case OPTION_EL: 3564 target_big_endian = 0; 3565 break; 3566 case OPTION_MARCH: 3567 nios2_use_arch (arg); 3568 break; 3569 default: 3570 return 0; 3571 break; 3572 } 3573 3574 return 1; 3575 } 3576 3577 /* Implement TARGET_FORMAT. We can choose to be big-endian or 3578 little-endian at runtime based on a switch. */ 3579 const char * 3580 nios2_target_format (void) 3581 { 3582 return target_big_endian ? "elf32-bignios2" : "elf32-littlenios2"; 3583 } 3584 3585 /* Machine-dependent usage message. */ 3586 void 3587 md_show_usage (FILE *stream) 3588 { 3589 fprintf (stream, " NIOS2 options:\n" 3590 " -relax-all replace all branch and call " 3591 "instructions with jmp and callr sequences\n" 3592 " -relax-section replace identified out of range " 3593 "branches with jmp sequences (default)\n" 3594 " -no-relax do not replace any branches or calls\n" 3595 " -EB force big-endian byte ordering\n" 3596 " -EL force little-endian byte ordering\n" 3597 " -march=ARCH enable instructions from architecture ARCH\n"); 3598 } 3599 3600 3601 /* This function is called once, at assembler startup time. 3602 It should set up all the tables, etc. that the MD part of the 3603 assembler will need. */ 3604 void 3605 md_begin (void) 3606 { 3607 int i; 3608 const char *inserted; 3609 3610 switch (nios2_architecture) 3611 { 3612 default: 3613 case EF_NIOS2_ARCH_R1: 3614 bfd_default_set_arch_mach (stdoutput, bfd_arch_nios2, bfd_mach_nios2r1); 3615 break; 3616 case EF_NIOS2_ARCH_R2: 3617 if (target_big_endian) 3618 as_fatal (_("Big-endian R2 is not supported.")); 3619 bfd_default_set_arch_mach (stdoutput, bfd_arch_nios2, bfd_mach_nios2r2); 3620 break; 3621 } 3622 3623 /* Create and fill a hashtable for the Nios II opcodes, registers and 3624 arguments. */ 3625 nios2_opcode_hash = hash_new (); 3626 nios2_reg_hash = hash_new (); 3627 nios2_ps_hash = hash_new (); 3628 3629 for (i = 0; i < nios2_num_opcodes; ++i) 3630 { 3631 inserted 3632 = hash_insert (nios2_opcode_hash, nios2_opcodes[i].name, 3633 (PTR) & nios2_opcodes[i]); 3634 if (inserted != NULL) 3635 { 3636 fprintf (stderr, _("internal error: can't hash `%s': %s\n"), 3637 nios2_opcodes[i].name, inserted); 3638 /* Probably a memory allocation problem? Give up now. */ 3639 as_fatal (_("Broken assembler. No assembly attempted.")); 3640 } 3641 } 3642 3643 for (i = 0; i < nios2_num_regs; ++i) 3644 { 3645 inserted 3646 = hash_insert (nios2_reg_hash, nios2_regs[i].name, 3647 (PTR) & nios2_regs[i]); 3648 if (inserted != NULL) 3649 { 3650 fprintf (stderr, _("internal error: can't hash `%s': %s\n"), 3651 nios2_regs[i].name, inserted); 3652 /* Probably a memory allocation problem? Give up now. */ 3653 as_fatal (_("Broken assembler. No assembly attempted.")); 3654 } 3655 3656 } 3657 3658 for (i = 0; i < nios2_num_ps_insn_info_structs; ++i) 3659 { 3660 inserted 3661 = hash_insert (nios2_ps_hash, nios2_ps_insn_info_structs[i].pseudo_insn, 3662 (PTR) & nios2_ps_insn_info_structs[i]); 3663 if (inserted != NULL) 3664 { 3665 fprintf (stderr, _("internal error: can't hash `%s': %s\n"), 3666 nios2_ps_insn_info_structs[i].pseudo_insn, inserted); 3667 /* Probably a memory allocation problem? Give up now. */ 3668 as_fatal (_("Broken assembler. No assembly attempted.")); 3669 } 3670 } 3671 3672 /* Assembler option defaults. */ 3673 nios2_as_options.noat = FALSE; 3674 nios2_as_options.nobreak = FALSE; 3675 3676 /* Debug information is incompatible with relaxation. */ 3677 if (debug_type != DEBUG_UNSPECIFIED) 3678 nios2_as_options.relax = relax_none; 3679 3680 /* Initialize the alignment data. */ 3681 nios2_current_align_seg = now_seg; 3682 nios2_last_label = NULL; 3683 nios2_current_align = 0; 3684 nios2_min_align = 2; 3685 } 3686 3687 3688 /* Assembles a single line of Nios II assembly language. */ 3689 void 3690 md_assemble (char *op_str) 3691 { 3692 char *argstr; 3693 char *op_strdup = NULL; 3694 unsigned long saved_pinfo = 0; 3695 nios2_insn_infoS thisinsn; 3696 nios2_insn_infoS *insn = &thisinsn; 3697 3698 /* Make sure we are aligned on an appropriate boundary. */ 3699 if (nios2_current_align < nios2_min_align) 3700 nios2_align (nios2_min_align, NULL, nios2_last_label); 3701 else if (nios2_current_align > nios2_min_align) 3702 nios2_current_align = nios2_min_align; 3703 nios2_last_label = NULL; 3704 3705 /* We don't want to clobber to op_str 3706 because we want to be able to use it in messages. */ 3707 op_strdup = strdup (op_str); 3708 insn->insn_tokens[0] = strtok (op_strdup, " "); 3709 argstr = strtok (NULL, ""); 3710 3711 /* Assemble the opcode. */ 3712 insn->insn_nios2_opcode = nios2_opcode_lookup (insn->insn_tokens[0]); 3713 insn->insn_reloc = NULL; 3714 3715 if (insn->insn_nios2_opcode != NULL) 3716 { 3717 nios2_ps_insn_infoS *ps_insn = NULL; 3718 3719 /* Note if we've seen a 16-bit instruction. */ 3720 if (insn->insn_nios2_opcode->size == 2) 3721 nios2_min_align = 1; 3722 3723 /* Set the opcode for the instruction. */ 3724 insn->insn_code = insn->insn_nios2_opcode->match; 3725 insn->constant_bits = 0; 3726 3727 /* Parse the arguments pointed to by argstr. */ 3728 if (nios2_mode == NIOS2_MODE_ASSEMBLE) 3729 nios2_parse_args (insn, argstr, insn->insn_nios2_opcode->args, 3730 (char **) &insn->insn_tokens[1]); 3731 else 3732 nios2_parse_args (insn, argstr, insn->insn_nios2_opcode->args_test, 3733 (char **) &insn->insn_tokens[1]); 3734 3735 /* We need to preserve the MOVIA macro as this is clobbered by 3736 translate_pseudo_insn. */ 3737 if (insn->insn_nios2_opcode->pinfo == NIOS2_INSN_MACRO_MOVIA) 3738 saved_pinfo = NIOS2_INSN_MACRO_MOVIA; 3739 /* If the instruction is an pseudo-instruction, we want to replace it 3740 with its real equivalent, and then continue. */ 3741 if ((insn->insn_nios2_opcode->pinfo & NIOS2_INSN_MACRO) 3742 == NIOS2_INSN_MACRO) 3743 ps_insn = nios2_translate_pseudo_insn (insn); 3744 3745 /* Assemble the parsed arguments into the instruction word. */ 3746 nios2_assemble_args (insn); 3747 3748 /* Handle relaxation and other transformations. */ 3749 if (nios2_as_options.relax != relax_none 3750 && !nios2_as_options.noat 3751 && insn->insn_nios2_opcode->pinfo & NIOS2_INSN_UBRANCH) 3752 output_ubranch (insn); 3753 else if (nios2_as_options.relax != relax_none 3754 && !nios2_as_options.noat 3755 && insn->insn_nios2_opcode->pinfo & NIOS2_INSN_CBRANCH) 3756 output_cbranch (insn); 3757 else if (nios2_as_options.relax == relax_all 3758 && !nios2_as_options.noat 3759 && insn->insn_nios2_opcode->pinfo & NIOS2_INSN_CALL 3760 && insn->insn_reloc 3761 && ((insn->insn_reloc->reloc_type 3762 == BFD_RELOC_NIOS2_CALL26) 3763 || (insn->insn_reloc->reloc_type 3764 == BFD_RELOC_NIOS2_CALL26_NOAT))) 3765 output_call (insn); 3766 else if (saved_pinfo == NIOS2_INSN_MACRO_MOVIA) 3767 output_movia (insn); 3768 else 3769 output_insn (insn); 3770 if (ps_insn) 3771 nios2_cleanup_pseudo_insn (insn, ps_insn); 3772 } 3773 else 3774 /* Unrecognised instruction - error. */ 3775 as_bad (_("unrecognised instruction %s"), insn->insn_tokens[0]); 3776 3777 /* Don't leak memory. */ 3778 free (op_strdup); 3779 } 3780 3781 /* Round up section size. */ 3782 valueT 3783 md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT size) 3784 { 3785 /* I think byte alignment is fine here. */ 3786 return size; 3787 } 3788 3789 /* Implement TC_FORCE_RELOCATION. */ 3790 int 3791 nios2_force_relocation (fixS *fixp) 3792 { 3793 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT 3794 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY 3795 || fixp->fx_r_type == BFD_RELOC_NIOS2_ALIGN) 3796 return 1; 3797 3798 return generic_force_reloc (fixp); 3799 } 3800 3801 /* Implement tc_fix_adjustable. */ 3802 int 3803 nios2_fix_adjustable (fixS *fixp) 3804 { 3805 if (fixp->fx_addsy == NULL) 3806 return 1; 3807 3808 #ifdef OBJ_ELF 3809 /* Prevent all adjustments to global symbols. */ 3810 if (OUTPUT_FLAVOR == bfd_target_elf_flavour 3811 && (S_IS_EXTERNAL (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy))) 3812 return 0; 3813 #endif 3814 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT 3815 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY) 3816 return 0; 3817 3818 /* Preserve relocations against symbols with function type. */ 3819 if (symbol_get_bfdsym (fixp->fx_addsy)->flags & BSF_FUNCTION) 3820 return 0; 3821 3822 /* Don't allow symbols to be discarded on GOT related relocs. */ 3823 if (fixp->fx_r_type == BFD_RELOC_NIOS2_GOT16 3824 || fixp->fx_r_type == BFD_RELOC_NIOS2_CALL16 3825 || fixp->fx_r_type == BFD_RELOC_NIOS2_GOTOFF_LO 3826 || fixp->fx_r_type == BFD_RELOC_NIOS2_GOTOFF_HA 3827 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_GD16 3828 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_LDM16 3829 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_LDO16 3830 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_IE16 3831 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_LE16 3832 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_DTPMOD 3833 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_DTPREL 3834 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_TPREL 3835 || fixp->fx_r_type == BFD_RELOC_NIOS2_GOTOFF 3836 || fixp->fx_r_type == BFD_RELOC_NIOS2_GOT_LO 3837 || fixp->fx_r_type == BFD_RELOC_NIOS2_GOT_HA 3838 || fixp->fx_r_type == BFD_RELOC_NIOS2_CALL_LO 3839 || fixp->fx_r_type == BFD_RELOC_NIOS2_CALL_HA 3840 ) 3841 return 0; 3842 3843 return 1; 3844 } 3845 3846 /* Implement tc_frob_symbol. This is called in adjust_reloc_syms; 3847 it is used to remove *ABS* references from the symbol table. */ 3848 int 3849 nios2_frob_symbol (symbolS *symp) 3850 { 3851 if ((OUTPUT_FLAVOR == bfd_target_elf_flavour 3852 && symp == section_symbol (absolute_section)) 3853 || !S_IS_DEFINED (symp)) 3854 return 1; 3855 else 3856 return 0; 3857 } 3858 3859 /* The function tc_gen_reloc creates a relocation structure for the 3860 fixup fixp, and returns a pointer to it. This structure is passed 3861 to bfd_install_relocation so that it can be written to the object 3862 file for linking. */ 3863 arelent * 3864 tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp) 3865 { 3866 arelent *reloc = XNEW (arelent); 3867 reloc->sym_ptr_ptr = XNEW (asymbol *); 3868 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 3869 3870 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; 3871 reloc->addend = fixp->fx_offset; /* fixp->fx_addnumber; */ 3872 3873 if (fixp->fx_pcrel) 3874 { 3875 switch (fixp->fx_r_type) 3876 { 3877 case BFD_RELOC_16: 3878 fixp->fx_r_type = BFD_RELOC_16_PCREL; 3879 break; 3880 case BFD_RELOC_NIOS2_LO16: 3881 fixp->fx_r_type = BFD_RELOC_NIOS2_PCREL_LO; 3882 break; 3883 case BFD_RELOC_NIOS2_HIADJ16: 3884 fixp->fx_r_type = BFD_RELOC_NIOS2_PCREL_HA; 3885 break; 3886 default: 3887 break; 3888 } 3889 } 3890 3891 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); 3892 if (reloc->howto == NULL) 3893 { 3894 as_bad_where (fixp->fx_file, fixp->fx_line, 3895 _("can't represent relocation type %s"), 3896 bfd_get_reloc_code_name (fixp->fx_r_type)); 3897 3898 /* Set howto to a garbage value so that we can keep going. */ 3899 reloc->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); 3900 gas_assert (reloc->howto != NULL); 3901 } 3902 return reloc; 3903 } 3904 3905 long 3906 md_pcrel_from (fixS *fixP ATTRIBUTE_UNUSED) 3907 { 3908 return 0; 3909 } 3910 3911 /* Called just before the assembler exits. */ 3912 void 3913 md_end (void) 3914 { 3915 /* FIXME - not yet implemented */ 3916 } 3917 3918 /* Under ELF we need to default _GLOBAL_OFFSET_TABLE. 3919 Otherwise we have no need to default values of symbols. */ 3920 symbolS * 3921 md_undefined_symbol (char *name ATTRIBUTE_UNUSED) 3922 { 3923 #ifdef OBJ_ELF 3924 if (name[0] == '_' && name[1] == 'G' 3925 && strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0) 3926 { 3927 if (!GOT_symbol) 3928 { 3929 if (symbol_find (name)) 3930 as_bad ("GOT already in the symbol table"); 3931 3932 GOT_symbol = symbol_new (name, undefined_section, 3933 (valueT) 0, &zero_address_frag); 3934 } 3935 3936 return GOT_symbol; 3937 } 3938 #endif 3939 3940 return 0; 3941 } 3942 3943 /* Implement tc_frob_label. */ 3944 void 3945 nios2_frob_label (symbolS *lab) 3946 { 3947 /* Emit dwarf information. */ 3948 dwarf2_emit_label (lab); 3949 3950 /* Update the label's address with the current output pointer. */ 3951 symbol_set_frag (lab, frag_now); 3952 S_SET_VALUE (lab, (valueT) frag_now_fix ()); 3953 3954 /* Record this label for future adjustment after we find out what 3955 kind of data it references, and the required alignment therewith. */ 3956 nios2_last_label = lab; 3957 } 3958 3959 /* Implement md_cons_align. */ 3960 void 3961 nios2_cons_align (int size) 3962 { 3963 int log_size = 0; 3964 const char *pfill = NULL; 3965 3966 while ((size >>= 1) != 0) 3967 ++log_size; 3968 3969 if (subseg_text_p (now_seg)) 3970 pfill = (const char *) nop32; 3971 else 3972 pfill = NULL; 3973 3974 if (nios2_auto_align_on) 3975 nios2_align (log_size, pfill, NULL); 3976 3977 nios2_last_label = NULL; 3978 } 3979 3980 /* Map 's' to SHF_NIOS2_GPREL. */ 3981 /* This is from the Alpha code tc-alpha.c. */ 3982 int 3983 nios2_elf_section_letter (int letter, const char **ptr_msg) 3984 { 3985 if (letter == 's') 3986 return SHF_NIOS2_GPREL; 3987 3988 *ptr_msg = _("Bad .section directive: want a,s,w,x,M,S,G,T in string"); 3989 return -1; 3990 } 3991 3992 /* Map SHF_ALPHA_GPREL to SEC_SMALL_DATA. */ 3993 /* This is from the Alpha code tc-alpha.c. */ 3994 flagword 3995 nios2_elf_section_flags (flagword flags, int attr, int type ATTRIBUTE_UNUSED) 3996 { 3997 if (attr & SHF_NIOS2_GPREL) 3998 flags |= SEC_SMALL_DATA; 3999 return flags; 4000 } 4001 4002 /* Implement TC_PARSE_CONS_EXPRESSION to handle %tls_ldo(...) */ 4003 bfd_reloc_code_real_type 4004 nios2_cons (expressionS *exp, int size) 4005 { 4006 bfd_reloc_code_real_type nios2_tls_ldo_reloc = BFD_RELOC_NONE; 4007 4008 SKIP_WHITESPACE (); 4009 if (input_line_pointer[0] == '%') 4010 { 4011 if (strprefix (input_line_pointer + 1, "tls_ldo")) 4012 { 4013 if (size != 4) 4014 as_bad (_("Illegal operands: %%tls_ldo in %d-byte data field"), 4015 size); 4016 else 4017 { 4018 input_line_pointer += 8; 4019 nios2_tls_ldo_reloc = BFD_RELOC_NIOS2_TLS_DTPREL; 4020 } 4021 } 4022 if (nios2_tls_ldo_reloc != BFD_RELOC_NONE) 4023 { 4024 SKIP_WHITESPACE (); 4025 if (input_line_pointer[0] != '(') 4026 as_bad (_("Illegal operands: %%tls_ldo requires arguments in ()")); 4027 else 4028 { 4029 int c; 4030 char *end = ++input_line_pointer; 4031 int npar = 0; 4032 4033 for (c = *end; !is_end_of_line[c]; end++, c = *end) 4034 if (c == '(') 4035 npar++; 4036 else if (c == ')') 4037 { 4038 if (!npar) 4039 break; 4040 npar--; 4041 } 4042 4043 if (c != ')') 4044 as_bad (_("Illegal operands: %%tls_ldo requires arguments in ()")); 4045 else 4046 { 4047 *end = '\0'; 4048 expression (exp); 4049 *end = c; 4050 if (input_line_pointer != end) 4051 as_bad (_("Illegal operands: %%tls_ldo requires arguments in ()")); 4052 else 4053 { 4054 input_line_pointer++; 4055 SKIP_WHITESPACE (); 4056 c = *input_line_pointer; 4057 if (! is_end_of_line[c] && c != ',') 4058 as_bad (_("Illegal operands: garbage after %%tls_ldo()")); 4059 } 4060 } 4061 } 4062 } 4063 } 4064 if (nios2_tls_ldo_reloc == BFD_RELOC_NONE) 4065 expression (exp); 4066 return nios2_tls_ldo_reloc; 4067 } 4068 4069 /* Implement HANDLE_ALIGN. */ 4070 void 4071 nios2_handle_align (fragS *fragp) 4072 { 4073 /* If we are expecting to relax in the linker, then we must output a 4074 relocation to tell the linker we are aligning code. */ 4075 if (nios2_as_options.relax == relax_all 4076 && (fragp->fr_type == rs_align || fragp->fr_type == rs_align_code) 4077 && fragp->fr_address + fragp->fr_fix > 0 4078 && fragp->fr_offset > 1 4079 && now_seg != bss_section) 4080 fix_new (fragp, fragp->fr_fix, 0, &abs_symbol, fragp->fr_offset, 0, 4081 BFD_RELOC_NIOS2_ALIGN); 4082 } 4083 4084 /* Implement tc_regname_to_dw2regnum, to convert REGNAME to a DWARF-2 4085 register number. */ 4086 int 4087 nios2_regname_to_dw2regnum (char *regname) 4088 { 4089 struct nios2_reg *r = nios2_reg_lookup (regname); 4090 if (r == NULL) 4091 return -1; 4092 return r->index; 4093 } 4094 4095 /* Implement tc_cfi_frame_initial_instructions, to initialize the DWARF-2 4096 unwind information for this procedure. */ 4097 void 4098 nios2_frame_initial_instructions (void) 4099 { 4100 cfi_add_CFA_def_cfa (27, 0); 4101 } 4102 4103 #ifdef OBJ_ELF 4104 /* Some special processing for a Nios II ELF file. */ 4105 4106 void 4107 nios2_elf_final_processing (void) 4108 { 4109 elf_elfheader (stdoutput)->e_flags = nios2_architecture; 4110 } 4111 #endif 4112