| /external/llvm/test/MC/AArch64/ |
| neon-across.s | 9 saddlv h0, v1.8b
10 saddlv h0, v1.16b
11 saddlv s0, v1.4h
12 saddlv s0, v1.8h
13 saddlv d0, v1.4s
15 // CHECK: saddlv h0, v1.8b // encoding: [0x20,0x38,0x30,0x0e]
16 // CHECK: saddlv h0, v1.16b // encoding: [0x20,0x38,0x30,0x4e]
17 // CHECK: saddlv s0, v1.4h // encoding: [0x20,0x38,0x70,0x0e]
18 // CHECK: saddlv s0, v1.8h // encoding: [0x20,0x38,0x70,0x4e]
19 // CHECK: saddlv d0, v1.4s // encoding: [0x20,0x38,0xb0,0x4e
[all...] |
| neon-diagnostics.s | [all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/aarch64/ |
| advsimd-across.d | 8 0: 0e303be7 saddlv h7, v31.8b
9 4: 4e303be7 saddlv h7, v31.16b
10 8: 0e703be7 saddlv s7, v31.4h
11 c: 4e703be7 saddlv s7, v31.8h
12 10: 4eb03be7 saddlv d7, v31.4s
|
| advsimd-across.s | 28 .irp op, saddlv, uaddlv
|
| illegal.s | 30 saddlv b7, v31.8b
31 saddlv d7, v31.2s
32 saddlv q7, v31.2d
|
| illegal.l | 6 [^:]*:30: Error: .*`saddlv b7,v31.8b'
7 [^:]*:31: Error: .*`saddlv d7,v31.2s'
8 [^:]*:32: Error: .*`saddlv q7,v31.2d'
|
| /external/capstone/suite/MC/AArch64/ |
| neon-across.s.cs | 2 0x20,0x38,0x30,0x0e = saddlv h0, v1.8b
3 0x20,0x38,0x30,0x4e = saddlv h0, v1.16b
4 0x20,0x38,0x70,0x0e = saddlv s0, v1.4h
5 0x20,0x38,0x70,0x4e = saddlv s0, v1.8h
6 0x20,0x38,0xb0,0x4e = saddlv d0, v1.4s
|
| /external/vixl/test/aarch64/ |
| test-trace-aarch64.cc | [all...] |
| test-simulator-aarch64.cc | [all...] |
| /external/vixl/src/aarch64/ |
| assembler-aarch64.h | [all...] |
| macro-assembler-aarch64.h | [all...] |
| simulator-aarch64.h | [all...] |
| simulator-aarch64.cc | [all...] |
| assembler-aarch64.cc | [all...] |
| logic-aarch64.cc | 1453 LogicVRegister Simulator::saddlv(VectorFormat vform, function in class:vixl::aarch64::Simulator
[all...] |
| /external/valgrind/none/tests/arm64/ |
| fp_and_simd.stdout.exp | [all...] |
