/prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/x86_64-w64-mingw32/include/ddk/ |
usbdlib.h | 12 #define UsbBuildInterruptOrBulkTransferRequest(urb,length, pipeHandle, transferBuffer, transferBufferMDL, transferBufferLength, transferFlags, link) \ 14 (urb)->UrbHeader.Function = URB_FUNCTION_BULK_OR_INTERRUPT_TRANSFER; \ 15 (urb)->UrbHeader.Length = (length); \ 16 (urb)->UrbBulkOrInterruptTransfer.PipeHandle = (pipeHandle); \ 17 (urb)->UrbBulkOrInterruptTransfer.TransferBufferLength = (transferBufferLength); \ 18 (urb)->UrbBulkOrInterruptTransfer.TransferBufferMDL = (transferBufferMDL); \ 19 (urb)->UrbBulkOrInterruptTransfer.TransferBuffer = (transferBuffer); \ 20 (urb)->UrbBulkOrInterruptTransfer.TransferFlags = (transferFlags); \ 21 (urb)->UrbBulkOrInterruptTransfer.UrbLink = (link); \ 24 #define UsbBuildGetDescriptorRequest(urb, length, descriptorType, descriptorIndex, languageId, transferBuffer, transferBufferMDL, transferB (…) [all...] |
/external/mesa3d/src/mesa/drivers/dri/i965/ |
brw_urb.c | 47 * Manages the division of the URB space between the various fixed-function 77 * Each unit will take the number of URB entries we give it (based on the 102 brw->urb.vs_start = 0; 103 brw->urb.gs_start = brw->urb.nr_vs_entries * brw->urb.vsize; 104 brw->urb.clip_start = brw->urb.gs_start + brw->urb.nr_gs_entries * brw->urb.vsize [all...] |
gen6_urb.c | 35 * When the GS is not in use, we assign the entire URB space to the VS. When 36 * the GS is in use, we split the URB space evenly between the VS and the GS. 39 * URB size / 2 URB size / 2 46 * Sandybridge GT1 has 32kB of URB space, while GT2 has 64kB. 54 int total_urb_size = brw->urb.size * 1024; /* in bytes */ 57 /* Calculate how many entries fit in each stage's section of the URB */ 67 if (nr_vs_entries > devinfo->urb.max_entries[MESA_SHADER_VERTEX]) 68 nr_vs_entries = devinfo->urb.max_entries[MESA_SHADER_VERTEX]; 70 if (nr_gs_entries > devinfo->urb.max_entries[MESA_SHADER_GEOMETRY] [all...] |
gen7_urb.c | 33 * The following diagram shows how we partition the URB: 35 * 16kB or 32kB Rest of the URB space 39 * | VS/HS/DS/GS/FS Push | VS/HS/DS/GS URB | 43 * Notably, push constants must be stored at the beginning of the URB 55 * Ivybridge GT1 and Haswell GT1 have 128kB of URB space. 56 * Ivybridge GT2 and Haswell GT2 have 256kB of URB space. 57 * Haswell GT3 has 512kB of URB space. 197 /* If we're just switching between programs with the same URB requirements, 202 brw->urb.vsize == entry_size[MESA_SHADER_VERTEX] && 203 brw->urb.gs_present == gs_present & [all...] |
brw_gs_state.c | 71 gs->thread4.nr_urb_entries = brw->urb.nr_gs_entries; 72 gs->thread4.urb_entry_allocation_size = brw->urb.vsize - 1; 74 if (brw->urb.nr_gs_entries >= 8)
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brw_vs_state.c | 70 * and those dwords will be written to the second URB handle when we 105 switch (brw->urb.nr_vs_entries) { 117 vs->thread4.nr_urb_entries = brw->urb.nr_vs_entries >> 2; 123 switch (brw->urb.nr_vs_entries) { 135 vs->thread4.nr_urb_entries = brw->urb.nr_vs_entries; 138 vs->thread4.urb_entry_allocation_size = brw->urb.vsize - 1; 140 vs->thread4.max_threads = CLAMP(brw->urb.nr_vs_entries / 2,
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brw_clip_state.c | 96 clip->thread4.nr_urb_entries = brw->urb.nr_clip_entries; 97 clip->thread4.urb_entry_allocation_size = brw->urb.vsize - 1; 98 /* If we have enough clip URB entries to run two threads, do so. 100 if (brw->urb.nr_clip_entries >= 10) { 101 /* Half of the URB entries go to each thread, and it has to be an 104 assert(brw->urb.nr_clip_entries % 2 == 0); 114 assert(brw->urb.nr_clip_entries >= 5);
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brw_curbe.c | 40 * into URB space as a constant URB entry (CURBE) so that it can be accessed 103 * register is 1/2 of one of these URB entry units, so that leaves us 16 EU 159 * Just like brw_vs_state.c and brw_wm_state.c define a URB entry size and 161 * packet. Having multiple CURBEs in the URB at the same time allows the 171 if (brw->urb.csize == 0) { 175 assert(brw->urb.nr_cs_entries); 176 OUT_BATCH((brw->urb.csize - 1) << 4 | brw->urb.nr_cs_entries); 276 * URB), it shouldn't be shortcircuited if identical to th [all...] |
/external/mesa3d/src/gallium/drivers/ilo/core/ |
ilo_state_urb.h | 49 * URB entry allocation sizes and sizes of constant data extracted from PCBs 70 uint32_t urb[4]; member in struct:ilo_state_urb 78 ilo_state_urb_init(struct ilo_state_urb *urb, 83 ilo_state_urb_init_for_rectlist(struct ilo_state_urb *urb, 88 ilo_state_urb_set_info(struct ilo_state_urb *urb, 93 ilo_state_urb_full_delta(const struct ilo_state_urb *urb, 98 ilo_state_urb_get_delta(const struct ilo_state_urb *urb,
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ilo_state_urb.c | 103 * "(VS URB Starting Address) Offset from the start of the URB memory 114 * allocate at least one GS URB Entry. This is true even if the GS 115 * thread never needs to output vertices to the urb, e.g., when only 117 * the GS thread an initial destination URB handle." 152 * "(VS URB Entry Allocation Size) 153 * Range [0,4] = [1,5] 1024-bit URB rows" 155 * "(VS Number of URB Entries) 197 * "(GS Number of URB Entries) 201 * "(GS URB Entry Allocation Size [all...] |
ilo_state_compute.c | 70 * "The first 32 URB entries are reserved for the interface 75 * "The first 64 URB entries are reserved for the interface 103 struct compute_urb_configuration *urb) 107 urb->idrt_entry_count = get_gen6_idrt_entry_count(dev); 108 urb->curbe_entry_count = 114 * "Please note that 0 is not allowed for this field (Number of URB 117 urb->urb_entry_count = (ilo_dev_gen(dev) >= ILO_GEN(8)) ? 1 : 0; 122 * "(URB Entry Allocation Size) Specifies the length of each URB entry 125 urb->urb_entry_size = 1 283 struct compute_urb_configuration urb; local [all...] |
ilo_state_shader.c | 60 * "Dispatch GRF Start Register for URB Data" is U4 for GS and U5 for 78 const struct ilo_state_shader_urb_info *urb) 80 /* "Vertex/Patch URB Entry Read Offset" is U6, in pairs */ 83 * "Vertex/Patch URB Entry Read Length" is limited to 64 for DS and U6 for 90 assert(urb->read_base + urb->read_count <= urb->cv_input_attr_count); 92 assert(urb->read_base % 2 == 0 && urb->read_base <= max_read_base); 95 * There is no need to worry about reading past entries, as URB entries ar 443 const struct ilo_state_shader_urb_info *urb = &info->urb; local 583 const struct ilo_state_shader_urb_info *urb = &info->urb; local [all...] |
ilo_state_shader.h | 59 * URB inputs/outputs. 76 struct ilo_state_shader_urb_info urb; member in struct:ilo_state_vs_info 86 struct ilo_state_shader_urb_info urb; member in struct:ilo_state_hs_info 96 struct ilo_state_shader_urb_info urb; member in struct:ilo_state_ds_info 119 struct ilo_state_shader_urb_info urb; member in struct:ilo_state_gs_info
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ilo_builder_3d_top.h | 47 const struct ilo_state_urb *urb) 56 dw[1] = urb->urb[0]; 57 dw[2] = urb->urb[1]; 62 const struct ilo_state_urb *urb) 72 dw[1] = urb->pcb[0]; 77 const struct ilo_state_urb *urb) 87 dw[1] = urb->pcb[1]; 92 const struct ilo_state_urb *urb) [all...] |
/external/ltp/testcases/kernel/device-drivers/usb/tusb/ |
st_tusb.h | 36 int (*submit_urb) (struct urb *urb); 37 int (*unlink_urb) (struct urb *urb); 82 int (*urb_enqueue) (struct usb_hcd *hcd, struct urb *urb, 84 int (*urb_dequeue) (struct usb_hcd *hcd, struct urb *urb);
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tusb.c | 104 struct urb *irq; 164 static int test_submit_urb(struct urb *purb) 170 static int test_unlink_urb(struct urb *purb)
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/external/mesa3d/src/intel/common/ |
gen_device_info.c | 36 .urb = { 51 .urb = { 65 .urb = { 82 .urb = { 106 .urb = { 135 .urb = { 159 .urb = { 184 .urb = { 214 .urb = { 238 .urb = [all...] |
gen_device_info.h | 78 * 3DSTATE_GS, 3DSTATE_HS, 3DSTATE_DS, and 3DSTATE_PS commands. URB entry 79 * limits come from the "Number of URB Entries" field in the 129 * Hardware default URB size. 134 * Look up "URB Size" in the "Device Attributes" page, and take the 136 * urb.size = URB Size (kbytes) / slice count 141 * The minimum number of URB entries. See the 3DSTATE_URB_<XS> docs. 146 * The maximum number of URB entries. See the 3DSTATE_URB_<XS> docs. 149 } urb; member in struct:gen_device_info
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gen_urb_config.c | 33 * The following diagram shows how we partition the URB: 35 * 16kb or 32kb Rest of the URB space 39 * | VS/HS/DS/GS/FS Push | VS/HS/DS/GS URB | 43 * Push constants must be stored at the beginning of the URB space, 44 * while URB entries can be stored anywhere. We choose to lay them 49 * Decide how to partition the URB among the various stages. 52 * \param[in] urb_size_bytes - total size of the URB (from L3 config). 55 * \param[in] entry_size - the URB entry size (from the shader compiler) 56 * \param[out] entries - the number of URB entries for each stage 68 /* URB allocations must be done in 8k chunks. * [all...] |
/external/libusb/libusb/os/ |
linux_usbfs.c | 84 /* Linux 2.6.32 adds support for a bulk continuation URB flag. this basically 101 /* Linux 2.6.31 fixes support for the zero length packet URB flag. This 154 /* submission failed after the first URB, so await cancellation/completion 161 /* completed multi-URB transfer in non-final URB */ 391 /* bulk continuation URB flag available from Linux 2.6.32 */ 403 /* zero length packet URB flag fixed since Linux 2.6.31 */ 1753 struct usbfs_urb *urb; local 1784 struct usbfs_urb *urb = tpriv->iso_urbs[i]; local 1875 struct usbfs_urb *urb = &urbs[i]; local 2019 struct usbfs_urb *urb; local 2126 struct usbfs_urb *urb; local 2560 struct usbfs_urb *urb; local [all...] |
/system/core/adb/client/ |
usb_linux.cpp | 306 usbdevfs_urb* urb = &h->urb_out; local 307 memset(urb, 0, sizeof(*urb)); 308 urb->type = USBDEVFS_URB_TYPE_BULK; 309 urb->endpoint = h->ep_out; 310 urb->status = -1; 311 urb->buffer = const_cast<void*>(data); 312 urb->buffer_length = len; 319 if (TEMP_FAILURE_RETRY(ioctl(h->fd, USBDEVFS_SUBMITURB, urb)) == -1) { 332 if (urb->status != 0) 345 usbdevfs_urb* urb = &h->urb_in; local [all...] |
/system/core/libusbhost/ |
usbhost.c | 690 struct usbdevfs_urb *urb = calloc(1, sizeof(struct usbdevfs_urb)); local 691 if (!urb) 695 urb->type = USBDEVFS_URB_TYPE_BULK; 697 urb->type = USBDEVFS_URB_TYPE_INTERRUPT; 700 free(urb); 703 urb->endpoint = ep_desc->bEndpointAddress; 707 free(urb); 713 req->private_data = urb; 714 req->endpoint = urb->endpoint; 715 urb->usercontext = req 728 struct usbdevfs_urb *urb = (struct usbdevfs_urb*)req->private_data; local 758 struct usbdevfs_urb *urb = NULL; local 778 struct usbdevfs_urb *urb = ((struct usbdevfs_urb*)req->private_data); local [all...] |
/external/walt/android/WALT/app/src/main/jni/ |
sync_clock.c | 89 struct usbdevfs_urb *urb = calloc(1, sizeof(struct usbdevfs_urb)); local 90 memset(urb, 0, sizeof(struct usbdevfs_urb)); 93 urb->status = -1; 94 urb->buffer = buffer; 95 urb->buffer_length = length; 96 urb->endpoint = endpoint; 97 urb->type = USBDEVFS_URB_TYPE_BULK; 98 urb->usercontext = label; // This is hackish 100 res = ioctl(fd, USBDEVFS_SUBMITURB, urb);
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/external/mesa3d/src/gallium/drivers/ilo/ |
ilo_render_media.c | 39 int urb; member in struct:gen7_l3_config 51 * "Normal L3/URB mode (non-SLM mode), uses all 4 banks of L3 equally to 57 * "The configuration for {SLM = 0,URB = 224,DC = 32,RO = 256,IS = 0,C = 62 /* SLM URB Rest DC RO I/S C T */ 85 * "The configuration for {SLM = 128,URB = 128,DC = 0,RO = 256,IS = 0,C = 91 /* SLM URB Rest DC RO I/S C T */ 129 (conf->urb / 8) << GEN7_REG_L3CNTLREG2_URBALL__SHIFT; 139 * "Note that URB needs to be set as low b/w client in SLM mode,
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ilo_render_gen7.c | 211 gen7_3DSTATE_URB_VS(r->builder, &vec->urb); 212 gen7_3DSTATE_URB_GS(r->builder, &vec->urb); 213 gen7_3DSTATE_URB_HS(r->builder, &vec->urb); 214 gen7_3DSTATE_URB_DS(r->builder, &vec->urb); 230 gen7_3DSTATE_PUSH_CONSTANT_ALLOC_VS(r->builder, &vec->urb); 231 gen7_3DSTATE_PUSH_CONSTANT_ALLOC_GS(r->builder, &vec->urb); 232 gen7_3DSTATE_PUSH_CONSTANT_ALLOC_PS(r->builder, &vec->urb); 662 gen7_3DSTATE_PUSH_CONSTANT_ALLOC_VS(r->builder, &blitter->urb); 663 gen7_3DSTATE_PUSH_CONSTANT_ALLOC_PS(r->builder, &blitter->urb); 673 gen7_3DSTATE_URB_VS(r->builder, &blitter->urb); [all...] |