| /external/capstone/suite/MC/ARM/ |
| neon-reciprocal-encoding.s.cs | 2 0x20,0x04,0xfb,0xf3 = vrecpe.u32 d16, d16
3 0x60,0x04,0xfb,0xf3 = vrecpe.u32 q8, q8
4 0x20,0x05,0xfb,0xf3 = vrecpe.f32 d16, d16
5 0x60,0x05,0xfb,0xf3 = vrecpe.f32 q8, q8
|
| neont2-reciprocal-encoding.s.cs | 2 0xfb,0xff,0x20,0x04 = vrecpe.u32 d16, d16
3 0xfb,0xff,0x60,0x04 = vrecpe.u32 q8, q8
4 0xfb,0xff,0x20,0x05 = vrecpe.f32 d16, d16
5 0xfb,0xff,0x60,0x05 = vrecpe.f32 q8, q8
|
| /external/llvm/test/MC/ARM/ |
| neon-reciprocal-encoding.s | 3 @ CHECK: vrecpe.u32 d16, d16 @ encoding: [0x20,0x04,0xfb,0xf3]
4 vrecpe.u32 d16, d16
5 @ CHECK: vrecpe.u32 q8, q8 @ encoding: [0x60,0x04,0xfb,0xf3]
6 vrecpe.u32 q8, q8
7 @ CHECK: vrecpe.f32 d16, d16 @ encoding: [0x20,0x05,0xfb,0xf3]
8 vrecpe.f32 d16, d16
9 @ CHECK: vrecpe.f32 q8, q8 @ encoding: [0x60,0x05,0xfb,0xf3]
10 vrecpe.f32 q8, q8
|
| neont2-reciprocal-encoding.s | 5 @ CHECK: vrecpe.u32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x04]
6 vrecpe.u32 d16, d16
7 @ CHECK: vrecpe.u32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x04]
8 vrecpe.u32 q8, q8
9 @ CHECK: vrecpe.f32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x05]
10 vrecpe.f32 d16, d16
11 @ CHECK: vrecpe.f32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x05]
12 vrecpe.f32 q8, q8
|
| fullfp16-neon-neg.s | 165 vrecpe.f16 d0, d1
166 vrecpe.f16 q0, q1
|
| fullfp16-neon.s | 226 vrecpe.f16 d0, d1
227 vrecpe.f16 q0, q1
228 @ ARM: vrecpe.f16 d0, d1 @ encoding: [0x01,0x05,0xb7,0xf3]
229 @ ARM: vrecpe.f16 q0, q1 @ encoding: [0x42,0x05,0xb7,0xf3]
230 @ THUMB: vrecpe.f16 d0, d1 @ encoding: [0xb7,0xff,0x01,0x05]
231 @ THUMB: vrecpe.f16 q0, q1 @ encoding: [0xb7,0xff,0x42,0x05]
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| neon-reciprocal-encoding.s | 3 @ CHECK: vrecpe.u32 d16, d16 @ encoding: [0x20,0x04,0xfb,0xf3]
4 vrecpe.u32 d16, d16
5 @ CHECK: vrecpe.u32 q8, q8 @ encoding: [0x60,0x04,0xfb,0xf3]
6 vrecpe.u32 q8, q8
7 @ CHECK: vrecpe.f32 d16, d16 @ encoding: [0x20,0x05,0xfb,0xf3]
8 vrecpe.f32 d16, d16
9 @ CHECK: vrecpe.f32 q8, q8 @ encoding: [0x60,0x05,0xfb,0xf3]
10 vrecpe.f32 q8, q8
|
| neont2-reciprocal-encoding.s | 5 @ CHECK: vrecpe.u32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x04]
6 vrecpe.u32 d16, d16
7 @ CHECK: vrecpe.u32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x04]
8 vrecpe.u32 q8, q8
9 @ CHECK: vrecpe.f32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x05]
10 vrecpe.f32 d16, d16
11 @ CHECK: vrecpe.f32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x05]
12 vrecpe.f32 q8, q8
|
| /external/arm-neon-tests/ |
| Android.mk | 39 vqrshrun_n vstX_lane vtbX vrecpe vrsqrte vcage vcagt vcale \
|
| ref_vrecpe.c | 35 #define TEST_MSG "VRECPE/VRECPEQ"
40 /* Basic test: y=vrecpe(x), then store the result. */
43 vrecpe##Q##_##T2##W(VECT_VAR(vector, T1, W, N)); \
|
| Makefile | 54 vqrshrun_n vstX_lane vtbX vrecpe vrsqrte vcage vcagt vcale \
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| armv8-2-fp16-simd.d | 89 134: f3b74508 vrecpe.f16 d4, d8
90 138: f3b78560 vrecpe.f16 q4, q8
93 144: f3b70564 vrecpe.f16 q0, q10
|
| armv8-2-fp16-simd-thumb.d | 89 134: ffb7 4508 vrecpe.f16 d4, d8
90 138: ffb7 8560 vrecpe.f16 q4, q8
93 144: ffb7 0564 vrecpe.f16 q0, q10
|
| armv8-2-fp16-simd.s | 89 .irp op, vrecpe.f16, vrsqrte.f16
|
| armv8-2-fp16-simd-warning.l | 79 [^:]*:198: Error: selected processor does not support fp16 instruction -- `vrecpe.f16 d4,d8'
80 [^:]*:198: Error: selected processor does not support fp16 instruction -- `vrecpe.f16 q4,q8'
|
| neon-cov.s | 641 binops vrecpe vrecpeq .u32
642 binops vrecpe vrecpeq .f32
|
| neon-cov.d | [all...] |
| /external/valgrind/none/tests/arm/ |
| neon128.stdout.exp | [all...] |
| /external/vixl/src/aarch32/ |
| assembler-aarch32.h | 5453 void vrecpe(DataType dt, DRegister rd, DRegister rm) { function in class:vixl::aarch32::Assembler
5458 void vrecpe(DataType dt, QRegister rd, QRegister rm) { function in class:vixl::aarch32::Assembler
[all...] |
| disasm-aarch32.h | [all...] |
| assembler-aarch32.cc | 23816 void Assembler::vrecpe(Condition cond, function in class:vixl::aarch32::Assembler
23848 void Assembler::vrecpe(Condition cond, function in class:vixl::aarch32::Assembler
[all...] |
| disasm-aarch32.cc | 6040 void Disassembler::vrecpe(Condition cond, function in class:vixl::aarch32::Disassembler
6049 void Disassembler::vrecpe(Condition cond, function in class:vixl::aarch32::Disassembler
[all...] |
| macro-assembler-aarch32.h | [all...] |
| /external/v8/src/arm/ |
| assembler-arm.h | [all...] |
| assembler-arm.cc | 4502 void Assembler::vrecpe(QwNeonRegister dst, QwNeonRegister src) { function in class:v8::internal::Assembler
[all...] |
