| /external/capstone/suite/MC/ARM/ |
| neon-reciprocal-encoding.s.cs | 8 0xa0,0x04,0xfb,0xf3 = vrsqrte.u32 d16, d16
9 0xe0,0x04,0xfb,0xf3 = vrsqrte.u32 q8, q8
10 0xa0,0x05,0xfb,0xf3 = vrsqrte.f32 d16, d16
11 0xe0,0x05,0xfb,0xf3 = vrsqrte.f32 q8, q8
|
| neont2-reciprocal-encoding.s.cs | 8 0xfb,0xff,0xa0,0x04 = vrsqrte.u32 d16, d16
9 0xfb,0xff,0xe0,0x04 = vrsqrte.u32 q8, q8
10 0xfb,0xff,0xa0,0x05 = vrsqrte.f32 d16, d16
11 0xfb,0xff,0xe0,0x05 = vrsqrte.f32 q8, q8
|
| /external/llvm/test/MC/ARM/ |
| neon-reciprocal-encoding.s | 15 @ CHECK: vrsqrte.u32 d16, d16 @ encoding: [0xa0,0x04,0xfb,0xf3]
16 vrsqrte.u32 d16, d16
17 @ CHECK: vrsqrte.u32 q8, q8 @ encoding: [0xe0,0x04,0xfb,0xf3]
18 vrsqrte.u32 q8, q8
19 @ CHECK: vrsqrte.f32 d16, d16 @ encoding: [0xa0,0x05,0xfb,0xf3]
20 vrsqrte.f32 d16, d16
21 @ CHECK: vrsqrte.f32 q8, q8 @ encoding: [0xe0,0x05,0xfb,0xf3]
22 vrsqrte.f32 q8, q8
|
| neont2-reciprocal-encoding.s | 17 @ CHECK: vrsqrte.u32 d16, d16 @ encoding: [0xfb,0xff,0xa0,0x04]
18 vrsqrte.u32 d16, d16
19 @ CHECK: vrsqrte.u32 q8, q8 @ encoding: [0xfb,0xff,0xe0,0x04]
20 vrsqrte.u32 q8, q8
21 @ CHECK: vrsqrte.f32 d16, d16 @ encoding: [0xfb,0xff,0xa0,0x05]
22 vrsqrte.f32 d16, d16
23 @ CHECK: vrsqrte.f32 q8, q8 @ encoding: [0xfb,0xff,0xe0,0x05]
24 vrsqrte.f32 q8, q8
|
| fullfp16-neon-neg.s | 175 vrsqrte.f16 d0, d1
176 vrsqrte.f16 q0, q1
|
| fullfp16-neon.s | 240 vrsqrte.f16 d0, d1
241 vrsqrte.f16 q0, q1
242 @ ARM: vrsqrte.f16 d0, d1 @ encoding: [0x81,0x05,0xb7,0xf3]
243 @ ARM: vrsqrte.f16 q0, q1 @ encoding: [0xc2,0x05,0xb7,0xf3]
244 @ THUMB: vrsqrte.f16 d0, d1 @ encoding: [0xb7,0xff,0x81,0x05]
245 @ THUMB: vrsqrte.f16 q0, q1 @ encoding: [0xb7,0xff,0xc2,0x05]
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| neon-reciprocal-encoding.s | 15 @ CHECK: vrsqrte.u32 d16, d16 @ encoding: [0xa0,0x04,0xfb,0xf3]
16 vrsqrte.u32 d16, d16
17 @ CHECK: vrsqrte.u32 q8, q8 @ encoding: [0xe0,0x04,0xfb,0xf3]
18 vrsqrte.u32 q8, q8
19 @ CHECK: vrsqrte.f32 d16, d16 @ encoding: [0xa0,0x05,0xfb,0xf3]
20 vrsqrte.f32 d16, d16
21 @ CHECK: vrsqrte.f32 q8, q8 @ encoding: [0xe0,0x05,0xfb,0xf3]
22 vrsqrte.f32 q8, q8
|
| neont2-reciprocal-encoding.s | 17 @ CHECK: vrsqrte.u32 d16, d16 @ encoding: [0xfb,0xff,0xa0,0x04]
18 vrsqrte.u32 d16, d16
19 @ CHECK: vrsqrte.u32 q8, q8 @ encoding: [0xfb,0xff,0xe0,0x04]
20 vrsqrte.u32 q8, q8
21 @ CHECK: vrsqrte.f32 d16, d16 @ encoding: [0xfb,0xff,0xa0,0x05]
22 vrsqrte.f32 d16, d16
23 @ CHECK: vrsqrte.f32 q8, q8 @ encoding: [0xfb,0xff,0xe0,0x05]
24 vrsqrte.f32 q8, q8
|
| /external/arm-neon-tests/ |
| Android.mk | 39 vqrshrun_n vstX_lane vtbX vrecpe vrsqrte vcage vcagt vcale \
|
| ref_vrsqrte.c | 35 #define TEST_MSG "VRSQRTE/VRSQRTEQ"
40 /* Basic test: y=vrsqrte(x), then store the result. */
43 vrsqrte##Q##_##T2##W(VECT_VAR(vector, T1, W, N)); \
|
| Makefile | 54 vqrshrun_n vstX_lane vtbX vrecpe vrsqrte vcage vcagt vcale \
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| armv8-2-fp16-simd.d | 91 13c: f3b74588 vrsqrte.f16 d4, d8
92 140: f3b785e0 vrsqrte.f16 q4, q8
94 148: f3b705e4 vrsqrte.f16 q0, q10
|
| armv8-2-fp16-simd-thumb.d | 91 13c: ffb7 4588 vrsqrte.f16 d4, d8
92 140: ffb7 85e0 vrsqrte.f16 q4, q8
94 148: ffb7 05e4 vrsqrte.f16 q0, q10
|
| armv8-2-fp16-simd.s | 89 .irp op, vrecpe.f16, vrsqrte.f16
|
| armv8-2-fp16-simd-warning.l | 81 [^:]*:198: Error: selected processor does not support fp16 instruction -- `vrsqrte.f16 d4,d8'
82 [^:]*:198: Error: selected processor does not support fp16 instruction -- `vrsqrte.f16 q4,q8'
|
| neon-cov.s | 643 binops vrsqrte vrsqrteq .u32
644 binops vrsqrte vrsqrteq .f32
|
| neon-cov.d | [all...] |
| /external/valgrind/none/tests/arm/ |
| neon128.stdout.exp | [all...] |
| /external/vixl/src/aarch32/ |
| assembler-aarch32.h | 5623 void vrsqrte(DataType dt, DRegister rd, DRegister rm) { function in class:vixl::aarch32::Assembler
5628 void vrsqrte(DataType dt, QRegister rd, QRegister rm) { function in class:vixl::aarch32::Assembler
[all...] |
| disasm-aarch32.h | [all...] |
| assembler-aarch32.cc | 24888 void Assembler::vrsqrte(Condition cond, function in class:vixl::aarch32::Assembler
24920 void Assembler::vrsqrte(Condition cond, function in class:vixl::aarch32::Assembler
[all...] |
| disasm-aarch32.cc | 6370 void Disassembler::vrsqrte(Condition cond, function in class:vixl::aarch32::Disassembler
6379 void Disassembler::vrsqrte(Condition cond, function in class:vixl::aarch32::Disassembler
[all...] |
| macro-assembler-aarch32.h | [all...] |
| /external/v8/src/arm/ |
| assembler-arm.h | [all...] |
| assembler-arm.cc | 4509 void Assembler::vrsqrte(QwNeonRegister dst, QwNeonRegister src) { function in class:v8::internal::Assembler
[all...] |
