/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
neon-shiftaccum-encoding.s | 67 @ CHECK: vsli.8 d17, d16, #7 @ encoding: [0x30,0x15,0xcf,0xf3] 68 vsli.8 d17, d16, #7 69 @ CHECK: vsli.16 d17, d16, #15 @ encoding: [0x30,0x15,0xdf,0xf3] 70 vsli.16 d17, d16, #15 71 @ CHECK: vsli.32 d17, d16, #31 @ encoding: [0x30,0x15,0xff,0xf3] 72 vsli.32 d17, d16, #31 73 @ CHECK: vsli.64 d17, d16, #63 @ encoding: [0xb0,0x15,0xff,0xf3] 74 vsli.64 d17, d16, #63 75 @ CHECK: vsli.8 q9, q8, #7 @ encoding: [0x70,0x25,0xcf,0xf3] 76 vsli.8 q9, q8, # [all...] |
neont2-shiftaccum-encoding.s | 69 @ CHECK: vsli.8 d17, d16, #7 @ encoding: [0xcf,0xff,0x30,0x15] 70 vsli.8 d17, d16, #7 71 @ CHECK: vsli.16 d17, d16, #15 @ encoding: [0xdf,0xff,0x30,0x15] 72 vsli.16 d17, d16, #15 73 @ CHECK: vsli.32 d17, d16, #31 @ encoding: [0xff,0xff,0x30,0x15] 74 vsli.32 d17, d16, #31 75 @ CHECK: vsli.64 d17, d16, #63 @ encoding: [0xff,0xff,0xb0,0x15] 76 vsli.64 d17, d16, #63 77 @ CHECK: vsli.8 q9, q8, #7 @ encoding: [0xcf,0xff,0x70,0x25] 78 vsli.8 q9, q8, # [all...] |
neon-shift-encoding.s | 116 @ CHECK: vsli.8 d16, d16, #7 @ encoding: [0x30,0x05,0xcf,0xf3] 117 vsli.8 d16, d16, #7 118 @ CHECK: vsli.16 d16, d16, #15 @ encoding: [0x30,0x05,0xdf,0xf3] 119 vsli.16 d16, d16, #15 120 @ CHECK: vsli.32 d16, d16, #31 @ encoding: [0x30,0x05,0xff,0xf3] 121 vsli.32 d16, d16, #31 122 @ CHECK: vsli.64 d16, d16, #63 @ encoding: [0xb0,0x05,0xff,0xf3] 123 vsli.64 d16, d16, #63 124 @ CHECK: vsli.8 q8, q8, #7 @ encoding: [0x70,0x05,0xcf,0xf3] 125 vsli.8 q8, q8, # [all...] |
/external/llvm/test/MC/ARM/ |
neon-shiftaccum-encoding.s | 142 vsli.8 d11, d12, #7 143 vsli.16 d12, d13, #15 144 vsli.32 d13, d14, #31 145 vsli.64 d14, d15, #63 146 vsli.8 q1, q8, #7 147 vsli.16 q2, q7, #15 148 vsli.32 q3, q4, #31 149 vsli.64 q4, q5, #63 160 vsli.8 d12, #7 161 vsli.16 d13, #1 [all...] |
neont2-shiftaccum-encoding.s | 145 vsli.8 d11, d12, #7 146 vsli.16 d12, d13, #15 147 vsli.32 d13, d14, #31 148 vsli.64 d14, d15, #63 149 vsli.8 q1, q8, #7 150 vsli.16 q2, q7, #15 151 vsli.32 q3, q4, #31 152 vsli.64 q4, q5, #63 163 vsli.8 d12, #7 164 vsli.16 d13, #1 [all...] |
neon-shift-encoding.s | 217 vsli.8 d16, d6, #7 218 vsli.16 d26, d18, #15 219 vsli.32 d11, d10, #31 220 vsli.64 d12, d19, #63 221 vsli.8 q1, q8, #7 222 vsli.16 q2, q7, #15 223 vsli.32 q3, q6, #31 224 vsli.64 q4, q5, #63 226 vsli.8 d16, #7 227 vsli.16 d15, #1 [all...] |
/system/core/libpixelflinger/ |
col32cb16blend_neon.S | 102 vsli.u16 q10, q9, #5 // shift & insert green0 into blue0 104 vsli.u16 q10, q8, #11 // shift & insert red0 into blue0 108 vsli.u16 q11, q12, #5 // shift & insert green1 into blue1 109 vsli.u16 q11, q13, #11 // shift & insert red1 into blue1
|
/external/capstone/suite/MC/ARM/ |
neon-shift-encoding.s.cs | 98 0x16,0x05,0xcf,0xf3 = vsli.8 d16, d6, #7 99 0x32,0xa5,0xdf,0xf3 = vsli.16 d26, d18, #15 100 0x1a,0xb5,0xbf,0xf3 = vsli.32 d11, d10, #31 101 0xb3,0xc5,0xbf,0xf3 = vsli.64 d12, d19, #63 102 0x70,0x25,0x8f,0xf3 = vsli.8 q1, q8, #7 103 0x5e,0x45,0x9f,0xf3 = vsli.16 q2, q7, #15 104 0x5c,0x65,0xbf,0xf3 = vsli.32 q3, q6, #31 105 0xda,0x85,0xbf,0xf3 = vsli.64 q4, q5, #63 106 0x30,0x05,0xcf,0xf3 = vsli.8 d16, d16, #7 107 0x1f,0xf5,0x9f,0xf3 = vsli.16 d15, d15, #1 [all...] |
/external/boringssl/src/crypto/fipsmodule/sha/asm/ |
sha512-armv4.pl | 538 vsli.64 $t0,$e,#`64-@Sigma1[0]` 539 vsli.64 $t1,$e,#`64-@Sigma1[1]` 541 vsli.64 $t2,$e,#`64-@Sigma1[2]` 551 vsli.64 $t0,$a,#`64-@Sigma0[0]` 555 vsli.64 $t1,$a,#`64-@Sigma0[1]` 557 vsli.64 $t2,$a,#`64-@Sigma0[2]` 584 vsli.64 $t0,@X[($i+7)%8],#`64-@sigma1[0]` 586 vsli.64 $t1,@X[($i+7)%8],#`64-@sigma1[1]` 593 vsli.64 $t0,$s0,#`64-@sigma0[0]` 594 vsli.64 $t1,$s0,#`64-@sigma0[1] [all...] |
/external/arm-neon-tests/ |
ref_vsli_n.c | 26 #define INSN_NAME vsli
|
ref_vsXi_n.c | 35 #define INSN_NAME vsli
|
/toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
neon-omit.s | 50 vsli.16 q2,#5 95 vsli.16 q2,q3,#5
|
neon-omit.d | 51 0[0-9a-f]+ <[^>]+> f3954554 vsli\.16 q2, q2, #5 93 0[0-9a-f]+ <[^>]+> f3954556 vsli\.16 q2, q3, #5
|
neon-cov.s | 346 regs2i_1 vsli vsliq 0 .8 347 regs2i_1 vsli vsliq 0 .16 348 regs2i_1 vsli vsliq 0 .32 349 regs2i_1 vsli vsliq 0 .64
|
neon-cov.d | [all...] |
/external/boringssl/ios-arm/crypto/chacha/ |
chacha-armv4.S | 904 vsli.32 q1,q12,#12 906 vsli.32 q5,q13,#12 908 vsli.32 q9,q14,#12 928 vsli.32 q3,q12,#8 930 vsli.32 q7,q13,#8 932 vsli.32 q11,q14,#8 952 vsli.32 q1,q12,#7 954 vsli.32 q5,q13,#7 956 vsli.32 q9,q14,#7 1012 vsli.32 q1,q12,#1 [all...] |
/external/boringssl/linux-arm/crypto/chacha/ |
chacha-armv4.S | 901 vsli.32 q1,q12,#12 903 vsli.32 q5,q13,#12 905 vsli.32 q9,q14,#12 925 vsli.32 q3,q12,#8 927 vsli.32 q7,q13,#8 929 vsli.32 q11,q14,#8 949 vsli.32 q1,q12,#7 951 vsli.32 q5,q13,#7 953 vsli.32 q9,q14,#7 1009 vsli.32 q1,q12,#1 [all...] |
/external/boringssl/ios-arm/crypto/fipsmodule/ |
sha1-armv4-large.S | 744 vsli.32 q0,q12,#2 784 vsli.32 q1,q12,#2 821 vsli.32 q2,q12,#2 857 vsli.32 q3,q12,#2 894 vsli.32 q8,q12,#2 930 vsli.32 q9,q12,#2 966 vsli.32 q10,q12,#2 1011 vsli.32 q11,q12,#2 1056 vsli.32 q0,q12,#2 1100 vsli.32 q1,q12,# [all...] |
/external/boringssl/linux-arm/crypto/fipsmodule/ |
sha1-armv4-large.S | 741 vsli.32 q0,q12,#2 781 vsli.32 q1,q12,#2 818 vsli.32 q2,q12,#2 854 vsli.32 q3,q12,#2 891 vsli.32 q8,q12,#2 927 vsli.32 q9,q12,#2 963 vsli.32 q10,q12,#2 1008 vsli.32 q11,q12,#2 1053 vsli.32 q0,q12,#2 1097 vsli.32 q1,q12,# [all...] |
/external/libavc/common/arm/ |
ih264_deblk_chroma_a9.s | 293 vsli.16 q7, q7, #8 @ 416 vsli.u16 d10, d10, #8 418 vsli.u32 q5, q5, #16 620 vsli.u16 d22, d22, #8 [all...] |
ih264_deblk_luma_a9.s | 121 vsli.32 q7, q7, #8 @ 127 vsli.32 q7, q7, #16 @Q7 = C0 423 vsli.32 q8, q8, #8 @ 427 vsli.32 q8, q8, #16 @Q8 = C0 [all...] |
/external/valgrind/none/tests/arm/ |
neon128.stdout.exp | [all...] |
neon64.stdout.exp | [all...] |
/external/libavc/encoder/arm/ |
ime_distortion_metrics_a9q.s | 937 vsli.64 d10, d22, #32 938 vsli.64 d14, d18, #32 [all...] |
/external/vixl/src/aarch32/ |
assembler-aarch32.h | 5743 void vsli(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { function in class:vixl::aarch32::Assembler 5752 void vsli(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { function in class:vixl::aarch32::Assembler [all...] |