| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| neon-shiftaccum-encoding.s | 3 @ CHECK: vsra.s8 d17, d16, #8 @ encoding: [0x30,0x11,0xc8,0xf2]
4 vsra.s8 d17, d16, #8
5 @ CHECK: vsra.s16 d17, d16, #16 @ encoding: [0x30,0x11,0xd0,0xf2]
6 vsra.s16 d17, d16, #16
7 @ CHECK: vsra.s32 d17, d16, #32 @ encoding: [0x30,0x11,0xe0,0xf2]
8 vsra.s32 d17, d16, #32
9 @ CHECK: vsra.s64 d17, d16, #64 @ encoding: [0xb0,0x11,0xc0,0xf2]
10 vsra.s64 d17, d16, #64
11 @ CHECK: vsra.s8 q8, q9, #8 @ encoding: [0x72,0x01,0xc8,0xf2]
12 vsra.s8 q8, q9, #
[all...] |
| neont2-shiftaccum-encoding.s | 5 @ CHECK: vsra.s8 d17, d16, #8 @ encoding: [0xc8,0xef,0x30,0x11]
6 vsra.s8 d17, d16, #8
7 @ CHECK: vsra.s16 d17, d16, #16 @ encoding: [0xd0,0xef,0x30,0x11]
8 vsra.s16 d17, d16, #16
9 @ CHECK: vsra.s32 d17, d16, #32 @ encoding: [0xe0,0xef,0x30,0x11]
10 vsra.s32 d17, d16, #32
11 @ CHECK: vsra.s64 d17, d16, #64 @ encoding: [0xc0,0xef,0xb0,0x11]
12 vsra.s64 d17, d16, #64
13 @ CHECK: vsra.s8 q8, q9, #8 @ encoding: [0xc8,0xef,0x72,0x01]
14 vsra.s8 q8, q9, #
[all...] |
| neon-shift-encoding.s | 68 @ CHECK: vsra.u8 d16, d16, #7 @ encoding: [0x30,0x01,0xc9,0xf3]
69 vsra.u8 d16, d16, #7
70 @ CHECK: vsra.u16 d16, d16, #15 @ encoding: [0x30,0x01,0xd1,0xf3]
71 vsra.u16 d16, d16, #15
72 @ CHECK: vsra.u32 d16, d16, #31 @ encoding: [0x30,0x01,0xe1,0xf3]
73 vsra.u32 d16, d16, #31
74 @ CHECK: vsra.u64 d16, d16, #63 @ encoding: [0xb0,0x01,0xc1,0xf3]
75 vsra.u64 d16, d16, #63
76 @ CHECK: vsra.u8 q8, q8, #7 @ encoding: [0x70,0x01,0xc9,0xf3]
77 vsra.u8 q8, q8, #
[all...] |
| /external/llvm/test/MC/ARM/ |
| neon-shiftaccum-encoding.s | 3 vsra.s8 d17, d16, #8
4 vsra.s16 d15, d14, #16
5 vsra.s32 d13, d12, #32
6 vsra.s64 d11, d10, #64
7 vsra.s8 q7, q2, #8
8 vsra.s16 q3, q6, #16
9 vsra.s32 q9, q5, #32
10 vsra.s64 q8, q4, #64
11 vsra.u8 d17, d16, #8
12 vsra.u16 d11, d14, #1
[all...] |
| neont2-shiftaccum-encoding.s | 5 vsra.s8 d17, d16, #8
6 vsra.s16 d15, d14, #16
7 vsra.s32 d13, d12, #32
8 vsra.s64 d11, d10, #64
9 vsra.s8 q7, q2, #8
10 vsra.s16 q3, q6, #16
11 vsra.s32 q9, q5, #32
12 vsra.s64 q8, q4, #64
13 vsra.u8 d17, d16, #8
14 vsra.u16 d11, d14, #1
[all...] |
| neon-shift-encoding.s | 109 vsra.s8 d16, d6, #7
110 vsra.s16 d26, d18, #15
111 vsra.s32 d11, d10, #31
112 vsra.s64 d12, d19, #63
113 vsra.s8 q1, q8, #7
114 vsra.s16 q2, q7, #15
115 vsra.s32 q3, q6, #31
116 vsra.s64 q4, q5, #63
118 vsra.s8 d16, #7
119 vsra.s16 d15, #1
[all...] |
| /external/capstone/suite/MC/ARM/ |
| neon-shift-encoding.s.cs | 50 0x16,0x01,0xc9,0xf2 = vsra.s8 d16, d6, #7
51 0x32,0xa1,0xd1,0xf2 = vsra.s16 d26, d18, #15
52 0x1a,0xb1,0xa1,0xf2 = vsra.s32 d11, d10, #31
53 0xb3,0xc1,0x81,0xf2 = vsra.s64 d12, d19, #63
54 0x70,0x21,0x89,0xf2 = vsra.s8 q1, q8, #7
55 0x5e,0x41,0x91,0xf2 = vsra.s16 q2, q7, #15
56 0x5c,0x61,0xa1,0xf2 = vsra.s32 q3, q6, #31
57 0xda,0x81,0x81,0xf2 = vsra.s64 q4, q5, #63
58 0x30,0x01,0xc9,0xf2 = vsra.s8 d16, d16, #7
59 0x1f,0xf1,0x91,0xf2 = vsra.s16 d15, d15, #1
[all...] |
| /frameworks/rs/cpu_ref/ |
| rsCpuIntrinsics_neon_3DLUT.S | 159 vsra.u16 q0, q0, #8
160 vsra.u16 q1, q1, #8
161 vsra.u16 q2, q2, #8
|
| /external/arm-neon-tests/ |
| ref_vsra_n.c | 40 vsra##Q##_n_##T2##W(VECT_VAR(vector, T1, W, N), \
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| neon-omit.s | 48 vsra.u16 q3,#6
93 vsra.u16 q3,q1,#6
|
| neon-omit.d | 49 0[0-9a-f]+ <[^>]+> f39a6156 vsra\.u16 q3, q3, #6
91 0[0-9a-f]+ <[^>]+> f39a6152 vsra\.u16 q3, q1, #6
|
| neon-cov.d | [all...] |
| neon-cov.s | 343 rshift_imm vsra vsraq
|
| /external/libavc/common/arm/ |
| ih264_iquant_itrans_recon_a9.s | 616 vsra.s16 q2, q6, #0x1 @ Q2 = y6
658 vsra.s16 q6, q9, #0x2 @ Q6 = z3
689 vsra.s16 q9, q7, #0x2 @ Q9 = z1
735 vsra.s16 q2, q6, #0x1 @ Q2 = y6
780 vsra.s16 q6, q9, #0x2 @ Q6 = z3
810 vsra.s16 q9, q7, #0x2 @ Q9 = z1
[all...] |
| ih264_deblk_luma_a9.s | 254 vsra.u8 q10, q0, #2 @((Alpha >> 2) + 2)
681 vsra.u8 q14, q15, #2 @alpha >>2 +2
[all...] |
| /external/valgrind/none/tests/arm/ |
| neon128.stdout.exp | [all...] |
| neon64.stdout.exp | [all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/s390/ |
| zarch-z13.s | 343 vsra %v15,%v17,%v20
|
| zarch-z13.d | 349 .*: e7 f1 40 00 06 7e [ ]*vsra %v15,%v17,%v20
[all...] |
| /external/vixl/src/aarch32/ |
| assembler-aarch32.h | 5767 void vsra(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { function in class:vixl::aarch32::Assembler
5776 void vsra(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { function in class:vixl::aarch32::Assembler
[all...] |
| disasm-aarch32.h | [all...] |
| assembler-aarch32.cc | 25792 void Assembler::vsra(Condition cond, function in class:vixl::aarch32::Assembler
25834 void Assembler::vsra(Condition cond, function in class:vixl::aarch32::Assembler
[all...] |
| /external/llvm/test/MC/SystemZ/ |
| insn-bad-zEC12.s | [all...] |
| insn-good-z13.s | [all...] |
| /external/v8/src/s390/ |
| constants-s390.h | [all...] |
