| /device/linaro/bootloader/arm-trusted-firmware/include/lib/aarch64/ |
| smcc_helpers.h | 20 write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X0), (_x0)); \
24 write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X1), (_x1)); \
28 write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X2), (_x2)); \
32 write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X3), (_x3)); \
36 write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X4), (_x4)); \
40 write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X5), (_x5)); \
44 write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X6), (_x6)); \
48 write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X7), (_x7)); \
59 write_ctx_reg((get_gpregs_ctx(_h)), (_g), (_v))
68 write_ctx_reg((get_el3state_ctx(_h)), (_e), (_v)
[all...] |
| /device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/common/ |
| tegra_fiq_glue.c | 63 write_ctx_reg((el3state_ctx), (uint32_t)(CTX_ELR_EL3), (ns_fiq_handler_addr));
129 write_ctx_reg((gpregs_ctx), (uint32_t)(CTX_GPREG_X0), (fiq_state[cpu].elr_el3));
130 write_ctx_reg((gpregs_ctx), (uint32_t)(CTX_GPREG_X1), (fiq_state[cpu].spsr_el3));
133 write_ctx_reg((gpregs_ctx), (uint32_t)(CTX_GPREG_X2), (val));
136 write_ctx_reg((gpregs_ctx), (uint32_t)(CTX_GPREG_X3), (val));
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/drivers/mce/ |
| mce.c | 196 write_ctx_reg((gp_regs), (uint32_t)(CTX_GPREG_X4), (0));
197 write_ctx_reg((gp_regs), (uint32_t)(CTX_GPREG_X5), (0));
198 write_ctx_reg((gp_regs), (uint32_t)(CTX_GPREG_X6), (0));
215 write_ctx_reg((gp_regs), (uint32_t)(CTX_GPREG_X1), (ret64));
216 write_ctx_reg((gp_regs), (uint32_t)(CTX_GPREG_X2), (ret64));
237 write_ctx_reg((gp_regs), (uint32_t)(CTX_GPREG_X1),
250 write_ctx_reg((gp_regs), (uint32_t)(CTX_GPREG_X1),
252 write_ctx_reg((gp_regs), (uint32_t)(CTX_GPREG_X3),
278 write_ctx_reg((gp_regs), (uint32_t)(CTX_GPREG_X1),
280 write_ctx_reg((gp_regs), (uint32_t)(CTX_GPREG_X2)
[all...] |
| /device/linaro/bootloader/arm-trusted-firmware/services/spd/tlkd/ |
| tlkd_pm.c | 53 write_ctx_reg(gp_regs, CTX_GPREG_X0, TLK_SYSTEM_SUSPEND);
86 write_ctx_reg(gp_regs, CTX_GPREG_X0, TLK_SYSTEM_RESUME);
113 write_ctx_reg(gp_regs, CTX_GPREG_X0, TLK_SYSTEM_OFF);
|
| tlkd_main.c | 260 write_ctx_reg(gp_regs, CTX_GPREG_X4, (uint32_t)x2);
261 write_ctx_reg(gp_regs, CTX_GPREG_X5, (uint32_t)(x2 >> 32));
262 write_ctx_reg(gp_regs, CTX_GPREG_X6, (uint32_t)x3);
263 write_ctx_reg(gp_regs, CTX_GPREG_X7, (uint32_t)(x3 >> 32));
|
| /device/linaro/bootloader/arm-trusted-firmware/lib/el3_runtime/aarch32/ |
| context_mgmt.c | 101 write_ctx_reg(reg_ctx, CTX_NS_SCTLR, sctlr);
116 write_ctx_reg(reg_ctx, CTX_SCR, scr);
117 write_ctx_reg(reg_ctx, CTX_LR, ep->pc);
118 write_ctx_reg(reg_ctx, CTX_SPSR, ep->spsr);
|
| /device/linaro/bootloader/arm-trusted-firmware/lib/el3_runtime/aarch64/ |
| context_mgmt.c | 171 write_ctx_reg(get_sysregs_ctx(ctx), CTX_SCTLR_EL1, sctlr_elx);
194 write_ctx_reg(get_sysregs_ctx(ctx), CTX_PMCR_EL0, pmcr_el0);
199 write_ctx_reg(state, CTX_SCR_EL3, scr_el3);
200 write_ctx_reg(state, CTX_ELR_EL3, ep->pc);
201 write_ctx_reg(state, CTX_SPSR_EL3, ep->spsr);
483 write_ctx_reg(state, CTX_ELR_EL3, entrypoint);
501 write_ctx_reg(state, CTX_ELR_EL3, entrypoint);
502 write_ctx_reg(state, CTX_SPSR_EL3, spsr);
535 write_ctx_reg(state, CTX_SCR_EL3, scr_el3);
|
| /device/linaro/bootloader/arm-trusted-firmware/include/lib/el3_runtime/aarch64/ |
| context.h | 227 #define write_ctx_reg(ctx, offset, val) (((ctx)->_regs[offset >> DWORD_SHIFT]) \ macro
277 write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X0, x0); \
280 write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X1, x1); \
284 write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X2, x2); \
288 write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X3, x3); \
292 write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X4, x4); \
296 write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X5, x5); \
300 write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X6, x6); \
304 write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X7, x7); \
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/ |
| plat_sip_calls.c | 111 write_ctx_reg(get_gpregs_ctx(handle), CTX_GPREG_X0,
168 write_ctx_reg(get_gpregs_ctx(handle), CTX_GPREG_X1,
170 write_ctx_reg(get_gpregs_ctx(handle), CTX_GPREG_X2,
|
| /device/linaro/bootloader/arm-trusted-firmware/include/lib/el3_runtime/aarch32/ |
| context.h | 48 #define write_ctx_reg(ctx, offset, val) (((ctx)->_regs[offset >> WORD_SHIFT]) \ macro
|
| /device/linaro/bootloader/arm-trusted-firmware/services/spd/opteed/ |
| opteed_main.c | 248 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx),
252 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx),
256 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx),
261 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx),
|
| opteed_pm.c | 136 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx),
|
| /device/linaro/bootloader/arm-trusted-firmware/services/spd/tspd/ |
| tspd_pm.c | 158 write_ctx_reg(get_gpregs_ctx(&tsp_ctx->cpu_ctx),
|
| /device/linaro/bootloader/arm-trusted-firmware/services/spd/trusty/ |
| trusty.c | 156 write_ctx_reg(get_sysregs_ctx(handle), CTX_SP_EL1, ctx->fiq_handler_sp);
215 write_ctx_reg(get_sysregs_ctx(handle), CTX_SP_EL1, ctx->fiq_sp_el1);
|
