1 /* 2 * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 8 /******************************************************************************* 9 * This is the Secure Payload Dispatcher (SPD). The dispatcher is meant to be a 10 * plug-in component to the Secure Monitor, registered as a runtime service. The 11 * SPD is expected to be a functional extension of the Secure Payload (SP) that 12 * executes in Secure EL1. The Secure Monitor will delegate all SMCs targeting 13 * the Trusted OS/Applications range to the dispatcher. The SPD will either 14 * handle the request locally or delegate it to the Secure Payload. It is also 15 * responsible for initialising and maintaining communication with the SP. 16 ******************************************************************************/ 17 #include <arch_helpers.h> 18 #include <assert.h> 19 #include <bl31.h> 20 #include <bl_common.h> 21 #include <context_mgmt.h> 22 #include <debug.h> 23 #include <errno.h> 24 #include <platform.h> 25 #include <runtime_svc.h> 26 #include <stddef.h> 27 #include <uuid.h> 28 #include "opteed_private.h" 29 #include "teesmc_opteed.h" 30 #include "teesmc_opteed_macros.h" 31 32 33 /******************************************************************************* 34 * Address of the entrypoint vector table in OPTEE. It is 35 * initialised once on the primary core after a cold boot. 36 ******************************************************************************/ 37 optee_vectors_t *optee_vectors; 38 39 /******************************************************************************* 40 * Array to keep track of per-cpu OPTEE state 41 ******************************************************************************/ 42 optee_context_t opteed_sp_context[OPTEED_CORE_COUNT]; 43 uint32_t opteed_rw; 44 45 static int32_t opteed_init(void); 46 47 /******************************************************************************* 48 * This function is the handler registered for S-EL1 interrupts by the 49 * OPTEED. It validates the interrupt and upon success arranges entry into 50 * the OPTEE at 'optee_fiq_entry()' for handling the interrupt. 51 ******************************************************************************/ 52 static uint64_t opteed_sel1_interrupt_handler(uint32_t id, 53 uint32_t flags, 54 void *handle, 55 void *cookie) 56 { 57 uint32_t linear_id; 58 optee_context_t *optee_ctx; 59 60 /* Check the security state when the exception was generated */ 61 assert(get_interrupt_src_ss(flags) == NON_SECURE); 62 63 /* Sanity check the pointer to this cpu's context */ 64 assert(handle == cm_get_context(NON_SECURE)); 65 66 /* Save the non-secure context before entering the OPTEE */ 67 cm_el1_sysregs_context_save(NON_SECURE); 68 69 /* Get a reference to this cpu's OPTEE context */ 70 linear_id = plat_my_core_pos(); 71 optee_ctx = &opteed_sp_context[linear_id]; 72 assert(&optee_ctx->cpu_ctx == cm_get_context(SECURE)); 73 74 cm_set_elr_el3(SECURE, (uint64_t)&optee_vectors->fiq_entry); 75 cm_el1_sysregs_context_restore(SECURE); 76 cm_set_next_eret_context(SECURE); 77 78 /* 79 * Tell the OPTEE that it has to handle an FIQ (synchronously). 80 * Also the instruction in normal world where the interrupt was 81 * generated is passed for debugging purposes. It is safe to 82 * retrieve this address from ELR_EL3 as the secure context will 83 * not take effect until el3_exit(). 84 */ 85 SMC_RET1(&optee_ctx->cpu_ctx, read_elr_el3()); 86 } 87 88 /******************************************************************************* 89 * OPTEE Dispatcher setup. The OPTEED finds out the OPTEE entrypoint and type 90 * (aarch32/aarch64) if not already known and initialises the context for entry 91 * into OPTEE for its initialization. 92 ******************************************************************************/ 93 int32_t opteed_setup(void) 94 { 95 entry_point_info_t *optee_ep_info; 96 uint32_t linear_id; 97 uint64_t opteed_pageable_part; 98 uint64_t opteed_mem_limit; 99 uint64_t dt_addr; 100 101 linear_id = plat_my_core_pos(); 102 103 /* 104 * Get information about the Secure Payload (BL32) image. Its 105 * absence is a critical failure. TODO: Add support to 106 * conditionally include the SPD service 107 */ 108 optee_ep_info = bl31_plat_get_next_image_ep_info(SECURE); 109 if (!optee_ep_info) { 110 WARN("No OPTEE provided by BL2 boot loader, Booting device" 111 " without OPTEE initialization. SMC`s destined for OPTEE" 112 " will return SMC_UNK\n"); 113 return 1; 114 } 115 116 /* 117 * If there's no valid entry point for SP, we return a non-zero value 118 * signalling failure initializing the service. We bail out without 119 * registering any handlers 120 */ 121 if (!optee_ep_info->pc) 122 return 1; 123 124 opteed_rw = optee_ep_info->args.arg0; 125 opteed_pageable_part = optee_ep_info->args.arg1; 126 opteed_mem_limit = optee_ep_info->args.arg2; 127 dt_addr = optee_ep_info->args.arg3; 128 129 opteed_init_optee_ep_state(optee_ep_info, 130 opteed_rw, 131 optee_ep_info->pc, 132 opteed_pageable_part, 133 opteed_mem_limit, 134 dt_addr, 135 &opteed_sp_context[linear_id]); 136 137 /* 138 * All OPTEED initialization done. Now register our init function with 139 * BL31 for deferred invocation 140 */ 141 bl31_register_bl32_init(&opteed_init); 142 143 return 0; 144 } 145 146 /******************************************************************************* 147 * This function passes control to the OPTEE image (BL32) for the first time 148 * on the primary cpu after a cold boot. It assumes that a valid secure 149 * context has already been created by opteed_setup() which can be directly 150 * used. It also assumes that a valid non-secure context has been 151 * initialised by PSCI so it does not need to save and restore any 152 * non-secure state. This function performs a synchronous entry into 153 * OPTEE. OPTEE passes control back to this routine through a SMC. 154 ******************************************************************************/ 155 static int32_t opteed_init(void) 156 { 157 uint32_t linear_id = plat_my_core_pos(); 158 optee_context_t *optee_ctx = &opteed_sp_context[linear_id]; 159 entry_point_info_t *optee_entry_point; 160 uint64_t rc; 161 162 /* 163 * Get information about the OPTEE (BL32) image. Its 164 * absence is a critical failure. 165 */ 166 optee_entry_point = bl31_plat_get_next_image_ep_info(SECURE); 167 assert(optee_entry_point); 168 169 cm_init_my_context(optee_entry_point); 170 171 /* 172 * Arrange for an entry into OPTEE. It will be returned via 173 * OPTEE_ENTRY_DONE case 174 */ 175 rc = opteed_synchronous_sp_entry(optee_ctx); 176 assert(rc != 0); 177 178 return rc; 179 } 180 181 182 /******************************************************************************* 183 * This function is responsible for handling all SMCs in the Trusted OS/App 184 * range from the non-secure state as defined in the SMC Calling Convention 185 * Document. It is also responsible for communicating with the Secure 186 * payload to delegate work and return results back to the non-secure 187 * state. Lastly it will also return any information that OPTEE needs to do 188 * the work assigned to it. 189 ******************************************************************************/ 190 uint64_t opteed_smc_handler(uint32_t smc_fid, 191 uint64_t x1, 192 uint64_t x2, 193 uint64_t x3, 194 uint64_t x4, 195 void *cookie, 196 void *handle, 197 uint64_t flags) 198 { 199 cpu_context_t *ns_cpu_context; 200 uint32_t linear_id = plat_my_core_pos(); 201 optee_context_t *optee_ctx = &opteed_sp_context[linear_id]; 202 uint64_t rc; 203 204 /* 205 * Determine which security state this SMC originated from 206 */ 207 208 if (is_caller_non_secure(flags)) { 209 /* 210 * This is a fresh request from the non-secure client. 211 * The parameters are in x1 and x2. Figure out which 212 * registers need to be preserved, save the non-secure 213 * state and send the request to the secure payload. 214 */ 215 assert(handle == cm_get_context(NON_SECURE)); 216 217 cm_el1_sysregs_context_save(NON_SECURE); 218 219 /* 220 * We are done stashing the non-secure context. Ask the 221 * OPTEE to do the work now. 222 */ 223 224 /* 225 * Verify if there is a valid context to use, copy the 226 * operation type and parameters to the secure context 227 * and jump to the fast smc entry point in the secure 228 * payload. Entry into S-EL1 will take place upon exit 229 * from this function. 230 */ 231 assert(&optee_ctx->cpu_ctx == cm_get_context(SECURE)); 232 233 /* Set appropriate entry for SMC. 234 * We expect OPTEE to manage the PSTATE.I and PSTATE.F 235 * flags as appropriate. 236 */ 237 if (GET_SMC_TYPE(smc_fid) == SMC_TYPE_FAST) { 238 cm_set_elr_el3(SECURE, (uint64_t) 239 &optee_vectors->fast_smc_entry); 240 } else { 241 cm_set_elr_el3(SECURE, (uint64_t) 242 &optee_vectors->yield_smc_entry); 243 } 244 245 cm_el1_sysregs_context_restore(SECURE); 246 cm_set_next_eret_context(SECURE); 247 248 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx), 249 CTX_GPREG_X4, 250 read_ctx_reg(get_gpregs_ctx(handle), 251 CTX_GPREG_X4)); 252 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx), 253 CTX_GPREG_X5, 254 read_ctx_reg(get_gpregs_ctx(handle), 255 CTX_GPREG_X5)); 256 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx), 257 CTX_GPREG_X6, 258 read_ctx_reg(get_gpregs_ctx(handle), 259 CTX_GPREG_X6)); 260 /* Propagate hypervisor client ID */ 261 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx), 262 CTX_GPREG_X7, 263 read_ctx_reg(get_gpregs_ctx(handle), 264 CTX_GPREG_X7)); 265 266 SMC_RET4(&optee_ctx->cpu_ctx, smc_fid, x1, x2, x3); 267 } 268 269 /* 270 * Returning from OPTEE 271 */ 272 273 switch (smc_fid) { 274 /* 275 * OPTEE has finished initialising itself after a cold boot 276 */ 277 case TEESMC_OPTEED_RETURN_ENTRY_DONE: 278 /* 279 * Stash the OPTEE entry points information. This is done 280 * only once on the primary cpu 281 */ 282 assert(optee_vectors == NULL); 283 optee_vectors = (optee_vectors_t *) x1; 284 285 if (optee_vectors) { 286 set_optee_pstate(optee_ctx->state, OPTEE_PSTATE_ON); 287 288 /* 289 * OPTEE has been successfully initialized. 290 * Register power management hooks with PSCI 291 */ 292 psci_register_spd_pm_hook(&opteed_pm); 293 294 /* 295 * Register an interrupt handler for S-EL1 interrupts 296 * when generated during code executing in the 297 * non-secure state. 298 */ 299 flags = 0; 300 set_interrupt_rm_flag(flags, NON_SECURE); 301 rc = register_interrupt_type_handler(INTR_TYPE_S_EL1, 302 opteed_sel1_interrupt_handler, 303 flags); 304 if (rc) 305 panic(); 306 } 307 308 /* 309 * OPTEE reports completion. The OPTEED must have initiated 310 * the original request through a synchronous entry into 311 * OPTEE. Jump back to the original C runtime context. 312 */ 313 opteed_synchronous_sp_exit(optee_ctx, x1); 314 315 316 /* 317 * These function IDs is used only by OP-TEE to indicate it has 318 * finished: 319 * 1. turning itself on in response to an earlier psci 320 * cpu_on request 321 * 2. resuming itself after an earlier psci cpu_suspend 322 * request. 323 */ 324 case TEESMC_OPTEED_RETURN_ON_DONE: 325 case TEESMC_OPTEED_RETURN_RESUME_DONE: 326 327 328 /* 329 * These function IDs is used only by the SP to indicate it has 330 * finished: 331 * 1. suspending itself after an earlier psci cpu_suspend 332 * request. 333 * 2. turning itself off in response to an earlier psci 334 * cpu_off request. 335 */ 336 case TEESMC_OPTEED_RETURN_OFF_DONE: 337 case TEESMC_OPTEED_RETURN_SUSPEND_DONE: 338 case TEESMC_OPTEED_RETURN_SYSTEM_OFF_DONE: 339 case TEESMC_OPTEED_RETURN_SYSTEM_RESET_DONE: 340 341 /* 342 * OPTEE reports completion. The OPTEED must have initiated the 343 * original request through a synchronous entry into OPTEE. 344 * Jump back to the original C runtime context, and pass x1 as 345 * return value to the caller 346 */ 347 opteed_synchronous_sp_exit(optee_ctx, x1); 348 349 /* 350 * OPTEE is returning from a call or being preempted from a call, in 351 * either case execution should resume in the normal world. 352 */ 353 case TEESMC_OPTEED_RETURN_CALL_DONE: 354 /* 355 * This is the result from the secure client of an 356 * earlier request. The results are in x0-x3. Copy it 357 * into the non-secure context, save the secure state 358 * and return to the non-secure state. 359 */ 360 assert(handle == cm_get_context(SECURE)); 361 cm_el1_sysregs_context_save(SECURE); 362 363 /* Get a reference to the non-secure context */ 364 ns_cpu_context = cm_get_context(NON_SECURE); 365 assert(ns_cpu_context); 366 367 /* Restore non-secure state */ 368 cm_el1_sysregs_context_restore(NON_SECURE); 369 cm_set_next_eret_context(NON_SECURE); 370 371 SMC_RET4(ns_cpu_context, x1, x2, x3, x4); 372 373 /* 374 * OPTEE has finished handling a S-EL1 FIQ interrupt. Execution 375 * should resume in the normal world. 376 */ 377 case TEESMC_OPTEED_RETURN_FIQ_DONE: 378 /* Get a reference to the non-secure context */ 379 ns_cpu_context = cm_get_context(NON_SECURE); 380 assert(ns_cpu_context); 381 382 /* 383 * Restore non-secure state. There is no need to save the 384 * secure system register context since OPTEE was supposed 385 * to preserve it during S-EL1 interrupt handling. 386 */ 387 cm_el1_sysregs_context_restore(NON_SECURE); 388 cm_set_next_eret_context(NON_SECURE); 389 390 SMC_RET0((uint64_t) ns_cpu_context); 391 392 default: 393 panic(); 394 } 395 } 396 397 /* Define an OPTEED runtime service descriptor for fast SMC calls */ 398 DECLARE_RT_SVC( 399 opteed_fast, 400 401 OEN_TOS_START, 402 OEN_TOS_END, 403 SMC_TYPE_FAST, 404 opteed_setup, 405 opteed_smc_handler 406 ); 407 408 /* Define an OPTEED runtime service descriptor for yielding SMC calls */ 409 DECLARE_RT_SVC( 410 opteed_std, 411 412 OEN_TOS_START, 413 OEN_TOS_END, 414 SMC_TYPE_YIELD, 415 NULL, 416 opteed_smc_handler 417 ); 418
