| /prebuilts/clang/host/linux-x86/clang-4691093/include/llvm/MC/ |
| MCFragment.h | 172 SmallVector<char, ContentsSize> Contents;
181 SmallVectorImpl<char> &getContents() { return Contents; }
182 const SmallVectorImpl<char> &getContents() const { return Contents; }
390 SmallString<8> Contents;
395 Contents.push_back(0);
405 SmallString<8> &getContents() { return Contents; }
406 const SmallString<8> &getContents() const { return Contents; }
424 SmallString<8> Contents;
431 Contents.push_back(0);
441 SmallString<8> &getContents() { return Contents; }
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| ScheduleDAG.h | 78 /// Contents - A union discriminated by the dependence kind.
87 } Contents;
102 : Dep(S, kind), Contents() {
110 Contents.Reg = Reg;
114 Contents.Reg = Reg;
120 : Dep(S, Order), Contents(), Latency(0) {
121 Contents.OrdKind = kind;
166 return getKind() == Order && (Contents.OrdKind == MayAliasMem
167 || Contents.OrdKind == MustAliasMem);
173 return getKind() == Order && Contents.OrdKind == Barrier
[all...] |
| /external/llvm/tools/llvm-readobj/ |
| COFFDumper.cpp | 717 // |SubSectionType|SubSectionSize|Contents...|
[all...] |
| ELFDumper.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| ScheduleDAG.h | 59 /// Contents - A union discriminated by the dependence kind.
81 } Contents;
98 : Dep(S, kind), Contents(), Latency(latency) {
108 Contents.Reg = Reg;
112 Contents.Order.isNormalMemory = isNormalMemory;
113 Contents.Order.isMustAlias = isMustAlias;
114 Contents.Order.isArtificial = isArtificial;
125 return Contents.Reg == Other.Contents.Reg;
127 return Contents.Order.isNormalMemory =
[all...] |
| /external/swiftshader/third_party/LLVM/include/llvm/MC/ |
| MCAssembler.h | 109 SmallString<32> Contents;
124 SmallString<32> &getContents() { return Contents; }
125 const SmallString<32> &getContents() const { return Contents; }
336 SmallString<8> Contents;
340 Value(&Value_), IsSigned(IsSigned_) { Contents.push_back(0); }
349 SmallString<8> &getContents() { return Contents; }
350 const SmallString<8> &getContents() const { return Contents; }
369 SmallString<8> Contents;
375 LineDelta(_LineDelta), AddrDelta(&_AddrDelta) { Contents.push_back(0); }
384 SmallString<8> &getContents() { return Contents; }
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| ARMAsmPrinter.cpp | 119 SmallVector<AttributeItemType, 64> Contents;
151 assert(Contents.size() == 0);
163 Contents.push_back(attr);
177 Contents.push_back(attr);
196 for (unsigned int i=0; i<Contents.size(); ++i) {
197 AttributeItemType item = Contents[i];
212 Contents.clear();
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/CodeGen/ |
| ScheduleDAG.h | 92 } Contents;
106 : Dep(S, kind), Contents() {
114 Contents.Reg = Reg;
118 Contents.Reg = Reg;
125 : Dep(S, Order), Contents(), Latency(0) {
126 Contents.OrdKind = kind;
170 return getKind() == Order && (Contents.OrdKind == MayAliasMem
171 || Contents.OrdKind == MustAliasMem);
176 return getKind() == Order && Contents.OrdKind == Barrier;
188 return getKind() == Order && Contents.OrdKind == MustAliasMem
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4393122/include/llvm/CodeGen/ |
| ScheduleDAG.h | 92 } Contents;
106 : Dep(S, kind), Contents() {
114 Contents.Reg = Reg;
118 Contents.Reg = Reg;
125 : Dep(S, Order), Contents(), Latency(0) {
126 Contents.OrdKind = kind;
170 return getKind() == Order && (Contents.OrdKind == MayAliasMem
171 || Contents.OrdKind == MustAliasMem);
176 return getKind() == Order && Contents.OrdKind == Barrier;
188 return getKind() == Order && Contents.OrdKind == MustAliasMem
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4479392/include/llvm/CodeGen/ |
| ScheduleDAG.h | 92 } Contents;
106 : Dep(S, kind), Contents() {
114 Contents.Reg = Reg;
118 Contents.Reg = Reg;
125 : Dep(S, Order), Contents(), Latency(0) {
126 Contents.OrdKind = kind;
170 return getKind() == Order && (Contents.OrdKind == MayAliasMem
171 || Contents.OrdKind == MustAliasMem);
176 return getKind() == Order && Contents.OrdKind == Barrier;
188 return getKind() == Order && Contents.OrdKind == MustAliasMem
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4579689/include/llvm/CodeGen/ |
| ScheduleDAG.h | 92 } Contents;
106 : Dep(S, kind), Contents() {
114 Contents.Reg = Reg;
118 Contents.Reg = Reg;
125 : Dep(S, Order), Contents(), Latency(0) {
126 Contents.OrdKind = kind;
170 return getKind() == Order && (Contents.OrdKind == MayAliasMem
171 || Contents.OrdKind == MustAliasMem);
176 return getKind() == Order && Contents.OrdKind == Barrier;
188 return getKind() == Order && Contents.OrdKind == MustAliasMem
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4630689/include/llvm/CodeGen/ |
| ScheduleDAG.h | 92 } Contents;
106 : Dep(S, kind), Contents() {
114 Contents.Reg = Reg;
118 Contents.Reg = Reg;
125 : Dep(S, Order), Contents(), Latency(0) {
126 Contents.OrdKind = kind;
170 return getKind() == Order && (Contents.OrdKind == MayAliasMem
171 || Contents.OrdKind == MustAliasMem);
176 return getKind() == Order && Contents.OrdKind == Barrier;
188 return getKind() == Order && Contents.OrdKind == MustAliasMem
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4639204/include/llvm/CodeGen/ |
| ScheduleDAG.h | 92 } Contents;
106 : Dep(S, kind), Contents() {
114 Contents.Reg = Reg;
118 Contents.Reg = Reg;
125 : Dep(S, Order), Contents(), Latency(0) {
126 Contents.OrdKind = kind;
170 return getKind() == Order && (Contents.OrdKind == MayAliasMem
171 || Contents.OrdKind == MustAliasMem);
176 return getKind() == Order && Contents.OrdKind == Barrier;
188 return getKind() == Order && Contents.OrdKind == MustAliasMem
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4691093/include/llvm/CodeGen/ |
| ScheduleDAG.h | 92 } Contents;
106 : Dep(S, kind), Contents() {
114 Contents.Reg = Reg;
118 Contents.Reg = Reg;
125 : Dep(S, Order), Contents(), Latency(0) {
126 Contents.OrdKind = kind;
170 return getKind() == Order && (Contents.OrdKind == MayAliasMem
171 || Contents.OrdKind == MustAliasMem);
176 return getKind() == Order && Contents.OrdKind == Barrier;
188 return getKind() == Order && Contents.OrdKind == MustAliasMem
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/CodeGen/ |
| ScheduleDAG.h | 92 } Contents;
106 : Dep(S, kind), Contents() {
114 Contents.Reg = Reg;
118 Contents.Reg = Reg;
125 : Dep(S, Order), Contents(), Latency(0) {
126 Contents.OrdKind = kind;
170 return getKind() == Order && (Contents.OrdKind == MayAliasMem
171 || Contents.OrdKind == MustAliasMem);
176 return getKind() == Order && Contents.OrdKind == Barrier;
188 return getKind() == Order && Contents.OrdKind == MustAliasMem
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4393122/include/llvm/CodeGen/ |
| ScheduleDAG.h | 92 } Contents;
106 : Dep(S, kind), Contents() {
114 Contents.Reg = Reg;
118 Contents.Reg = Reg;
125 : Dep(S, Order), Contents(), Latency(0) {
126 Contents.OrdKind = kind;
170 return getKind() == Order && (Contents.OrdKind == MayAliasMem
171 || Contents.OrdKind == MustAliasMem);
176 return getKind() == Order && Contents.OrdKind == Barrier;
188 return getKind() == Order && Contents.OrdKind == MustAliasMem
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4479392/include/llvm/CodeGen/ |
| ScheduleDAG.h | 92 } Contents;
106 : Dep(S, kind), Contents() {
114 Contents.Reg = Reg;
118 Contents.Reg = Reg;
125 : Dep(S, Order), Contents(), Latency(0) {
126 Contents.OrdKind = kind;
170 return getKind() == Order && (Contents.OrdKind == MayAliasMem
171 || Contents.OrdKind == MustAliasMem);
176 return getKind() == Order && Contents.OrdKind == Barrier;
188 return getKind() == Order && Contents.OrdKind == MustAliasMem
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4579689/include/llvm/CodeGen/ |
| ScheduleDAG.h | 92 } Contents;
106 : Dep(S, kind), Contents() {
114 Contents.Reg = Reg;
118 Contents.Reg = Reg;
125 : Dep(S, Order), Contents(), Latency(0) {
126 Contents.OrdKind = kind;
170 return getKind() == Order && (Contents.OrdKind == MayAliasMem
171 || Contents.OrdKind == MustAliasMem);
176 return getKind() == Order && Contents.OrdKind == Barrier;
188 return getKind() == Order && Contents.OrdKind == MustAliasMem
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4630689/include/llvm/CodeGen/ |
| ScheduleDAG.h | 92 } Contents;
106 : Dep(S, kind), Contents() {
114 Contents.Reg = Reg;
118 Contents.Reg = Reg;
125 : Dep(S, Order), Contents(), Latency(0) {
126 Contents.OrdKind = kind;
170 return getKind() == Order && (Contents.OrdKind == MayAliasMem
171 || Contents.OrdKind == MustAliasMem);
176 return getKind() == Order && Contents.OrdKind == Barrier;
188 return getKind() == Order && Contents.OrdKind == MustAliasMem
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4639204/include/llvm/CodeGen/ |
| ScheduleDAG.h | 92 } Contents;
106 : Dep(S, kind), Contents() {
114 Contents.Reg = Reg;
118 Contents.Reg = Reg;
125 : Dep(S, Order), Contents(), Latency(0) {
126 Contents.OrdKind = kind;
170 return getKind() == Order && (Contents.OrdKind == MayAliasMem
171 || Contents.OrdKind == MustAliasMem);
176 return getKind() == Order && Contents.OrdKind == Barrier;
188 return getKind() == Order && Contents.OrdKind == MustAliasMem
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4691093/include/llvm/CodeGen/ |
| ScheduleDAG.h | 92 } Contents;
106 : Dep(S, kind), Contents() {
114 Contents.Reg = Reg;
118 Contents.Reg = Reg;
125 : Dep(S, Order), Contents(), Latency(0) {
126 Contents.OrdKind = kind;
170 return getKind() == Order && (Contents.OrdKind == MayAliasMem
171 || Contents.OrdKind == MustAliasMem);
176 return getKind() == Order && Contents.OrdKind == Barrier;
188 return getKind() == Order && Contents.OrdKind == MustAliasMem
[all...] |
| /external/clang/lib/Basic/ |
| VirtualFileSystem.cpp | 722 std::vector<std::unique_ptr<Entry>> Contents;
727 std::vector<std::unique_ptr<Entry>> Contents,
729 : Entry(EK_Directory, Name), Contents(std::move(Contents)),
735 Contents.push_back(std::move(Content));
737 Entry *getLastContent() const { return Contents.back().get(); }
738 typedef decltype(Contents)::iterator iterator;
739 iterator contents_begin() { return Contents.begin(); }
740 iterator contents_end() { return Contents.end(); }
810 /// 'contents': [ <file or directory entries>
[all...] |
| /external/libcxxabi/src/ |
| cxa_demangle.cpp | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonHardwareLoops.cpp | 300 } Contents;
306 Contents.R.Reg = v;
307 Contents.R.Sub = u;
309 Contents.ImmVal = v;
317 return Contents.R.Reg;
321 return Contents.R.Sub;
325 return Contents.ImmVal;
329 if (isReg()) { OS << PrintReg(Contents.R.Reg, TRI, Contents.R.Sub); }
330 if (isImm()) { OS << Contents.ImmVal;
[all...] |
| /external/llvm/tools/dsymutil/ |
| DwarfLinker.cpp | 712 /// \brief Emit the debug_range section contents for \p FuncRange by
751 /// if \p DoDebugRanges is true the debug_range contents for a
779 sizeof(int32_t) + // Size of contents (w/o this field
[all...] |
