/external/llvm/lib/CodeGen/SelectionDAG/ |
LegalizeVectorOps.cpp | 203 LoadSDNode *LD = cast<LoadSDNode>(Op.getNode()); 204 ISD::LoadExtType ExtType = LD->getExtensionType(); 205 if (LD->getMemoryVT().isVector() && ExtType != ISD::NON_EXTLOAD) 206 switch (TLI.getLoadExtAction(LD->getExtensionType(), LD->getValueType(0), 207 LD->getMemoryVT())) { 495 LoadSDNode *LD = cast<LoadSDNode>(Op.getNode()); 497 EVT SrcVT = LD->getMemoryVT(); 510 EVT DstEltVT = LD->getValueType(0).getScalarType(); 511 SDValue Chain = LD->getChain() [all...] |
LegalizeFloatTypes.cpp | [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430ISelLowering.cpp | [all...] |
/external/llvm/lib/Target/NVPTX/ |
NVPTXISelDAGToDAG.cpp | 677 LoadSDNode *LD = cast<LoadSDNode>(N); 678 EVT LoadedVT = LD->getMemoryVT(); 682 if (LD->isIndexed()) 689 unsigned int codeAddrSpace = getCodeAddrSpace(LD); 691 if (canLowerToLDG(LD, *Subtarget, codeAddrSpace, MF)) { 697 bool isVolatile = LD->isVolatile(); 726 if ((LD->getExtensionType() == ISD::SEXTLOAD)) 739 MVT::SimpleValueType TargetVT = LD->getSimpleValueType(0).SimpleTy; 921 SDNode *LD; [all...] |
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
LegalizeDAG.cpp | 496 SDValue ExpandUnalignedLoad(LoadSDNode *LD, SelectionDAG &DAG, 498 SDValue Chain = LD->getChain(); 499 SDValue Ptr = LD->getBasePtr(); 500 EVT VT = LD->getValueType(0); 501 EVT LoadedVT = LD->getMemoryVT(); 502 DebugLoc dl = LD->getDebugLoc(); 508 SDValue newLoad = DAG.getLoad(intVT, dl, Chain, Ptr, LD->getPointerInfo(), 509 LD->isVolatile(), 510 LD->isNonTemporal(), LD->getAlignment()) [all...] |
LegalizeFloatTypes.cpp | [all...] |
LegalizeVectorTypes.cpp | 701 void DAGTypeLegalizer::SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo, 703 assert(ISD::isUNINDEXEDLoad(LD) && "Indexed load during type legalization!"); 705 DebugLoc dl = LD->getDebugLoc(); 706 GetSplitDestVTs(LD->getValueType(0), LoVT, HiVT); 708 ISD::LoadExtType ExtType = LD->getExtensionType(); 709 SDValue Ch = LD->getChain(); 710 SDValue Ptr = LD->getBasePtr(); 712 EVT MemoryVT = LD->getMemoryVT(); 713 unsigned Alignment = LD->getOriginalAlignment(); 714 bool isVolatile = LD->isVolatile() [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
AlphaISelLowering.cpp | 622 SDValue LD; 624 LD = DAG.getNode(ISD::BITCAST, dl, MVT::f64, Op.getOperand(0)); 626 isDouble?MVT::f64:MVT::f32, LD); [all...] |
/external/vboot_reference/ |
Makefile | 200 LD = ${CC} 962 @$(PRINTF) " LD $(subst ${BUILD}/,,$@)\n" 963 ${Q}${LD} -o ${CGPT_WRAPPER} ${CFLAGS} $^ 972 ${Q}${LD} -o ${CGPT} ${CFLAGS} ${LDFLAGS} $^ ${LDLIBS} 1031 @${PRINTF} " LD $(subst ${BUILD}/,,$@)\n" 1032 ${Q}${LD} -o $@ ${CFLAGS} ${LDFLAGS} -static $^ ${LDLIBS} 1036 @${PRINTF} " LD $(subst ${BUILD}/,,$@)\n" 1037 ${Q}${LD} -o $@ ${CFLAGS} ${LDFLAGS} $^ ${LDLIBS} 1096 @${PRINTF} " LD $(subst ${BUILD}/,,$@)\n" 1097 ${Q}${LD} -o $@ ${CFLAGS} ${LDFLAGS} $< ${OBJS} ${LIBS} ${LDLIBS [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelDAGToDAG.cpp | [all...] |
/external/llvm/lib/Target/ARM/MCTargetDesc/ |
ARMBaseInfo.h | 136 LD = 13, 146 case LD: return HasV8 ? "ld" : "#0xd"; 330 // and store ops only. Generic "updating" flag is used for ld/st multiple.
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/external/llvm/lib/Target/Hexagon/ |
HexagonISelDAGToDAG.cpp | 95 void SelectBaseOffsetLoad(LoadSDNode *LD, SDLoc dl); 96 void SelectIndexedLoad(LoadSDNode *LD, const SDLoc &dl); 240 void HexagonDAGToDAGISel::SelectIndexedLoad(LoadSDNode *LD, const SDLoc &dl) { 241 SDValue Chain = LD->getChain(); 242 SDValue Base = LD->getBasePtr(); 243 SDValue Offset = LD->getOffset(); 245 EVT LoadedVT = LD->getMemoryVT(); 250 ISD::LoadExtType ExtType = LD->getExtensionType(); 279 if (isAlignedMemNode(LD)) 289 if (isAlignedMemNode(LD)) [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelDAGToDAG.cpp | 506 LoadSDNode *LD = dyn_cast<LoadSDNode>(Callee.getNode()); 507 if (!LD || 508 LD->isVolatile() || 509 LD->getAddressingMode() != ISD::UNINDEXED || 510 LD->getExtensionType() != ISD::NON_EXTLOAD) [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreISelLowering.cpp | 421 LoadSDNode *LD = cast<LoadSDNode>(Op); 422 assert(LD->getExtensionType() == ISD::NON_EXTLOAD && 424 assert(LD->getMemoryVT() == MVT::i32 && "Unexpected load EVT"); 425 if (allowsMisalignedMemoryAccesses(LD->getMemoryVT(), 426 LD->getAddressSpace(), 427 LD->getAlignment())) 432 LD->getMemoryVT().getTypeForEVT(*DAG.getContext())); 434 if (LD->getAlignment() >= ABIAlignment) 437 SDValue Chain = LD->getChain(); 438 SDValue BasePtr = LD->getBasePtr() [all...] |
/external/pcre/dist2/src/sljit/ |
sljitNativeMIPS_common.c | 144 #define LD (HI(55)) 532 #define STACK_LOAD LD 673 /* u w l */ ARCH_32_64(HI(35) /* lw */, HI(55) /* ld */), 682 /* s w l */ ARCH_32_64(HI(35) /* lw */, HI(55) /* ld */), [all...] |
sljitNativePPC_common.c | 180 #define LD (HI(58) | 0) 575 #define STACK_LOAD LD 736 /* u w n i l */ ARCH_32_64(HI(32) /* lwz */, HI(58) | INT_ALIGNED | 0x0 /* ld */), 786 /* s w n i l */ ARCH_32_64(HI(32) /* lwz */, HI(58) | INT_ALIGNED | 0x0 /* ld */), [all...] |
sljitNativeTILEGX_64.c | 312 /* u w l */ TILEGX_OPC_LD /* ld */, 320 /* s w l */ TILEGX_OPC_LD /* ld */, 454 #define LD(dst, addr) \ [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
ARMISelDAGToDAG.cpp | [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
X86ISelDAGToDAG.cpp | 401 LoadSDNode *LD = dyn_cast<LoadSDNode>(Callee.getNode()); 402 if (!LD || 403 LD->isVolatile() || 404 LD->getAddressingMode() != ISD::UNINDEXED || 405 LD->getExtensionType() != ISD::NON_EXTLOAD) [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
XCoreISelLowering.cpp | 394 LoadSDNode *LD = cast<LoadSDNode>(Op); 395 assert(LD->getExtensionType() == ISD::NON_EXTLOAD && 397 assert(LD->getMemoryVT() == MVT::i32 && "Unexpected load EVT"); 398 if (allowsUnalignedMemoryAccesses(LD->getMemoryVT())) 402 getABITypeAlignment(LD->getMemoryVT().getTypeForEVT(*DAG.getContext())); 404 if (LD->getAlignment() >= ABIAlignment) 407 SDValue Chain = LD->getChain(); 408 SDValue BasePtr = LD->getBasePtr(); 413 if (!LD->isVolatile() && 450 if (LD->getAlignment() == 2) [all...] |
/toolchain/binutils/binutils-2.27/include/opcode/ |
m88k.h | 277 #define LD LDAD+3
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/external/libvpx/libvpx/vp8/common/mips/msa/ |
vp8_macros_msa.h | 57 #define LD(psrc) \ 62 asm volatile("ld %[val_m], %[psrc_m] \n\t" \ 70 #define LD(psrc) \ 134 #define LD(psrc) \ 147 #define LD(psrc) \ 222 out0 = LD((psrc)); \ 223 out1 = LD((psrc) + stride); \ [all...] |
/external/libvpx/libvpx/vpx_dsp/mips/ |
macros_msa.h | 46 #define LD(psrc) \ 52 #define LD(psrc) \ 100 #define LD(psrc) \ 113 #define LD(psrc) \ 189 out0 = LD((psrc)); \ 190 out1 = LD((psrc) + stride); \ [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelDAGToDAG.cpp | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelDAGToDAG.cpp | [all...] |