| /external/llvm/lib/CodeGen/ |
| RegAllocFast.cpp | 62 MachineBasicBlock *MBB;
294 TII->storeRegToStackSlot(*MBB, MI, LR.PhysReg, SpillKill, FI, RC, TRI);
312 BuildMI(*MBB, MI, DL, TII->get(TargetOpcode::DBG_VALUE))
317 assert(NewDV->getParent() == MBB && "dangling parent pointer");
648 TII->loadRegFromStackSlot(*MBB, MI, LRI->PhysReg, FrameIndex, RC, TRI);
805 DEBUG(dbgs() << "\nAllocating " << *MBB);
810 MachineBasicBlock::iterator MII = MBB->begin();
813 for (const auto &LI : MBB->liveins())
820 // Otherwise, sequentially allocate each instruction in the MBB.
821 while (MII != MBB->end())
[all...] |
| TailDuplicator.cpp | 74 MachineBasicBlock *MBB = &*I;
75 SmallSetVector<MachineBasicBlock *, 8> Preds(MBB->pred_begin(),
76 MBB->pred_end());
77 MachineBasicBlock::iterator MI = MBB->begin();
78 while (MI != MBB->end()) {
94 dbgs() << "Malformed PHI in BB#" << MBB->getNumber() << ": " << *MI;
104 dbgs() << "Warning: malformed PHI in BB#" << MBB->getNumber() << ": "
111 dbgs() << "Malformed PHI in BB#" << MBB->getNumber() << ": " << *MI;
123 MachineBasicBlock *MBB) {
125 SmallSetVector<MachineBasicBlock *, 8> Succs(MBB->succ_begin()
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| R600ControlFlowFinalizer.cpp | 317 MakeFetchClause(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I)
324 for (MachineBasicBlock::iterator E = MBB.end(); I != E; ++I) {
337 MachineInstr *MIb = BuildMI(MBB, ClauseHead, MBB.findDebugLoc(ClauseHead),
382 MachineBasicBlock *MBB = InsertPos->getParent();
386 InsertPos = BuildMI(MBB, InsertPos->getDebugLoc(),
395 MakeALUClause(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I)
400 for (MachineBasicBlock::instr_iterator E = MBB.instr_end(); I != E;) {
428 MachineInstrBuilder MILit = BuildMI(MBB, I, I->getDebugLoc(),
505 MachineBasicBlock &MBB = *MB
[all...] |
| SIRegisterInfo.cpp | 271 void SIRegisterInfo::materializeFrameBaseRegister(MachineBasicBlock *MBB,
275 MachineBasicBlock::iterator Ins = MBB->begin();
278 if (Ins != MBB->end())
281 MachineFunction *MF = MBB->getParent();
286 BuildMI(*MBB, Ins, DL, TII->get(AMDGPU::V_MOV_B32_e32), BaseReg)
295 BuildMI(*MBB, Ins, DL, TII->get(AMDGPU::S_MOV_B32), OffsetReg)
297 BuildMI(*MBB, Ins, DL, TII->get(AMDGPU::V_ADD_I32_e64), BaseReg)
306 MachineBasicBlock *MBB = MI.getParent();
307 MachineFunction *MF = MBB->getParent();
351 BuildMI(*MBB, MI, DL, TII->get(AMDGPU::S_MOV_B32), OffsetReg
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMBaseRegisterInfo.cpp | 412 MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
415 MachineFunction &MF = *MBB.getParent();
422 BuildMI(MBB, MBBI, dl, TII.get(ARM::LDRcp))
585 materializeFrameBaseRegister(MachineBasicBlock *MBB,
588 ARMFunctionInfo *AFI = MBB->getParent()->getInfo<ARMFunctionInfo>();
592 MachineBasicBlock::iterator Ins = MBB->begin();
594 if (Ins != MBB->end())
597 const MachineFunction &MF = *MBB->getParent();
598 MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo();
603 MachineInstrBuilder MIB = BuildMI(*MBB, Ins, DL, MCID, BaseReg
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonStoreWidening.cpp | 90 void createStoreGroups(MachineBasicBlock &MBB,
92 bool processBasicBlock(MachineBasicBlock &MBB);
209 void HexagonStoreWidening::createStoreGroups(MachineBasicBlock &MBB,
216 for (auto &I : MBB)
490 MachineBasicBlock *MBB = OG.back()->getParent();
491 MachineBasicBlock::iterator InsertAt = MBB->end();
505 for (auto &I : *MBB) {
512 assert((InsertAt != MBB->end()) && "Cannot locate any store from the group");
520 if (InsertAt != MBB->begin())
531 InsertAt = MBB->begin()
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCAsmPrinter.cpp | 325 const MachineBasicBlock &MBB = *MI.getParent();
329 if (MII == MBB.end() || MII->isCall() ||
[all...] |
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| MachineOperand.h | 129 MachineBasicBlock *MBB; // For MO_MachineBasicBlock.
377 return Contents.MBB;
442 void setMBB(MachineBasicBlock *MBB) {
444 Contents.MBB = MBB;
509 static MachineOperand CreateMBB(MachineBasicBlock *MBB,
512 Op.setMBB(MBB);
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| LiveDebugVariables.cpp | 87 bool dominates(MachineBasicBlock *MBB) {
90 if (LBlocks.count(MBB) != 0 || LS.dominates(DL, MBB))
127 /// insertDebugValue - Insert a DBG_VALUE into MBB at Idx for LocNo.
128 void insertDebugValue(MachineBasicBlock *MBB, SlotIndex Idx, unsigned LocNo,
461 MachineBasicBlock *MBB = MFI;
462 for (MachineBasicBlock::iterator MBBI = MBB->begin(), MBBE = MBB->end();
469 SlotIndex Idx = MBBI == MBB->begin() ?
470 LIS->getMBBStartIdx(MBB)
[all...] |
| MachineLICM.cpp | 106 // If a MBB does not dominate loop exiting blocks then it may not safe
214 /// IsGuaranteedToExecute - Check if this mbb is guaranteed to execute.
215 /// If not then a load from this mbb may not be safe to hoist.
575 MachineBasicBlock *MBB = MI->getParent();
576 Preheader->splice(Preheader->getFirstTerminator(), MBB, MI);
587 // IsGuaranteedToExecute - Check if this mbb is guaranteed to execute.
588 // If not then a load from this mbb may not be safe to hoist.
[all...] |
| MachineVerifier.cpp | 93 // Is this MBB reachable from the MF entry point?
100 // Regs killed in MBB. They may be defined again, and will then be in both
104 // Regs defined in MBB and live out. Note that vregs passing through may
108 // Vregs that pass through MBB untouched. This set is disjoint from
112 // Vregs that must pass through MBB because they are needed by a successor
171 // Extra register info per MBB.
185 void visitMachineBasicBlockBefore(const MachineBasicBlock *MBB);
189 void visitMachineBasicBlockAfter(const MachineBasicBlock *MBB);
193 void report(const char *msg, const MachineBasicBlock *MBB);
197 void markReachable(const MachineBasicBlock *MBB);
[all...] |
| RegAllocFast.cpp | 65 MachineBasicBlock *MBB;
269 TII->storeRegToStackSlot(*MBB, MI, LR.PhysReg, SpillKill, FI, RC, TRI);
284 if (MI == MBB->end()) {
293 MachineBasicBlock *MBB = DBG->getParent();
294 MBB->insert(MI, NewDV);
590 TII->loadRegFromStackSlot(*MBB, MI, LR.PhysReg, FrameIndex, RC, TRI);
734 DEBUG(dbgs() << "\nAllocating " << *MBB);
742 if (!MBB->empty() && MBB->back().getDesc().isReturn() &&
743 !MBB->back().getDesc().isCall())
[all...] |
| ShrinkWrapping.cpp | 126 bool PEI::isReturnBlock(MachineBasicBlock* MBB) {
127 return (MBB && !MBB->empty() && MBB->back().getDesc().isReturn());
197 /// for the given MBB by looking forward in the MCFG at MBB's
200 bool PEI::calcAnticInOut(MachineBasicBlock* MBB) {
203 // AnticOut[MBB] = INTERSECT(AnticIn[S] for S in SUCCESSORS(MBB))
205 for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin()
[all...] |
| SplitKit.cpp | 62 const MachineBasicBlock *MBB = MF.getBlockNumbered(Num);
63 const MachineBasicBlock *LPad = MBB->getLandingPadSuccessor();
69 MachineBasicBlock::const_iterator FirstTerm = MBB->getFirstTerminator();
70 if (FirstTerm == MBB->end())
71 LSP.first = LIS.getMBBEndIdx(MBB);
80 for (MachineBasicBlock::const_iterator I = MBB->end(), E = MBB->begin();
166 BI.MBB = MFI;
168 tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB);
175 ThroughBlocks.set(BI.MBB->getNumber())
[all...] |
| StrongPHIElimination.cpp | 217 static MachineOperand *findLastUse(MachineBasicBlock *MBB, unsigned Reg) {
220 for (MachineBasicBlock::reverse_iterator RI = MBB->rbegin(); ; ++RI) {
221 assert (RI != MBB->rend());
371 MachineBasicBlock *MBB = I->first;
379 for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(),
380 SE = MBB->succ_end(); SI != SE; ++SI) {
390 MachineOperand *LastUse = findLastUse(MBB, SrcReg);
393 SrcLI.removeRange(LastUseIndex.getDefIndex(), LI->getMBBEndIdx(MBB));
523 MachineBasicBlock &MBB,
528 std::vector<MachineInstr*> &DefInstrs = PHISrcDefs[&MBB];
[all...] |
| TailDuplication.cpp | 111 bool TailDuplicateAndUpdate(MachineBasicBlock *MBB,
115 void RemoveDeadBlock(MachineBasicBlock *MBB);
139 MachineBasicBlock *MBB = I;
140 SmallSetVector<MachineBasicBlock*, 8> Preds(MBB->pred_begin(),
141 MBB->pred_end());
142 MachineBasicBlock::iterator MI = MBB->begin();
143 while (MI != MBB->end()) {
158 dbgs() << "Malformed PHI in BB#" << MBB->getNumber() << ": " << *MI;
168 dbgs() << "Warning: malformed PHI in BB#" << MBB->getNumber()
175 dbgs() << "Malformed PHI in BB#" << MBB->getNumber() << ": " << *MI
[all...] |
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| SelectionDAGBuilder.h | 170 /// CaseBB - The MBB in which to emit the compare and branch
235 MachineBasicBlock *D): Reg(R), JTI(J), MBB(M), Default(D) {}
242 /// MBB - the MBB into which to emit the code for the indirect jump.
243 MachineBasicBlock *MBB;
244 /// Default - the MBB of the default bb, which is a successor of the range
245 /// check MBB. This is when updating PHI nodes in successors.
420 /// UpdateSplitBlock - When an MBB was split during scheduling, update the
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| ARMBaseRegisterInfo.cpp | 799 emitLoadConstPool(MachineBasicBlock &MBB,
805 MachineFunction &MF = *MBB.getParent();
811 BuildMI(MBB, MBBI, dl, TII.get(ARM::LDRcp))
835 MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
840 emitARMRegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes,
843 emitT2RegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes,
849 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
879 emitSPUpdate(isARM, MBB, I, dl, TII, -Amount, Pred, PredReg);
884 emitSPUpdate(isARM, MBB, I, dl, TII, Amount, Pred, PredReg);
888 MBB.erase(I)
[all...] |
| ARMExpandPseudoInsts.cpp | 57 bool ExpandMI(MachineBasicBlock &MBB,
59 bool ExpandMBB(MachineBasicBlock &MBB);
65 void ExpandMOV32BitImm(MachineBasicBlock &MBB,
410 MachineBasicBlock &MBB = *MI.getParent();
417 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
474 MachineBasicBlock &MBB = *MI.getParent();
481 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
522 MachineBasicBlock &MBB = *MI.getParent();
530 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
610 MachineBasicBlock &MBB = *MI.getParent()
[all...] |
| ARMFrameLowering.cpp | 110 MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
114 emitARMRegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes,
117 emitT2RegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes,
122 MachineBasicBlock &MBB = MF.front();
123 MachineBasicBlock::iterator MBBI = MBB.begin();
136 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
150 emitSPUpdate(isARM, MBB, MBBI, dl, TII, -VARegSaveSize,
155 emitSPUpdate(isARM, MBB, MBBI, dl, TII, -NumBytes,
206 BuildMI(MBB, MBBI, dl, TII.get(ADDriOpc), FramePtr)
238 emitSPUpdate(isARM, MBB, MBBI, dl, TII, -NumBytes
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| PPCFrameLowering.cpp | 253 MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB
254 MachineBasicBlock::iterator MBBI = MBB.begin();
269 for (unsigned i = 0; MBBI != MBB.end(); ++i, ++MBBI) {
277 MBBI = MBB.begin();
313 BuildMI(MBB, MBBI, dl, TII.get(PPC::MFLR8), PPC::X0);
316 BuildMI(MBB, MBBI, dl, TII.get(PPC::STD))
322 BuildMI(MBB, MBBI, dl, TII.get(PPC::STD))
328 BuildMI(MBB, MBBI, dl, TII.get(PPC::MFLR), PPC::R0);
331 BuildMI(MBB, MBBI, dl, TII.get(PPC::STW))
337 BuildMI(MBB, MBBI, dl, TII.get(PPC::STW)
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/CodeGen/ |
| MachineOperand.h | 160 MachineBasicBlock *MBB; // For MO_MachineBasicBlock.
438 return Contents.MBB;
553 void setMBB(MachineBasicBlock *MBB) {
555 Contents.MBB = MBB;
655 static MachineOperand CreateMBB(MachineBasicBlock *MBB,
658 Op.setMBB(MBB);
|
| SlotIndexes.h | 340 /// MBBRanges - Map MBB number to (start, stop) indexes.
344 /// and MBB id.
384 void repairIndexesInRange(MachineBasicBlock *MBB,
436 const MachineBasicBlock *MBB = MI.getParent();
437 assert(MBB && "MI must be inserted inna basic block");
438 MachineBasicBlock::const_iterator I = MI, B = MBB->begin();
441 return getMBBStartIdx(MBB);
453 const MachineBasicBlock *MBB = MI.getParent();
454 assert(MBB && "MI must be inserted inna basic block");
455 MachineBasicBlock::const_iterator I = MI, E = MBB->end()
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4393122/include/llvm/CodeGen/ |
| MachineBasicBlock.h | 416 /// one. This is usually done when the current update on this MBB is done, and
419 /// MBB::removeSuccessor() has an option to do this automatically.
446 /// Transfers all the successors from MBB to this machine basic block (i.e.,
458 /// Return true if the specified MBB is a predecessor of this block.
459 bool isPredecessor(const MachineBasicBlock *MBB) const;
461 /// Return true if the specified MBB is a successor of this block.
462 bool isSuccessor(const MachineBasicBlock *MBB) const;
464 /// Return true if the specified MBB will be emitted immediately after this
466 /// transfer to the specified MBB. Note that MBB need not be a successor a
[all...] |
| MachineOperand.h | 159 MachineBasicBlock *MBB; // For MO_MachineBasicBlock.
437 return Contents.MBB;
552 void setMBB(MachineBasicBlock *MBB) {
554 Contents.MBB = MBB;
654 static MachineOperand CreateMBB(MachineBasicBlock *MBB,
657 Op.setMBB(MBB);
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