HomeSort by relevance Sort by last modified time
    Searched full:accesses (Results 1026 - 1050 of 2582) sorted by null

<<41424344454647484950>>

  /device/linaro/bootloader/edk2/AppPkg/Applications/Python/Python-2.7.2/Lib/
rexec.py 175 system accesses made to import a module, without changing the
176 actual algorithm that controls the order in which those accesses are
  /device/linaro/bootloader/edk2/MdeModulePkg/Universal/EbcDxe/Ipf/
EbcSupport.c 168 // If the EBC accesses memory in the stack gap, then we assume that it's
170 // adjust memory accesses in this region to point above the stack gap.
  /device/linaro/bootloader/edk2/MdePkg/Include/Protocol/
PciIo.h 66 #define EFI_PCI_IO_ATTRIBUTE_MEMORY_CACHED 0x0800 ///< Map a memory range so all r/w accesses are cached
518 /// and DMA interfaces used to abstract accesses to PCI controllers.
  /device/linaro/bootloader/edk2/OvmfPkg/Virtio10Dxe/
Virtio10.c 49 block. Can be one of 1, 2, 4 and 8. Accesses to
51 accesses.
  /external/compiler-rt/lib/tsan/rtl/
tsan_rtl.h 256 // During memory accesses processing the freed bit is considered
259 // This allows us to detect accesses to freed memory w/o additional
  /external/desugar/java/com/google/devtools/build/android/desugar/
InterfaceDesugaring.java 157 // accesses accordingly. Code generated by older JaCoCo versions tried to assign to this
428 * Method visitor intended for interface method bodies that rewrites jacoco field accesses to
  /external/guava/guava-gwt/src-super/com/google/common/cache/super/com/google/common/cache/
CacheBuilder.java 111 * cache modification, on occasional cache accesses, or on calls to {@link Cache#cleanUp}. Expired
118 * removed from the cache on each cache modification, on occasional cache accesses, or on calls to
  /external/guava/guava-tests/benchmark/com/google/common/util/concurrent/
MonitorBasedArrayBlockingQueue.java 166 * @param fair if <tt>true</tt> then queue accesses for threads blocked
200 * @param fair if <tt>true</tt> then queue accesses for threads blocked
  /external/icu/icu4c/source/test/cintltst/
spreptst.c 355 NFS client accesses the server, but have meaning when a local process
356 accesses the file. The ability to display and modify these
  /external/javassist/src/main/javassist/
CodeConverter.java 232 * Modify a method body, so that ALL accesses to an array are replaced with
647 * accesses to array elements.
  /external/libchrome/base/third_party/dynamic_annotations/
dynamic_annotations.h 265 /* Start ignoring all memory accesses (reads and writes). */
272 /* Stop ignoring all memory accesses. */
  /external/llvm/docs/
Vectorizers.rst 294 used to make sure accesses don't alias. Run-time checks can also be added on
393 into vector instructions. Memory accesses, arithmetic operations, comparison
  /external/llvm/lib/Target/ARM/
ARMSubtarget.h 274 /// If true, VLDn instructions take an extra cycle for unaligned accesses.
281 /// accesses for some types. For details, see
  /external/llvm/lib/Transforms/Instrumentation/
AddressSanitizer.cpp 127 // Accesses sizes are powers of two: 1, 2, 4, 8, 16.
154 cl::desc("use instrumentation with slow path for all accesses"), cl::Hidden,
192 "this number of memory accesses, use callbacks instead of "
270 "Number of optimized accesses to global vars");
272 "Number of optimized accesses to stack vars");
    [all...]
  /external/llvm/test/CodeGen/AArch64/
aarch64-interleaved-accesses.ll 1 ; RUN: llc -mtriple=aarch64 -lower-interleaved-accesses=true < %s | FileCheck %s -check-prefix=NEON
2 ; RUN: llc -mtriple=aarch64 -lower-interleaved-accesses=true -mattr=-neon < %s | FileCheck %s -check-prefix=NONEON
  /external/llvm/test/CodeGen/ARM/
arm-interleaved-accesses.ll 1 ; RUN: llc -mtriple=arm-eabi -mattr=+neon -lower-interleaved-accesses=true < %s | FileCheck %s -check-prefix=NEON
2 ; RUN: llc -mtriple=arm-eabi -mattr=-neon -lower-interleaved-accesses=true < %s | FileCheck %s -check-prefix=NONEON
  /external/llvm/test/CodeGen/SystemZ/
spill-01.ll 244 ; Repeat f2 with atomic accesses. We shouldn't use MVC here.
283 ; ...likewise volatile accesses.
  /external/ltp/testcases/kernel/io/disktest/man1/
disktest.1.gz =is???+???JJII??x?,ICB?]*G5?i3? _?~?{x??L??t?E?{i?v?? |??_?? ...
  /external/mesa3d/src/gallium/drivers/vc4/kernel/
vc4_validate_shaders.c 33 * This walks over a shader BO, ensuring that its accesses are
34 * appropriately bounded, and recording how many texture accesses are
  /external/mesa3d/src/gallium/drivers/vc4/
vc4_qir_schedule.c 186 /* Add deps for temp registers and varyings accesses. Note that we
187 * ignore uniforms accesses, because qir_reorder_uniforms() happens
  /external/piex/src/binary_parse/
range_checked_byte_ptr.h 164 // pointer. Read accesses are legal if they fall within the underlying array. A
223 // case where code accesses a large range of indices beyond the end of
  /external/python/cpython2/Lib/
rexec.py 175 system accesses made to import a module, without changing the
176 actual algorithm that controls the order in which those accesses are
  /external/swiftshader/third_party/LLVM/lib/Transforms/InstCombine/
InstCombineLoadStoreAlloca.cpp 171 // where there are several consecutive memory accesses to the same location,
407 // situation often occurs with bitfield accesses.
  /external/syslinux/gpxe/src/include/gpxe/efi/Protocol/
PciIo.h 64 #define EFI_PCI_IO_ATTRIBUTE_MEMORY_CACHED 0x0800 ///< Map a memory range so all r/w accesses are cached
479 /// and DMA interfaces that are used to abstract accesses to PCI controllers.
  /external/tensorflow/tensorflow/core/kernels/
conv_ops_test.cc 132 // We're sliding the 3x3 filter across the 3x4 image, with accesses outside
390 // We're sliding the 3x3 filter across the 3x4 image, with accesses outside

Completed in 2191 milliseconds

<<41424344454647484950>>