| /external/mesa3d/src/gallium/drivers/swr/rasterizer/jitter/ |
| fetch_jit.cpp | [all...] |
| /external/mesa3d/src/gtest/include/gtest/internal/ |
| gtest-port.h | [all...] |
| /external/mesa3d/src/intel/genxml/ |
| gen8.xml | [all...] |
| gen9.xml | [all...] |
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_context.c | 759 * However, unaligned accesses are slower, so enforce buffer alignment.
[all...] |
| brw_vec4_nir.cpp | [all...] |
| /external/mesa3d/src/mesa/main/ |
| shaderapi.c | [all...] |
| /external/pcre/dist2/ |
| ChangeLog | 175 45. Fix unaligned accesses on x86. Patch by Marc Mutz.
[all...] |
| README | 309 unaddressable. This allows it to detect invalid memory accesses, and is
[all...] |
| /external/pcre/dist2/doc/html/ |
| README.txt | 309 unaddressable. This allows it to detect invalid memory accesses, and is
[all...] |
| /external/ply/ply/ |
| CHANGES | [all...] |
| /external/python/cpython2/Doc/c-api/ |
| init.rst | 542 when there is only a single thread, all object accesses are safe. Therefore,
[all...] |
| /external/python/cpython2/Doc/library/ |
| io.rst | 674 :class:`BufferedRWPair` does not attempt to synchronize accesses to
[all...] |
| /external/python/cpython3/Doc/c-api/ |
| init.rst | 623 when there is only a single thread, all object accesses are safe. Therefore,
[all...] |
| /external/python/cpython3/Doc/ |
| glossary.rst | [all...] |
| /external/python/cpython3/Doc/library/ |
| io.rst | 737 :class:`BufferedRWPair` does not attempt to synchronize accesses to
[all...] |
| /external/python/cpython3/Modules/ |
| _collectionsmodule.c | [all...] |
| /external/python/cpython3/Objects/ |
| setobject.c | 16 reduces the cost of hash collisions because consecutive memory accesses
[all...] |
| /external/robolectric/v1/src/main/java/android/net/ |
| Uri__FromAndroid.java | 104 * NOTE: EMPTY accesses this field during its own initialization, so this
[all...] |
| /external/sfntly/cpp/src/test/tinyxml/ |
| tinyxml.h | [all...] |
| /external/strace/ |
| strace.c | 278 -P path trace accesses to path\n\
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Analysis/ |
| MemoryDependenceAnalysis.cpp | 425 // Stores don't depend on other no-aliased accesses.
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| ARMLoadStoreOptimizer.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| README.txt | 200 address of the struct to be CSE'd, avoiding PIC accesses (also reduces the size
|
| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 787 // VAARG needs to be lowered to not do unaligned accesses for doubles.
[all...] |
