| /external/llvm/lib/Target/ARM/ |
| ARMTargetMachine.cpp | 32 cl::desc("Inhibit optimization of S->D register accesses on A15"),
372 // Match interleaved memory accesses to ldN/stN intrinsics.
|
| /external/llvm/lib/Target/X86/ |
| X86Subtarget.h | 180 /// True if unaligned memory accesses of 16-bytes are slow.
183 /// True if unaligned memory accesses of 32-bytes are slow.
|
| /external/llvm/test/CodeGen/Mips/ |
| return-vector.ll | 4 ; Check that function accesses vector return value from stack in cases when
92 ; Check that function accesses vector return value from registers in cases when
|
| /external/ltp/testcases/open_posix_testsuite/conformance/interfaces/mmap/ |
| assertions.xml | 34 An implementation may permit accesses other than those specified by prot; however, if the
195 The implementation does not support the combination of accesses requested
|
| /external/mesa3d/src/compiler/glsl/ |
| ir_set_program_inouts.cpp | 357 * subexpression that accesses shader inputs. So manually
374 * that accesses shader inputs. So manually visit i and then
|
| /external/python/cpython2/Doc/library/ |
| rexec.rst | 60 accesses made to import a module, without changing the actual algorithm that
61 controls the order in which those accesses are made. For instance, we could
|
| /external/skia/src/gpu/ |
| GrFragmentProcessor.h | 329 * FragmentProcessors they have. This must be called AFTER all texture accesses and coord
334 * texture accesses and mangle their uniform and output color names.
|
| /external/skia/src/gpu/vk/ |
| GrVkPipelineState.cpp | 222 const GrResourceIOProcessor::BufferAccess** accesses = local
226 accesses[i] = &processor.bufferAccess(i);
|
| /external/skqp/src/gpu/ |
| GrFragmentProcessor.h | 329 * FragmentProcessors they have. This must be called AFTER all texture accesses and coord
334 * texture accesses and mangle their uniform and output color names.
|
| /external/skqp/src/gpu/vk/ |
| GrVkPipelineState.cpp | 222 const GrResourceIOProcessor::BufferAccess** accesses = local
226 accesses[i] = &processor.bufferAccess(i);
|
| /external/v8/tools/clang/blink_gc_plugin/ |
| DiagnosticsReporter.cpp | 48 "[blink-gc] Finalizer %0 accesses potentially finalized field %1.";
51 "[blink-gc] Finalizer %0 accesses eagerly finalized field %1.";
|
| /frameworks/base/core/java/android/content/ |
| AbstractThreadedSyncAdapter.java | 120 // all accesses to this member variable must be synchronized on mSyncThreadLock
366 // that also synchronize accesses to mSyncThreads
|
| /frameworks/base/core/java/android/view/ |
| SurfaceHolder.java | 98 * surface. If you have a rendering thread that directly accesses
314 * that thread only accesses the Surface while it is valid, and that the
|
| /libcore/libart/src/main/java/dalvik/system/ |
| VMRuntime.java | 281 * Sets the log sampling rate of hidden API accesses written to the event log.
283 * @param rate Proportion of hidden API accesses that will be logged; an integer between
|
| /libcore/ojluni/src/main/java/java/lang/ref/ |
| Reference.java | 270 * accesses of the object, in all methods of class {@code Resource}
288 // cannot easily be moved up past prior accesses, even if this method is
|
| /libcore/ojluni/src/main/java/java/util/concurrent/locks/ |
| LockSupport.java | 51 * methods are maintained with respect to volatile variable accesses,
52 * but not necessarily non-volatile variable accesses.
|
| /prebuilts/clang/host/darwin-x86/clang-4579689/include/clang/Frontend/ |
| CodeGenOptions.def | 182 CODEGENOPT(FineGrainedBitfieldAccesses, 1, 0) ///< Enable fine-grained bitfield accesses.
195 /// Attempt to use register sized accesses to bit-fields in structures, when
|
| /prebuilts/clang/host/darwin-x86/clang-4630689/include/clang/Frontend/ |
| CodeGenOptions.def | 182 CODEGENOPT(FineGrainedBitfieldAccesses, 1, 0) ///< Enable fine-grained bitfield accesses.
195 /// Attempt to use register sized accesses to bit-fields in structures, when
|
| /prebuilts/clang/host/darwin-x86/clang-4639204/include/clang/Frontend/ |
| CodeGenOptions.def | 182 CODEGENOPT(FineGrainedBitfieldAccesses, 1, 0) ///< Enable fine-grained bitfield accesses.
195 /// Attempt to use register sized accesses to bit-fields in structures, when
|
| /prebuilts/clang/host/darwin-x86/clang-4691093/include/clang/Frontend/ |
| CodeGenOptions.def | 182 CODEGENOPT(FineGrainedBitfieldAccesses, 1, 0) ///< Enable fine-grained bitfield accesses.
195 /// Attempt to use register sized accesses to bit-fields in structures, when
|
| /prebuilts/clang/host/linux-x86/clang-4579689/include/clang/Frontend/ |
| CodeGenOptions.def | 182 CODEGENOPT(FineGrainedBitfieldAccesses, 1, 0) ///< Enable fine-grained bitfield accesses.
195 /// Attempt to use register sized accesses to bit-fields in structures, when
|
| /prebuilts/clang/host/linux-x86/clang-4630689/include/clang/Frontend/ |
| CodeGenOptions.def | 182 CODEGENOPT(FineGrainedBitfieldAccesses, 1, 0) ///< Enable fine-grained bitfield accesses.
195 /// Attempt to use register sized accesses to bit-fields in structures, when
|
| /prebuilts/clang/host/linux-x86/clang-4639204/include/clang/Frontend/ |
| CodeGenOptions.def | 182 CODEGENOPT(FineGrainedBitfieldAccesses, 1, 0) ///< Enable fine-grained bitfield accesses.
195 /// Attempt to use register sized accesses to bit-fields in structures, when
|
| /prebuilts/clang/host/linux-x86/clang-4691093/include/clang/Frontend/ |
| CodeGenOptions.def | 182 CODEGENOPT(FineGrainedBitfieldAccesses, 1, 0) ///< Enable fine-grained bitfield accesses.
195 /// Attempt to use register sized accesses to bit-fields in structures, when
|
| /art/runtime/ |
| art_field.h | 152 // Raw field accesses.
|
