| /device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey/ |
| hikey_bl31_setup.c | 59 * running on FVP with VE memory map.
|
| /device/linaro/bootloader/edk2/ArmPlatformPkg/ArmVExpressPkg/Include/ |
| VExpressMotherBoard.h | 105 // FVP models have a different System ID.
|
| /device/linaro/bootloader/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ |
| RTSMMem.c | 58 // The FVP model has Sparse memory
|
| /device/linaro/bootloader/arm-trusted-firmware/docs/ |
| platform-migration-guide.rst | 218 Refer `plat/arm/board/fvp/fvp\_pm.c`_ for the implementation details of
219 these handlers for the FVP. The commit `38dce70f51fb83b27958ba3e2ad15f5635cb1061`_
304 that the platform implements. For example, the Base AEM FVP implements two
603 .. _plat/arm/board/fvp/fvp\_pm.c: ../plat/arm/board/fvp/fvp_pm.c
|
| psci-pd-tree.rst | 68 the FVP has two cluster power domains at the highest level (1).
160 a core index should remain unchanged. Both Juno and FVP use a simple collision
|
| porting-guide.rst | 35 FVP and Juno) may also use `include/plat/arm/common/plat\_arm.h`_ and the
117 FVP and Juno) may also use `include/plat/arm/common/arm\_def.h`_, which provides
167 example, the Base AEM FVP implements two clusters with a configurable
631 In the ARM FVP port, when using the normal boot flow, each secondary CPU powers
[all...] |
| firmware-design.rst | 162 The ``plat_report_exception()`` implementation on the ARM FVP port programs
175 CLCD window of the FVP.
[all...] |
| interrupt-framework-design.rst | 178 `Porting Guide`_). For example, on the FVP port when the platform uses an ARM GICv2
[all...] |
| /device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/aarch32/ |
| fvp_helpers.S | 34 * boot. On FVP, this information can be queried from the power
110 * Function to calculate the core position on FVP.
|
| /device/linaro/bootloader/OpenPlatformPkg/Platforms/ARM/VExpress/DeviceTree/ |
| fvp-foundation-motherboard.dtsi | 173 * Not supported in FVP models
|
| rtsm_ve-motherboard.dtsi | 240 * Not supported in FVP models
|
| fvp-base-gicv2-psci.dts | 39 model = "FVP Base";
|
| fvp-base-gicv2legacy-psci.dts | 39 model = "FVP Base";
|
| fvp-base-gicv3-psci.dts | 39 model = "FVP Base";
|
| /device/linaro/bootloader/arm-trusted-firmware/fdts/ |
| fvp-base-gicv2-psci.dts | 15 model = "FVP Base";
|
| fvp-base-gicv3-psci-common.dtsi | 13 model = "FVP Base";
|
| fvp-foundation-motherboard.dtsi | 148 * Not supported in FVP models
|
| rtsm_ve-motherboard.dtsi | 215 * Not supported in FVP models
|
| fvp-base-gicv2-psci-aarch32.dts | 15 model = "FVP Base";
|
| fvp-base-gicv3-psci-aarch32.dts | 15 model = "FVP Base";
|
| /device/linaro/bootloader/arm-trusted-firmware/make_helpers/ |
| defaults.mk | 51 DEFAULT_PLAT := fvp
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/aarch64/ |
| fvp_helpers.S | 110 * boot. On FVP, this information can be queried from the power
184 * Function to calculate the core position on FVP.
|
| /device/linaro/bootloader/edk2/ArmPkg/Library/ArmLib/AArch64/ |
| AArch64Support.S | 374 // FVP is implemented.
377 orr x0, x0, #CPACR_VFP_BITS // Disable FVP traps to EL1
|
| /device/linaro/bootloader/arm-trusted-firmware/ |
| Makefile | 712 @echo "example: build all targets for the FVP platform:"
713 @echo " CROSS_COMPILE=aarch64-none-elf- make PLAT=fvp all"
|
| /external/chromium-trace/catapult/common/py_vulcanize/third_party/rcssmin/tests/yui/ |
| dataurl-base64-doublequotes.css | [all...] |
