1 /* 2 * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 motherboard { 8 arm,v2m-memory-map = "rs1"; 9 compatible = "arm,vexpress,v2m-p1", "simple-bus"; 10 #address-cells = <2>; /* SMB chipselect number and offset */ 11 #size-cells = <1>; 12 ranges; 13 14 flash@0,00000000 { 15 compatible = "arm,vexpress-flash", "cfi-flash"; 16 reg = <0 0x00000000 0x04000000>, 17 <4 0x00000000 0x04000000>; 18 bank-width = <4>; 19 }; 20 21 vram@2,00000000 { 22 compatible = "arm,vexpress-vram"; 23 reg = <2 0x00000000 0x00800000>; 24 }; 25 26 ethernet@2,02000000 { 27 compatible = "smsc,lan91c111"; 28 reg = <2 0x02000000 0x10000>; 29 interrupts = <0 15 4>; 30 }; 31 32 v2m_clk24mhz: clk24mhz { 33 compatible = "fixed-clock"; 34 #clock-cells = <0>; 35 clock-frequency = <24000000>; 36 clock-output-names = "v2m:clk24mhz"; 37 }; 38 39 v2m_refclk1mhz: refclk1mhz { 40 compatible = "fixed-clock"; 41 #clock-cells = <0>; 42 clock-frequency = <1000000>; 43 clock-output-names = "v2m:refclk1mhz"; 44 }; 45 46 v2m_refclk32khz: refclk32khz { 47 compatible = "fixed-clock"; 48 #clock-cells = <0>; 49 clock-frequency = <32768>; 50 clock-output-names = "v2m:refclk32khz"; 51 }; 52 53 iofpga@3,00000000 { 54 compatible = "arm,amba-bus", "simple-bus"; 55 #address-cells = <1>; 56 #size-cells = <1>; 57 ranges = <0 3 0 0x200000>; 58 59 v2m_sysreg: sysreg@010000 { 60 compatible = "arm,vexpress-sysreg"; 61 reg = <0x010000 0x1000>; 62 gpio-controller; 63 #gpio-cells = <2>; 64 }; 65 66 v2m_sysctl: sysctl@020000 { 67 compatible = "arm,sp810", "arm,primecell"; 68 reg = <0x020000 0x1000>; 69 clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&v2m_clk24mhz>; 70 clock-names = "refclk", "timclk", "apb_pclk"; 71 #clock-cells = <1>; 72 clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3"; 73 }; 74 75 aaci@040000 { 76 compatible = "arm,pl041", "arm,primecell"; 77 reg = <0x040000 0x1000>; 78 interrupts = <0 11 4>; 79 clocks = <&v2m_clk24mhz>; 80 clock-names = "apb_pclk"; 81 }; 82 83 mmci@050000 { 84 compatible = "arm,pl180", "arm,primecell"; 85 reg = <0x050000 0x1000>; 86 interrupts = <0 9 4 0 10 4>; 87 cd-gpios = <&v2m_sysreg 0 0>; 88 wp-gpios = <&v2m_sysreg 1 0>; 89 max-frequency = <12000000>; 90 vmmc-supply = <&v2m_fixed_3v3>; 91 clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; 92 clock-names = "mclk", "apb_pclk"; 93 }; 94 95 kmi@060000 { 96 compatible = "arm,pl050", "arm,primecell"; 97 reg = <0x060000 0x1000>; 98 interrupts = <0 12 4>; 99 clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; 100 clock-names = "KMIREFCLK", "apb_pclk"; 101 }; 102 103 kmi@070000 { 104 compatible = "arm,pl050", "arm,primecell"; 105 reg = <0x070000 0x1000>; 106 interrupts = <0 13 4>; 107 clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; 108 clock-names = "KMIREFCLK", "apb_pclk"; 109 }; 110 111 v2m_serial0: uart@090000 { 112 compatible = "arm,pl011", "arm,primecell"; 113 reg = <0x090000 0x1000>; 114 interrupts = <0 5 4>; 115 clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; 116 clock-names = "uartclk", "apb_pclk"; 117 }; 118 119 v2m_serial1: uart@0a0000 { 120 compatible = "arm,pl011", "arm,primecell"; 121 reg = <0x0a0000 0x1000>; 122 interrupts = <0 6 4>; 123 clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; 124 clock-names = "uartclk", "apb_pclk"; 125 }; 126 127 v2m_serial2: uart@0b0000 { 128 compatible = "arm,pl011", "arm,primecell"; 129 reg = <0x0b0000 0x1000>; 130 interrupts = <0 7 4>; 131 clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; 132 clock-names = "uartclk", "apb_pclk"; 133 }; 134 135 v2m_serial3: uart@0c0000 { 136 compatible = "arm,pl011", "arm,primecell"; 137 reg = <0x0c0000 0x1000>; 138 interrupts = <0 8 4>; 139 clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; 140 clock-names = "uartclk", "apb_pclk"; 141 }; 142 143 wdt@0f0000 { 144 compatible = "arm,sp805", "arm,primecell"; 145 reg = <0x0f0000 0x1000>; 146 interrupts = <0 0 4>; 147 clocks = <&v2m_refclk32khz>, <&v2m_clk24mhz>; 148 clock-names = "wdogclk", "apb_pclk"; 149 }; 150 151 v2m_timer01: timer@110000 { 152 compatible = "arm,sp804", "arm,primecell"; 153 reg = <0x110000 0x1000>; 154 interrupts = <0 2 4>; 155 clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_clk24mhz>; 156 clock-names = "timclken1", "timclken2", "apb_pclk"; 157 }; 158 159 v2m_timer23: timer@120000 { 160 compatible = "arm,sp804", "arm,primecell"; 161 reg = <0x120000 0x1000>; 162 interrupts = <0 3 4>; 163 clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&v2m_clk24mhz>; 164 clock-names = "timclken1", "timclken2", "apb_pclk"; 165 }; 166 167 rtc@170000 { 168 compatible = "arm,pl031", "arm,primecell"; 169 reg = <0x170000 0x1000>; 170 interrupts = <0 4 4>; 171 clocks = <&v2m_clk24mhz>; 172 clock-names = "apb_pclk"; 173 }; 174 175 clcd@1f0000 { 176 compatible = "arm,pl111", "arm,primecell"; 177 reg = <0x1f0000 0x1000>; 178 interrupts = <0 14 4>; 179 clocks = <&v2m_oscclk1>, <&v2m_clk24mhz>; 180 clock-names = "clcdclk", "apb_pclk"; 181 mode = "XVGA"; 182 use_dma = <0>; 183 framebuffer = <0x18000000 0x00180000>; 184 }; 185 186 virtio_block@0130000 { 187 compatible = "virtio,mmio"; 188 reg = <0x130000 0x1000>; 189 interrupts = <0 0x2a 4>; 190 }; 191 }; 192 193 v2m_fixed_3v3: fixedregulator@0 { 194 compatible = "regulator-fixed"; 195 regulator-name = "3V3"; 196 regulator-min-microvolt = <3300000>; 197 regulator-max-microvolt = <3300000>; 198 regulator-always-on; 199 }; 200 201 mcc { 202 compatible = "arm,vexpress,config-bus", "simple-bus"; 203 arm,vexpress,config-bridge = <&v2m_sysreg>; 204 205 v2m_oscclk1: osc@1 { 206 /* CLCD clock */ 207 compatible = "arm,vexpress-osc"; 208 arm,vexpress-sysreg,func = <1 1>; 209 freq-range = <23750000 63500000>; 210 #clock-cells = <0>; 211 clock-output-names = "v2m:oscclk1"; 212 }; 213 214 /* 215 * Not supported in FVP models 216 * 217 * reset@0 { 218 * compatible = "arm,vexpress-reset"; 219 * arm,vexpress-sysreg,func = <5 0>; 220 * }; 221 */ 222 223 muxfpga@0 { 224 compatible = "arm,vexpress-muxfpga"; 225 arm,vexpress-sysreg,func = <7 0>; 226 }; 227 228 /* 229 * Not used - Superseded by PSCI sys_poweroff 230 * 231 * shutdown@0 { 232 * compatible = "arm,vexpress-shutdown"; 233 * arm,vexpress-sysreg,func = <8 0>; 234 * }; 235 */ 236 237 /* 238 * Not used - Superseded by PSCI sys_reset 239 * 240 * reboot@0 { 241 * compatible = "arm,vexpress-reboot"; 242 * arm,vexpress-sysreg,func = <9 0>; 243 * }; 244 */ 245 246 dvimode@0 { 247 compatible = "arm,vexpress-dvimode"; 248 arm,vexpress-sysreg,func = <11 0>; 249 }; 250 }; 251 }; 252
