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  /prebuilts/clang/host/linux-x86/clang-4639204/include/llvm/Target/
TargetSelectionDAG.td 694 // to define immediates and other common things concisely.
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  /prebuilts/clang/host/linux-x86/clang-4691093/include/llvm/Target/
TargetSelectionDAG.td 694 // to define immediates and other common things concisely.
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  /toolchain/binutils/binutils-2.27/gas/config/
tc-mn10300.c     [all...]
tc-ns32k.c 81 or immediates(s) (ascii). */
703 a label without @. Constants becomes immediates besides the addr
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xtensa-relax.c 242 replacements for instructions whose immediates do not fit their
290 /* Widening the load instructions with too-large immediates */
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tc-mn10200.c 1221 16 and 24bit immediates are little endian! */
  /art/compiler/utils/x86_64/
assembler_x86_64.h 39 // Note: Immediates can be 64b on x86-64 for certain instructions, but are often restricted
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  /external/llvm/lib/Target/Hexagon/
HexagonCopyToCombine.cpp 203 // provided both constants are true immediates.
  /external/llvm/lib/Target/Mips/
MipsSEISelDAGToDAG.cpp 893 // This allows the compiler to use a wider range of immediates than would
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  /external/llvm/lib/Target/PowerPC/
README.txt 84 It would be better to materialize .CPI_X into a register, then use immediates
  /external/llvm/test/MC/ARM/
simple-fp-encoding.s 392 @ Use NEON to load some f32 immediates that don't fit the f8 representation.
  /external/mesa3d/src/compiler/nir/
nir_from_ssa.c 487 /* We leave load_const SSA values alone. They act as immediates to
  /external/mesa3d/src/mesa/drivers/dri/i965/
brw_fs_copy_propagation.cpp 669 * bit-cast using a strided region so they cannot be immediates.
brw_eu_emit.c 381 * Don't do any of this for 64-bit immediates, since the src1 fields
505 /* two-argument instructions can only use 32-bit immediates */
847 /* 64-bit immediates are only supported on 1-src instructions */
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brw_fs_nir.cpp 713 * - 2-src instructions can't operate with 64-bit immediates
719 /* 2-src instructions can't have 64-bit immediates, so put 0.0 in
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  /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
PPCInstrInfo.cpp 96 // rotate amt is zero. We also have to munge the immediates a bit.
  /external/syslinux/gnu-efi/gnu-efi-3.0/
ChangeLog 173 efi_callX() as clean 64b values (eg. movq for immediates). The
  /external/v8/src/arm64/
constants-arm64.h 187 /* Other immediates */ \
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assembler-arm64.h 542 // Immediates.
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  /toolchain/binutils/binutils-2.27/opcodes/
ChangeLog-2004 686 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
  /external/llvm/lib/Target/X86/
X86TargetTransformInfo.cpp     [all...]
  /external/swiftshader/third_party/LLVM/utils/TableGen/
AsmMatcherEmitter.cpp 35 // encoding for small immediates). Such ambiguities should never be
60 // relations to one another (for example, 8-bit signed immediates as a
61 // subset of 32-bit immediates).
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  /external/swiftshader/third_party/subzero/docs/
DESIGN.rst 494 of whether ``B`` and ``C`` are physical registers, memory, or immediates, and
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  /toolchain/binutils/binutils-2.27/gas/testsuite/
ChangeLog-2011 22 * gas/frv/immediates.s: New test file - checks assembly of
24 * gas/frv/immediates.d: Expected disassembly.
529 * gas/mips/mips32.d: Update immediates.
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  /external/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp     [all...]

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