/external/llvm/lib/Target/Mips/TargetInfo/ |
MipsTargetInfo.cpp | 25 RegisterTarget<Triple::mips64, 26 /*HasJIT=*/true> A(TheMips64Target, "mips64", "Mips64 [experimental]");
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/external/llvm/test/MC/Mips/ |
oddspreg.s | 8 # RUN: llvm-mc %s -arch=mips64 -mcpu=mips64 -target-abi n32 | \ 11 # RUN: llvm-mc %s -arch=mips64 -mcpu=mips64 -target-abi n32 -filetype=obj -o - | \ 15 # RUN: llvm-mc %s -arch=mips64 -mcpu=mips64 | \ 20 # RUN: llvm-mc /dev/null -arch=mips64 -mcpu=mips64 -filetype=obj -o - | \ 28 # RUN: llvm-mc /dev/null -arch=mips64 -mcpu=mips64 -target-abi n32 -filetype=obj -o - | [all...] |
elf_eflags.s | 20 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64 -target-abi n64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64 %s 21 # MIPSEL-MIPS64: Flags [ (0x60000006) 23 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64 -target-abi n64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64-NAN2008 %s 24 # MIPSEL-MIPS64-NAN2008: Flags [ (0x60000406) 55 # RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64 -target-abi n32 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64-N32 %s 56 # MIPS64EL-MIPS64-N32: Flags [ (0x60000024) 58 # RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64 -target-abi n32 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS6 (…) [all...] |
reloc-directive.s | 3 # RUN: llvm-mc -triple mips64-unknown-linux < %s -show-encoding -target-abi=n32 \ 5 # RUN: llvm-mc -triple mips64-unknown-linux < %s -show-encoding -target-abi=n64 \ 10 # RUN: llvm-mc -triple mips64-unknown-linux < %s -show-encoding -target-abi=n32 \ 13 # RUN: llvm-mc -triple mips64-unknown-linux < %s -show-encoding -target-abi=n64 \ 37 # we incorrectly drop the addend. If we use a mips64-* triple then we 38 # incorrectly use the 3-reloc encoding (and ELF64). mips64-* triples
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/external/swiftshader/third_party/LLVM/lib/Target/Mips/TargetInfo/ |
MipsTargetInfo.cpp | 25 RegisterTarget<Triple::mips64, 26 /*HasJIT=*/false> A(TheMips64Target, "mips64", "Mips64 [experimental]");
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/external/llvm/test/CodeGen/Mips/ |
eh-dwarf-cfa.ll | 3 ; RUN: FileCheck %s -check-prefix=CHECK-MIPS64 4 ; RUN: llc -march=mips64el -mcpu=mips64 < %s | \ 5 ; RUN: FileCheck %s -check-prefix=CHECK-MIPS64 71 ; CHECK-MIPS64: daddiu $sp, $sp, -32 72 ; CHECK-MIPS64: daddiu $2, $sp, 32
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countleading.ll | 5 ; RUN: llc -march=mips64el -mcpu=mips64 < %s | FileCheck -check-prefixes=ALL,MIPS64-GT-R1 %s 6 ; RUN: llc -march=mips64el -mcpu=mips64r2 < %s | FileCheck -check-prefixes=ALL,MIPS64-GT-R1 %s 7 ; RUN: llc -march=mips64el -mcpu=mips64r6 < %s | FileCheck -check-prefixes=ALL,MIPS64-GT-R1 %s 12 ; MIPS32-GT-R1 - MIPS64r1 and above (does not include MIPS64's) 13 ; MIPS64-GT-R1 - MIPS64r1 and above 23 ; MIPS64-GT-R1: clz $2, $4 41 ; MIPS64-GT-R1: clo $2, $4 65 ; MIPS64-GT-R1: dclz $2, $4 91 ; MIPS64-GT-R1: dclo $2, $ [all...] |
2010-07-20-Switch.ll | 5 ; RUN: llc < %s -march=mips64 -relocation-model=pic -mcpu=mips4 | \ 7 ; RUN: llc < %s -march=mips64 -relocation-model=static -mcpu=mips4 | \ 9 ; RUN: llc < %s -march=mips64 -relocation-model=pic -mcpu=mips64 | \ 11 ; RUN: llc < %s -march=mips64 -relocation-model=static -mcpu=mips64 | \
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/external/llvm/test/CodeGen/Mips/llvm-ir/ |
indirectbr.ll | 8 ; RUN: llc -march=mips64 -mcpu=mips4 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6 9 ; RUN: llc -march=mips64 -mcpu=mips64 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6 10 ; RUN: llc -march=mips64 -mcpu=mips64r2 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6 11 ; RUN: llc -march=mips64 -mcpu=mips64r3 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6 12 ; RUN: llc -march=mips64 -mcpu=mips64r5 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6 13 ; RUN: llc -march=mips64 -mcpu=mips64r6 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,R6
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/external/llvm/test/CodeGen/Mips/msa/ |
elm_copy.ll | 8 ; RUN: llc -march=mips64 -mcpu=mips64r2 -mattr=+msa,+fp64 -relocation-model=pic < %s | \ 9 ; RUN: FileCheck %s -check-prefixes=MIPS-ANY,MIPS64 11 ; RUN: FileCheck %s -check-prefixes=MIPS-ANY,MIPS64 28 ; MIPS64-DAG: ld [[R1:\$[0-9]+]], %got_disp(llvm_mips_copy_s_b_ARG1) 32 ; MIPS64-DAG: ld [[RES:\$[0-9]+]], %got_disp(llvm_mips_copy_s_b_RES) 51 ; MIPS64-DAG: ld [[R1:\$[0-9]+]], %got_disp(llvm_mips_copy_s_h_ARG1) 55 ; MIPS64-DAG: ld [[RES:\$[0-9]+]], %got_disp(llvm_mips_copy_s_h_RES) 74 ; MIPS64-DAG: ld [[R1:\$[0-9]+]], %got_disp(llvm_mips_copy_s_w_ARG1) 78 ; MIPS64-DAG: ld [[RES:\$[0-9]+]], %got_disp(llvm_mips_copy_s_w_RES) 97 ; MIPS64-DAG: ld [[R1:\$[0-9]+]], %got_disp(llvm_mips_copy_s_d_ARG1 [all...] |
2r_vector_scalar.ll | 8 ; RUN: llc -march=mips64 -mcpu=mips64r2 -mattr=+msa,+fp64 -relocation-model=pic < %s | \ 9 ; RUN: FileCheck %s -check-prefixes=MIPS-ANY,MIPS64 11 ; RUN: FileCheck %s -check-prefixes=MIPS-ANY,MIPS64 28 ; MIPS64-DAG: ld [[R1:\$[0-9]+]], 48 ; MIPS64-DAG: ld [[R1:\$[0-9]+]], 68 ; MIPS64-DAG: ld [[R1:\$[0-9]+]], 89 ; MIPS64-DAG: ld [[R1:\$[0-9]+]], %got_disp(llvm_mips_fill_d_ARG1) 95 ; MIPS64-DAG: fill.d [[WD:\$w[0-9]+]], [[R1]] 97 ; MIPS64-DAG: ld [[RD:\$[0-9]+]], %got_disp(llvm_mips_fill_d_RES) 98 ; MIPS64-DAG: st.d [[WD]], 0([[RD]] [all...] |
/external/valgrind/docs/internals/ |
qemu-mips64-linux-HOWTO.txt | 2 How to install and configure a QEMU mips64-linux installation. 7 This gives an apparently stable, but extremely slow, mips64-linux 14 https://gmplib.org/~tege/qemu.html section 8 (for mips64) 16 Build qemu-2.2.1 with --target-list including mips64-softmmu 18 mkdir Mips64-1 19 cd Mips64-1 35 /path/to/Qemu221/bin/qemu-system-mips64 \ 85 /path/to/Qemu221/bin/qemu-system-mips64 \ 110 CFLAGS="-mips64 -mabi=64" CXXFLAGS="-mips64 -mabi=64" [all...] |
/prebuilts/clang/host/linux-x86/ |
Android.bp | 63 name: "libclang_rt.asan-mips64-android", 66 mips64: { 123 name: "libclang_rt.asan-mips64-android", 126 mips64: { 195 name: "libclang_rt.ubsan_standalone-mips64-android", 202 mips64: { 265 name: "libclang_rt.ubsan_minimal-mips64-android", 272 mips64: { 354 name: "libclang_rt.profile-mips64-android", 358 mips64: [all...] |
/bionic/libc/ |
SECCOMP_BLACKLIST_APP.TXT | 13 # arch ::= "arm" | "arm64" | "mips" | "mips64" | "x86" | "x86_64" 34 int setgid:setgid(gid_t) arm64,mips,mips64,x86_64 36 int setuid:setuid(uid_t) arm64,mips,mips64,x86_64 38 int setreuid:setreuid(uid_t, uid_t) arm64,mips,mips64,x86_64 40 int setresgid:setresgid(gid_t, gid_t, gid_t) arm64,mips,mips64,x86_64 44 int setgroups:setgroups(int, const gid_t*) arm64,mips,mips64,x86_64
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/external/clang/test/Driver/ |
biarch.c | 27 // RUN: %clang -target mips64--netbsd -m32 %s -### 2>&1 | FileCheck -check-prefix=MIPS %s 31 // RUN: %clang -target mips64--netbsd -m64 %s -### 2>&1 | FileCheck -check-prefix=MIPS64 %s 32 // RUN: %clang -target mips--netbsd -m64 %s -### 2>&1 | FileCheck -check-prefix=MIPS64 %s 33 // MIPS64: "-cc1" "-triple" "mips64--netbsd"
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freebsd-mips-as.c | 38 // RUN: %clang -target mips64-unknown-freebsd -### \ 40 // RUN: | FileCheck -check-prefix=MIPS64-EB-AS %s 41 // MIPS64-EB-AS: as{{(.exe)?}}" "-march" "mips64r2" "-mabi" "64" "-EB" 45 // RUN: | FileCheck -check-prefix=MIPS64-DEF-EL-AS %s 46 // MIPS64-DEF-EL-AS: as{{(.exe)?}}" "-march" "mips64r2" "-mabi" "64" "-EL" 48 // RUN: %clang -target mips64-unknown-freebsd -mabi=n32 -### \ 60 // RUN: | FileCheck -check-prefix=MIPS64-EL-AS %s 61 // MIPS64-EL-AS: as{{(.exe)?}}" "-march" "mips64r2" "-mabi" "64" "-EL" 78 // RUN: %clang -target mips64-unknown-freebsd -mips64 -### [all...] |
/art/compiler/jni/quick/mips64/ |
calling_convention_mips64.h | 24 namespace mips64 { namespace in namespace:art 78 // Mips64 does not need to extend small return types. 90 } // namespace mips64
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/external/clang/test/CodeGen/ |
atomics-inlining.c | 5 // RUN: %clang_cc1 -triple mips64el-linux-gnu -emit-llvm %s -o - | FileCheck %s -check-prefix=MIPS64 83 // MIPS64-LABEL: define void @test1 84 // MIPS64: = load atomic i8, i8* @c1 seq_cst 85 // MIPS64: store atomic i8 {{.*}}, i8* @c1 seq_cst 86 // MIPS64: = load atomic i16, i16* @s1 seq_cst 87 // MIPS64: store atomic i16 {{.*}}, i16* @s1 seq_cst 88 // MIPS64: = load atomic i32, i32* @i1 seq_cst 89 // MIPS64: store atomic i32 {{.*}}, i32* @i1 seq_cst 90 // MIPS64: = load atomic i64, i64* @ll1 seq_cst 91 // MIPS64: store atomic i64 {{.*}}, i64* @ll1 seq_cs [all...] |
/external/libvpx/ |
Android.bp.in | 61 mips64: { 63 local_include_dirs: ["config/mips64"], 68 local_include_dirs: ["config/mips64-msa"],
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/external/llvm/test/CodeGen/Mips/cconv/ |
stack-alignment.ll | 4 ; RUN-TODO: llc -march=mips64 -target-abi o32 < %s | FileCheck --check-prefixes=ALL,O32 %s 7 ; RUN: llc -march=mips64 -target-abi n32 < %s | FileCheck --check-prefixes=ALL,N32 %s 10 ; RUN: llc -march=mips64 -target-abi n64 < %s | FileCheck --check-prefixes=ALL,N64 %s
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/external/v8/ |
Android.v8.mk | 542 src/builtins/mips64/builtins-mips64.cc \ 543 src/compiler/mips64/code-generator-mips64.cc \ 544 src/compiler/mips64/instruction-scheduler-mips64.cc \ 545 src/compiler/mips64/instruction-selector-mips64.cc \ 546 src/crankshaft/mips64/lithium-codegen-mips64.cc [all...] |
/prebuilts/go/darwin-x86/src/cmd/link/ |
main.go | 15 "cmd/link/internal/mips64" 55 case "mips64", "mips64le": 56 arch, theArch = mips64.Init()
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/prebuilts/go/linux-x86/src/cmd/link/ |
main.go | 15 "cmd/link/internal/mips64" 55 case "mips64", "mips64le": 56 arch, theArch = mips64.Init()
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/art/compiler/utils/ |
label.h | 36 namespace mips64 { namespace in namespace:art 39 } // namespace mips64 120 friend class mips64::Mips64Assembler; 121 friend class mips64::Mips64Label;
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/art/runtime/arch/mips64/ |
fault_handler_mips64.cc | 35 // Mips64 specific fault handler functions. 45 *out_sp = static_cast<uintptr_t>(sc->sc_regs[mips64::SP]); 57 *out_method = reinterpret_cast<ArtMethod*>(sc->sc_regs[mips64::A0]); 86 sc->sc_regs[mips64::SP] -= mips64::Mips64CalleeSaveFrameSize(CalleeSaveType::kSaveEverything); 87 uintptr_t* padding = reinterpret_cast<uintptr_t*>(sc->sc_regs[mips64::SP]) + /* ArtMethod* */ 1; 90 sc->sc_regs[mips64::RA] = sc->sc_pc + 4; // RA needs to point to gc map location 121 uintptr_t sp = sc->sc_regs[mips64::SP]; 144 sc->sc_regs[mips64::T9] = sc->sc_pc; // make sure T9 points to the function
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