| /external/clang/test/CodeGenCXX/ |
| goto.cpp | 11 // CHECK-NEXT: [[X:%.*]] = alloca i32
12 // CHECK-NEXT: [[Y:%.*]] = alloca [[A:%.*]],
13 // CHECK-NEXT: [[Z:%.*]] = alloca [[A]]
14 // CHECK-NEXT: [[EXN:%.*]] = alloca i8*
15 // CHECK-NEXT: [[SEL:%.*]] = alloca i32
16 // CHECK-NEXT: [[V:%.*]] = alloca [[V:%.*]]*,
17 // CHECK-NEXT: [[TMP:%.*]] = alloca [[A]]
18 // CHECK-NEXT: [[CLEANUPACTIVE:%.*]] = alloca i1
20 // CHECK-NEXT: invoke void @_ZN5test01AC1Ev([[A]]* [[Z]])
24 // CHECK-NEXT: invoke void @_ZN5test01AC1Ev([[A]]* [[TMP]]
[all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-hello.ll | 6 ; CHECK-NEXT: stp x29, x30, [sp, #16]
7 ; CHECK-NEXT: add x29, sp, #16
8 ; CHECK-NEXT: stur wzr, [x29, #-4]
11 ; CHECK-NEXT: bl _puts
12 ; CHECK-NEXT: ldp x29, x30, [sp, #16]
13 ; CHECK-NEXT: add sp, sp, #32
14 ; CHECK-NEXT: ret
18 ; CHECK-LINUX-NEXT: str wzr, [sp, #12]
21 ; CHECK-LINUX-NEXT: bl puts
22 ; CHECK-LINUX-NEXT: ldr x30, [sp], #1
[all...] |
| fast-isel-cmp-vec.ll | 12 ; CHECK-NEXT: cmeq.2s [[CMP:v[0-9]+]], v0, #0
13 ; CHECK-NEXT: ; BB#1:
14 ; CHECK-NEXT: movi.2s [[MASK:v[0-9]+]], #1
15 ; CHECK-NEXT: and.8b v0, [[CMP]], [[MASK]]
16 ; CHECK-NEXT: ret
27 ; CHECK-NEXT: movi d[[CMP:[0-9]+]], #0xffffffffffffffff
28 ; CHECK-NEXT: ; BB#1:
29 ; CHECK-NEXT: movi.2s [[MASK:v[0-9]+]], #1
30 ; CHECK-NEXT: and.8b v0, v[[CMP]], [[MASK]]
31 ; CHECK-NEXT: re
[all...] |
| /external/llvm/test/CodeGen/SystemZ/ |
| selectcc-03.ll | 9 ; CHECK-NEXT: afi [[REG]], -268435456
10 ; CHECK-NEXT: sllg [[REG]], [[REG]], 32
11 ; CHECK-NEXT: srag %r2, [[REG]], 63
22 ; CHECK-NEXT: xilf [[REG]], 268435456
23 ; CHECK-NEXT: afi [[REG]], -268435456
24 ; CHECK-NEXT: sllg [[REG]], [[REG]], 32
25 ; CHECK-NEXT: srag %r2, [[REG]], 63
36 ; CHECK-NEXT: afi [[REG]], -536870912
37 ; CHECK-NEXT: sllg [[REG]], [[REG]], 32
38 ; CHECK-NEXT: srag %r2, [[REG]], 6
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| implicit-null-check.ll | 143 ; CHECK-NEXT: .byte 1
146 ; CHECK-NEXT: .byte 0
147 ; CHECK-NEXT: .short 0
150 ; CHECK-NEXT: .long 5
153 ; CHECK-NEXT: .quad _imp_null_check_add_result
155 ; CHECK-NEXT: .long 1
157 ; CHECK-NEXT: .long 0
159 ; CHECK-NEXT: .long 1
161 ; CHECK-NEXT: .long [[BB0_imp_null_check_add_result]]-_imp_null_check_add_result
163 ; CHECK-NEXT: .long [[BB1_imp_null_check_add_result]]-_imp_null_check_add_resul
[all...] |
| inreg.ll | 13 ; DAG-NEXT: $43, (%esp)
14 ; DAG-NEXT: leal 16(%esp), %eax
15 ; DAG-NEXT: movl $41, %edx
16 ; DAG-NEXT: movl $42, %ecx
17 ; DAG-NEXT: calll f
18 ; DAG-NEXT: addl $[[AMT]], %esp
19 ; DAG-NEXT: ret
23 ; FAST-NEXT: leal 8(%esp), %eax
24 ; FAST-NEXT: movl $41, %edx
25 ; FAST-NEXT: movl $42, %ec
[all...] |
| avx512-arith.ll | 11 ; CHECK-NEXT: vaddpd %zmm0, %zmm1, %zmm0
12 ; CHECK-NEXT: retq
21 ; CHECK-NEXT: vaddpd {{.*}}(%rip), %zmm0, %zmm0
22 ; CHECK-NEXT: retq
31 ; CHECK-NEXT: vaddps %zmm0, %zmm1, %zmm0
32 ; CHECK-NEXT: retq
41 ; CHECK-NEXT: vaddps {{.*}}(%rip), %zmm0, %zmm0
42 ; CHECK-NEXT: retq
51 ; CHECK-NEXT: vsubpd %zmm0, %zmm1, %zmm0
52 ; CHECK-NEXT: ret
[all...] |
| vector-shift-ashr-512.ll | 11 ; ALL-NEXT: vpsravq %zmm1, %zmm0, %zmm0
12 ; ALL-NEXT: retq
20 ; ALL-NEXT: vpsravd %zmm1, %zmm0, %zmm0
21 ; ALL-NEXT: retq
29 ; AVX512DQ-NEXT: vpxor %ymm4, %ymm4, %ymm4
30 ; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm5 = ymm2[4],ymm4[4],ymm2[5],ymm4[5],ymm2[6],ymm4[6],ymm2[7],ymm4[7],ymm2[12],ymm4[12],ymm2[13],ymm4[13],ymm2[14],ymm4[14],ymm2[15],ymm4[15]
31 ; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm6 = ymm4[4],ymm0[4],ymm4[5],ymm0[5],ymm4[6],ymm0[6],ymm4[7],ymm0[7],ymm4[12],ymm0[12],ymm4[13],ymm0[13],ymm4[14],ymm0[14],ymm4[15],ymm0[15]
32 ; AVX512DQ-NEXT: vpsravd %ymm5, %ymm6, %ymm5
33 ; AVX512DQ-NEXT: vpsrld $16, %ymm5, %ymm5
34 ; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm2 = ymm2[0],ymm4[0],ymm2[1],ymm4[1],ymm2[2],ymm4[2],ymm2[3],ymm4[3],ymm (…)
[all...] |
| movgs.ll | 8 ; X32-NEXT: movl %gs:196, %eax
9 ; X32-NEXT: movl (%eax), %eax
10 ; X32-NEXT: retl
14 ; X64-NEXT: movq %gs:320, %rax
15 ; X64-NEXT: movl (%rax), %eax
16 ; X64-NEXT: retq
26 ; X32-NEXT: subl $12, %esp
27 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
28 ; X32-NEXT: calll *%gs:(%eax)
29 ; X32-NEXT: xorl %eax, %ea
[all...] |
| widen_bitops-0.ll | 12 ; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
13 ; X32-SSE-NEXT: andl {{[0-9]+}}(%esp), %eax
14 ; X32-SSE-NEXT: retl
18 ; X64-SSE-NEXT: andl %esi, %edi
19 ; X64-SSE-NEXT: movl %edi, %eax
20 ; X64-SSE-NEXT: retq
31 ; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
32 ; X32-SSE-NEXT: xorl {{[0-9]+}}(%esp), %eax
33 ; X32-SSE-NEXT: retl
37 ; X64-SSE-NEXT: xorl %esi, %ed
[all...] |
| f16c-intrinsics-fast-isel.ll | 10 ; X32-NEXT: pushl %eax
11 ; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
12 ; X32-NEXT: vmovd %eax, %xmm0
13 ; X32-NEXT: vcvtph2ps %xmm0, %xmm0
14 ; X32-NEXT: vmovss %xmm0, (%esp)
15 ; X32-NEXT: flds (%esp)
16 ; X32-NEXT: popl %eax
17 ; X32-NEXT: retl
21 ; X64-NEXT: movzwl %di, %eax
22 ; X64-NEXT: vmovd %eax, %xmm
[all...] |
| vector-shuffle-256-v4.ll | 11 ; AVX1-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
12 ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
13 ; AVX1-NEXT: retq
17 ; AVX2-NEXT: vbroadcastsd %xmm0, %ymm0
18 ; AVX2-NEXT: retq
22 ; AVX512VL-NEXT: vbroadcastsd %xmm0, %ymm0
23 ; AVX512VL-NEXT: retq
31 ; AVX1-NEXT: vmovddup {{.*#+}} xmm1 = xmm0[0,0]
32 ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
33 ; AVX1-NEXT: ret
[all...] |
| /external/llvm/test/Transforms/InstCombine/ |
| sub-xor.ll | 9 ; CHECK-NEXT: and i32 %x, 31
10 ; CHECK-NEXT: xor i32 %and, 63
11 ; CHECK-NEXT: ret
22 ; CHECK-NEXT: ctlz
23 ; CHECK-NEXT: xor i32 %count, 31
24 ; CHECK-NEXT: ret
34 ; CHECK-NEXT: and i32 %x, 31
35 ; CHECK-NEXT: sub nsw i32 73, %and
36 ; CHECK-NEXT: ret
45 ; CHECK-NEXT: add i32 %x, -214748360
[all...] |
| /external/llvm/test/tools/llvm-profdata/ |
| value-prof.proftext | 49 #ICTXT-NEXT: Indirect Target Results:
50 #ICTXT-NEXT: [ 1, foo, 100 ]
51 #ICTXT-NEXT: [ 1, foo2, 1000 ]
52 #ICTXT-NEXT: [ 2, foo2, 20000 ]
55 #IC-NEXT: Indirect Target Results:
56 #IC-NEXT: [ 1, foo2, 1000 ]
57 #IC-NEXT: [ 1, foo, 100 ]
58 #IC-NEXT: [ 2, foo2, 20000 ]
61 #ICTEXT-NEXT: foo2:1000
62 #ICTEXT-NEXT:
[all...] |
| /external/blktrace/btt/ |
| list.h | 35 struct list_head *next, *prev; member in struct:list_head
45 list->next = list;
53 * the prev/next entries already!
57 struct list_head *next)
59 next->prev = new;
60 new->next = next;
62 prev->next = new;
75 __list_add(new, head, head->next);
92 * Delete a list entry by making the prev/next entrie
[all...] |
| /external/clang/test/CodeGen/ |
| block-byref-aggr.c | 17 // CHECK-NEXT: [[TEMP:%.*]] = alloca [[AGG]], align 4
19 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[AGG]], [[AGG]]* [[TEMP]], i32 0, i32 0
20 // CHECK-NEXT: store i32 [[RESULT]], i32* [[T0]]
22 // CHECK-NEXT: [[A_FORWARDING:%.*]] = getelementptr inbounds [[BYREF]], [[BYREF]]* [[A]], i32 0, i32 1
23 // CHECK-NEXT: [[T0:%.*]] = load [[BYREF]]*, [[BYREF]]** [[A_FORWARDING]]
24 // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[BYREF]], [[BYREF]]* [[T0]], i32 0, i32 4
25 // CHECK-NEXT: [[T2:%.*]] = bitcast [[AGG]]* [[T1]] to i8*
26 // CHECK-NEXT: [[T3:%.*]] = bitcast [[AGG]]* [[TEMP]] to i8*
27 // CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[T2]], i8* [[T3]], i64 4, i32 4, i1 false)
29 // CHECK-NEXT: [[T0:%.*]] = bitcast [[BYREF]]* [[A]] to i8
[all...] |
| atomic-arm64.c | 26 // CHECK-NEXT: store i8 1, i8* [[TEMP]]
27 // CHECK-NEXT: [[T0:%.*]] = load i8, i8* [[TEMP]], align 1
28 // CHECK-NEXT: store atomic i8 [[T0]], i8* @a_bool seq_cst, align 1
35 // CHECK-NEXT: store float 3.000000e+00, float* [[TEMP]]
36 // CHECK-NEXT: [[T0:%.*]] = bitcast float* [[TEMP]] to i32*
37 // CHECK-NEXT: [[T1:%.*]] = load i32, i32* [[T0]], align 4
38 // CHECK-NEXT: store atomic i32 [[T1]], i32* bitcast (float* @a_float to i32*) seq_cst, align 4
45 // CHECK-NEXT: store i8* @a_bool, i8** [[TEMP]]
46 // CHECK-NEXT: [[T0:%.*]] = bitcast i8** [[TEMP]] to i64*
47 // CHECK-NEXT: [[T1:%.*]] = load i64, i64* [[T0]], align
[all...] |
| /external/compiler-rt/test/profile/Inputs/ |
| instrprof-value-prof-evict.c | 67 // CHECK-NEXT: 1, callee_0
70 // CHECK-NEXT: 2, callee_0
73 // CHECK-NEXT: 3, callee_0
76 // CHECK-NEXT: 4, callee_0
79 // CHECK-NEXT: 5, callee_0
82 // CHECK-NEXT: 6, callee_0
85 // CHECK-NEXT: 7, callee_0
88 // CHECK-NEXT: 8, callee_0
89 // CHECK-NEXT: 8, callee_1
92 // CHECK-NEXT: 9, callee_
[all...] |
| /external/llvm/test/CodeGen/PowerPC/ |
| store-update.ll | 14 ; CHECK-NEXT: stbu
15 ; CHECK-NEXT: blr
25 ; CHECK-NEXT: stbux
26 ; CHECK-NEXT: blr
36 ; CHECK-NEXT: sthu
37 ; CHECK-NEXT: blr
47 ; CHECK-NEXT: sldi
48 ; CHECK-NEXT: sthux
49 ; CHECK-NEXT: blr
59 ; CHECK-NEXT: stw
[all...] |
| /external/mesa3d/src/gallium/state_trackers/nine/ |
| nine_shader.h | 11 * The above copyright notice and this permission notice (including the next
38 struct nine_range *ranges; /* single MALLOC, but next-pointers valid */
124 struct nine_shader_variant *next; member in struct:nine_shader_variant
132 while (list->key != key && list->next)
133 list = list->next;
143 while (list->next) {
145 list = list->next;
147 list->next = MALLOC_STRUCT(nine_shader_variant);
148 if (!list->next)
150 list->next->next = NULL
168 struct nine_shader_variant_so *next; member in struct:nine_shader_variant_so
[all...] |
| /frameworks/base/tools/preload2/src/com/android/preload/ui/ |
| SequenceUI.java | 119 Object next = sequence.remove(0); local
120 if (next instanceof Action) {
121 ((Action)next).actionPerformed(null);
123 throw new IllegalStateException("Didn't expect a non-action: " + next);
136 Object next = sequence.remove(0); local
137 if (next instanceof ClientSelector) {
138 return ((ClientSelector)next).getClient();
140 throw new IllegalStateException("Unexpected: " + next);
145 Object next = sequence.remove(0); local
146 if (next instanceof Integer)
172 Object next = sequence.remove(0); local
181 Object next = sequence.remove(0); local
190 Object next = sequence.remove(0); local
205 Object next = sequence.remove(0); local
215 Object next = sequence.remove(0); local
[all...] |
| /external/swiftshader/third_party/subzero/tests_lit/reader_tests/ |
| insertextract.ll | 19 ; CHECK-NEXT: entry:
20 ; CHECK-NEXT: %e0 = extractelement <4 x i1> %v, i32 0
21 ; CHECK-NEXT: %e1 = extractelement <4 x i1> %v, i32 1
22 ; CHECK-NEXT: %e2 = extractelement <4 x i1> %v, i32 2
23 ; CHECK-NEXT: %e3 = extractelement <4 x i1> %v, i32 3
24 ; CHECK-NEXT: ret void
25 ; CHECK-NEXT: }
40 ; CHECK-NEXT: define internal void @ExtractV8xi1(<8 x i1> %v) {
41 ; CHECK-NEXT: entry:
42 ; CHECK-NEXT: %e0 = extractelement <8 x i1> %v, i32
[all...] |
| nacl-atomic-intrinsics.ll | 39 ; CHECK-NEXT: entry:
40 ; CHECK-NEXT: %i = call i8 @llvm.nacl.atomic.load.i8(i32 %iptr, i32 6)
41 ; CHECK-NEXT: %r = zext i8 %i to i32
42 ; CHECK-NEXT: ret i32 %r
43 ; CHECK-NEXT: }
53 ; CHECK-NEXT: define internal i32 @test_atomic_load_16(i32 %iptr) {
54 ; CHECK-NEXT: entry:
55 ; CHECK-NEXT: %i = call i16 @llvm.nacl.atomic.load.i16(i32 %iptr, i32 6)
56 ; CHECK-NEXT: %r = zext i16 %i to i32
57 ; CHECK-NEXT: ret i32 %
[all...] |
| /external/clang/test/CodeGenObjCXX/ |
| arc-blocks.mm | 22 // CHECK-NEXT: store i8* bitcast (void (i8*, i8*)* [[COPY_HELPER:@.*]] to i8*), i8** [[T0]]
23 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[BYREF_A]], [[BYREF_A]]* [[V]], i32 0, i32 5
24 // CHECK-NEXT: store i8* bitcast (void (i8*)* [[DISPOSE_HELPER:@.*]] to i8*), i8** [[T0]]
25 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[BYREF_A]], [[BYREF_A]]* [[V]], i32 0, i32 6
26 // CHECK-NEXT: store i8* getelementptr inbounds ([3 x i8], [3 x i8]* [[LAYOUT0]], i32 0, i32 0), i8** [[T0]]
27 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[BYREF_A]], [[BYREF_A]]* [[V]], i32 0, i32 7
28 // CHECK-NEXT: call void @_ZN5test01AC1Ev([[A]]* [[T0]])
29 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[BYREF_A]], [[BYREF_A]]* [[V]], i32 0, i32 7
30 // CHECK-NEXT: [[T1:%.*]] = bitcast [[BYREF_A]]* [[V]] to i8*
31 // CHECK-NEXT: call void @_Block_object_dispose(i8* [[T1]], i32 8
[all...] |
| arc.mm | 23 // CHECK-NEXT: [[T1:%.*]] = call i8* @objc_retainAutoreleasedReturnValue(i8* [[T0]])
24 // CHECK-NEXT: [[T2:%.*]] = load i8**, i8*** {{%.*}}, align 8
25 // CHECK-NEXT: [[T3:%.*]] = call i8* @objc_storeWeak(i8** [[T2]], i8* [[T1]])
26 // CHECK-NEXT: [[T4:%.*]] = call i8* @objc_retain(i8* [[T3]])
27 // CHECK-NEXT: store i8* [[T4]], i8**
28 // CHECK-NEXT: call void @objc_release(i8* [[T1]])
32 // CHECK-NEXT: [[T1:%.*]] = call i8* @objc_retainAutoreleasedReturnValue(i8* [[T0]])
33 // CHECK-NEXT: [[T2:%.*]] = load i8**, i8*** {{%.*}}, align 8
34 // CHECK-NEXT: [[T3:%.*]] = call i8* @objc_storeWeak(i8** [[T2]], i8* [[T1]])
35 // CHECK-NEXT: [[T4:%.*]] = call i8* @objc_loadWeakRetained(i8** [[T2]]
[all...] |
