1 // RUN: %clang_cc1 %s -emit-llvm -o - -triple=arm64-apple-ios7 | FileCheck %s 2 3 // Memory ordering values. 4 enum { 5 memory_order_relaxed = 0, 6 memory_order_consume = 1, 7 memory_order_acquire = 2, 8 memory_order_release = 3, 9 memory_order_acq_rel = 4, 10 memory_order_seq_cst = 5 11 }; 12 13 typedef struct { void *a, *b; } pointer_pair_t; 14 typedef struct { void *a, *b, *c, *d; } pointer_quad_t; 15 16 // rdar://13489679 17 18 extern _Atomic(_Bool) a_bool; 19 extern _Atomic(float) a_float; 20 extern _Atomic(void*) a_pointer; 21 extern _Atomic(pointer_pair_t) a_pointer_pair; 22 extern _Atomic(pointer_quad_t) a_pointer_quad; 23 24 // CHECK-LABEL:define void @test0() 25 // CHECK: [[TEMP:%.*]] = alloca i8, align 1 26 // CHECK-NEXT: store i8 1, i8* [[TEMP]] 27 // CHECK-NEXT: [[T0:%.*]] = load i8, i8* [[TEMP]], align 1 28 // CHECK-NEXT: store atomic i8 [[T0]], i8* @a_bool seq_cst, align 1 29 void test0() { 30 __c11_atomic_store(&a_bool, 1, memory_order_seq_cst); 31 } 32 33 // CHECK-LABEL:define void @test1() 34 // CHECK: [[TEMP:%.*]] = alloca float, align 4 35 // CHECK-NEXT: store float 3.000000e+00, float* [[TEMP]] 36 // CHECK-NEXT: [[T0:%.*]] = bitcast float* [[TEMP]] to i32* 37 // CHECK-NEXT: [[T1:%.*]] = load i32, i32* [[T0]], align 4 38 // CHECK-NEXT: store atomic i32 [[T1]], i32* bitcast (float* @a_float to i32*) seq_cst, align 4 39 void test1() { 40 __c11_atomic_store(&a_float, 3, memory_order_seq_cst); 41 } 42 43 // CHECK-LABEL:define void @test2() 44 // CHECK: [[TEMP:%.*]] = alloca i8*, align 8 45 // CHECK-NEXT: store i8* @a_bool, i8** [[TEMP]] 46 // CHECK-NEXT: [[T0:%.*]] = bitcast i8** [[TEMP]] to i64* 47 // CHECK-NEXT: [[T1:%.*]] = load i64, i64* [[T0]], align 8 48 // CHECK-NEXT: store atomic i64 [[T1]], i64* bitcast (i8** @a_pointer to i64*) seq_cst, align 8 49 void test2() { 50 __c11_atomic_store(&a_pointer, &a_bool, memory_order_seq_cst); 51 } 52 53 // CHECK-LABEL:define void @test3( 54 // CHECK: [[PAIR:%.*]] = alloca [[PAIR_T:%.*]], align 8 55 // CHECK-NEXT: [[TEMP:%.*]] = alloca [[PAIR_T]], align 8 56 // CHECK: llvm.memcpy 57 // CHECK-NEXT: [[T0:%.*]] = bitcast [[PAIR_T]]* [[TEMP]] to i128* 58 // CHECK-NEXT: [[T1:%.*]] = load i128, i128* [[T0]], align 8 59 // CHECK-NEXT: store atomic i128 [[T1]], i128* bitcast ([[PAIR_T]]* @a_pointer_pair to i128*) seq_cst, align 16 60 void test3(pointer_pair_t pair) { 61 __c11_atomic_store(&a_pointer_pair, pair, memory_order_seq_cst); 62 } 63 64 // CHECK-LABEL:define void @test4( 65 // CHECK: [[TEMP:%.*]] = alloca [[QUAD_T:%.*]], align 8 66 // CHECK-NEXT: [[T0:%.*]] = bitcast [[QUAD_T]]* [[TEMP]] to i8* 67 // CHECK-NEXT: [[T1:%.*]] = bitcast [[QUAD_T]]* {{%.*}} to i8* 68 // CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[T0]], i8* [[T1]], i64 32, i32 8, i1 false) 69 // CHECK-NEXT: [[T0:%.*]] = bitcast [[QUAD_T]]* [[TEMP]] to i256* 70 // CHECK-NEXT: [[T1:%.*]] = bitcast i256* [[T0]] to i8* 71 // CHECK-NEXT: call void @__atomic_store(i64 32, i8* bitcast ([[QUAD_T]]* @a_pointer_quad to i8*), i8* [[T1]], i32 5) 72 void test4(pointer_quad_t quad) { 73 __c11_atomic_store(&a_pointer_quad, quad, memory_order_seq_cst); 74 } 75
