| /external/llvm/test/CodeGen/X86/ |
| mmx-bitcast.ll | 6 ; CHECK-NEXT: movq
7 ; CHECK-NEXT: paddq %mm0, %mm0
8 ; CHECK-NEXT: movd %mm0, %rax
9 ; CHECK-NEXT: retq
19 ; CHECK-NEXT: movq
20 ; CHECK-NEXT: paddd %mm0, %mm0
21 ; CHECK-NEXT: movd %mm0, %rax
22 ; CHECK-NEXT: retq
32 ; CHECK-NEXT: movq
33 ; CHECK-NEXT: paddw %mm0, %mm
[all...] |
| v2f32.ll | 9 ; X64-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
10 ; X64-NEXT: addss %xmm0, %xmm1
11 ; X64-NEXT: movss %xmm1, (%rdi)
12 ; X64-NEXT: retq
16 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
17 ; X32-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
18 ; X32-NEXT: addss %xmm0, %xmm1
19 ; X32-NEXT: movss %xmm1, (%eax)
20 ; X32-NEXT: retl
31 ; X64-NEXT: addps %xmm1, %xmm
[all...] |
| sse3-avx-addsub-2.ll | 11 ; SSE-NEXT: addsubps %xmm1, %xmm0
12 ; SSE-NEXT: retq
16 ; AVX-NEXT: vaddsubps %xmm1, %xmm0, %xmm0
17 ; AVX-NEXT: retq
40 ; SSE-NEXT: addsubps %xmm1, %xmm0
41 ; SSE-NEXT: retq
45 ; AVX-NEXT: vaddsubps %xmm1, %xmm0, %xmm0
46 ; AVX-NEXT: retq
61 ; SSE-NEXT: addsubps %xmm1, %xmm0
62 ; SSE-NEXT: ret
[all...] |
| sse2-vector-shifts.ll | 9 ; CHECK-NEXT: retq
18 ; CHECK-NEXT: paddw %xmm0, %xmm0
19 ; CHECK-NEXT: retq
28 ; CHECK-NEXT: psllw $15, %xmm0
29 ; CHECK-NEXT: retq
38 ; CHECK-NEXT: retq
47 ; CHECK-NEXT: paddd %xmm0, %xmm0
48 ; CHECK-NEXT: retq
57 ; CHECK-NEXT: pslld $31, %xmm0
58 ; CHECK-NEXT: ret
[all...] |
| vector-shuffle-256-v8.ll | 10 ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,0]
11 ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
12 ; AVX1-NEXT: retq
16 ; AVX2-NEXT: vbroadcastss %xmm0, %ymm0
17 ; AVX2-NEXT: retq
25 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[0,0,0,0]
26 ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,1,0]
27 ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
28 ; AVX1-NEXT: retq
32 ; AVX2-NEXT: vmovaps {{.*#+}} ymm1 = [0,0,0,0,0,0,1,0
[all...] |
| combine-multiplies.ll | 34 ; CHECK-NEXT: leal ([[ARG2:%[a-z]+]],[[MUL]]), [[LEA:%[a-z]+]]
35 ; CHECK-NEXT: movl $11, {{[0-9]+}}([[LEA]],[[ARG1]],4)
36 ; CHECK-NEXT: movl $22, {{[0-9]+}}([[ARG2]],[[MUL]])
37 ; CHECK-NEXT: movl $33, {{[0-9]+}}([[ARG2]],[[MUL]])
98 ; CHECK-NEXT: paddd %xmm0, [[C11]]
99 ; CHECK-NEXT: movdqa .LCPI1_1, [[C22:%xmm[0-9]]]
100 ; CHECK-NEXT: pshufd $245, %xmm0, [[T1:%xmm[0-9]]]
101 ; CHECK-NEXT: pmuludq [[C22]], [[T2:%xmm[0-9]]]
102 ; CHECK-NEXT: pshufd $232, [[T2]], [[T3:%xmm[0-9]]]
103 ; CHECK-NEXT: pmuludq [[C22]], [[T4:%xmm[0-9]]
[all...] |
| 2011-10-21-widen-cmp.ll | 10 ; CHECK-NEXT: cmpordps %xmm0, %xmm0
11 ; CHECK-NEXT: pmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
12 ; CHECK-NEXT: psllq $32, %xmm0
13 ; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
14 ; CHECK-NEXT: psrad $31, %xmm0
15 ; CHECK-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3],xmm1[4,5],xmm0[6,7]
16 ; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
17 ; CHECK-NEXT: pslld $31, %xmm0
18 ; CHECK-NEXT: blendvps %xmm0, %xmm0
19 ; CHECK-NEXT: movlps %xmm0, (%rax
[all...] |
| recip-fastmath.ll | 19 ; NORECIP-NEXT: divss
20 ; NORECIP-NEXT: movaps
21 ; NORECIP-NEXT: retq
29 ; RECIP-NEXT: retq
41 ; REFINE-NEXT: retq
50 ; NORECIP-NEXT: divps
51 ; NORECIP-NEXT: movaps
52 ; NORECIP-NEXT: retq
60 ; RECIP-NEXT: retq
72 ; REFINE-NEXT: ret
[all...] |
| vec_shift5.ll | 12 ; X32-NEXT: movaps {{.*#+}} xmm0 = [8,16,32,64,8,16,32,64]
13 ; X32-NEXT: retl
17 ; X64-NEXT: movaps {{.*#+}} xmm0 = [8,16,32,64,8,16,32,64]
18 ; X64-NEXT: retq
26 ; X32-NEXT: movaps {{.*#+}} xmm0 = [0,1,2,4,0,1,2,4]
27 ; X32-NEXT: retl
31 ; X64-NEXT: movaps {{.*#+}} xmm0 = [0,1,2,4,0,1,2,4]
32 ; X64-NEXT: retq
40 ; X32-NEXT: movaps {{.*#+}} xmm0 = [0,1,2,4,0,1,2,4]
41 ; X32-NEXT: ret
[all...] |
| /external/llvm/test/MC/Mips/ |
| sort-relocation-table.s | 15 # must be next to each other in a particular order (e.g. R_MIPS_HI16 must be
28 # CHECK-NEXT: 0x0 R_MIPS_HI16 sym1
29 # CHECK-NEXT: 0x4 R_MIPS_LO16 sym1
30 # CHECK-NEXT: }
38 # CHECK-NEXT: 0x4 R_MIPS_HI16 sym1
39 # CHECK-NEXT: 0x0 R_MIPS_LO16 sym1
40 # CHECK-NEXT: }
51 # CHECK-NEXT: 0xC R_MIPS_HI16 sym1
52 # CHECK-NEXT: 0x0 R_MIPS_LO16 sym1
53 # CHECK-NEXT: 0x4 R_MIPS_HI16 sym
[all...] |
| /external/llvm/test/Transforms/LoopUnswitch/ |
| 2011-11-18-SimpleSwitch.ll | 9 ; CHECK-NEXT: br i1 %1, label %.split.us, label %..split_crit_edge
12 ; CHECK-NEXT: br label %.split
15 ; CHECK-NEXT: br label %loop_begin.us
18 ; CHECK-NEXT: %var_val.us = load i32, i32* %var
19 ; CHECK-NEXT: switch i32 1, label %default.us-lcssa.us [
20 ; CHECK-NEXT: i32 1, label %inc.us
23 ; CHECK-NEXT: call void @incf() [[NOR_NUW:#[0-9]+]]
24 ; CHECK-NEXT: br label %loop_begin.backedge.us
27 ; CHECK-NEXT: %2 = icmp eq i32 %c, 2
28 ; CHECK-NEXT: br i1 %2, label %.split.split.us, label %.split..split.split_crit_edg
[all...] |
| /external/swiftshader/third_party/subzero/tests_lit/assembler/arm32/ |
| ldrex-strex.ll | 45 ; IASM-NEXT: .byte 0xf0
46 ; IASM-NEXT: .byte 0x7f
47 ; IASM-NEXT: .byte 0xf5
53 ; IASM-NEXT: .byte 0x1f
54 ; IASM-NEXT: .byte 0xd2
55 ; IASM-NEXT: .byte 0xe1
61 ; IASM-NEXT: .byte 0x4f
62 ; IASM-NEXT: .byte 0xc2
63 ; IASM-NEXT: .byte 0xe1
84 ; IASM-NEXT: .byte 0x1
[all...] |
| /external/clang/test/Index/ |
| complete-preprocessor.m | 18 // CHECK-CC1-NEXT: NotImplemented:{TypedText define}{HorizontalSpace }{Placeholder macro}{LeftParen (}{Placeholder args}{RightParen )} (40)
19 // CHECK-CC1-NEXT: NotImplemented:{TypedText error}{HorizontalSpace }{Placeholder message} (40)
20 // CHECK-CC1-NEXT: NotImplemented:{TypedText if}{HorizontalSpace }{Placeholder condition} (40)
21 // CHECK-CC1-NEXT: NotImplemented:{TypedText ifdef}{HorizontalSpace }{Placeholder macro} (40)
22 // CHECK-CC1-NEXT: NotImplemented:{TypedText ifndef}{HorizontalSpace }{Placeholder macro} (40)
23 // CHECK-CC1-NEXT: NotImplemented:{TypedText import}{HorizontalSpace }{Text "}{Placeholder header}{Text "} (40)
24 // CHECK-CC1-NEXT: NotImplemented:{TypedText import}{HorizontalSpace }{Text <}{Placeholder header}{Text >} (40)
25 // CHECK-CC1-NEXT: NotImplemented:{TypedText include}{HorizontalSpace }{Text "}{Placeholder header}{Text "} (40)
26 // CHECK-CC1-NEXT: NotImplemented:{TypedText include}{HorizontalSpace }{Text <}{Placeholder header}{Text >} (40)
27 // CHECK-CC1-NEXT: NotImplemented:{TypedText include_next}{HorizontalSpace }{Text "}{Placeholder header}{Text "} (4 (…)
[all...] |
| /external/llvm/test/CodeGen/SystemZ/ |
| selectcc-01.ll | 9 ; CHECK-NEXT: afi %r2, -268435456
10 ; CHECK-NEXT: sra %r2, 31
21 ; CHECK-NEXT: xilf %r2, 268435456
22 ; CHECK-NEXT: afi %r2, -268435456
23 ; CHECK-NEXT: sra %r2, 31
34 ; CHECK-NEXT: afi %r2, -536870912
35 ; CHECK-NEXT: sra %r2, 31
46 ; CHECK-NEXT: xilf %r2, 268435456
47 ; CHECK-NEXT: afi %r2, 1342177280
48 ; CHECK-NEXT: sra %r2, 3
[all...] |
| selectcc-02.ll | 9 ; CHECK-NEXT: afi %r2, 1879048192
10 ; CHECK-NEXT: sra %r2, 31
21 ; CHECK-NEXT: xilf %r2, 268435456
22 ; CHECK-NEXT: afi %r2, 1879048192
23 ; CHECK-NEXT: sra %r2, 31
34 ; CHECK-NEXT: sll %r2, 2
35 ; CHECK-NEXT: sra %r2, 31
46 ; CHECK-NEXT: xilf %r2, 268435456
47 ; CHECK-NEXT: afi %r2, -805306368
48 ; CHECK-NEXT: sra %r2, 3
[all...] |
| /external/llvm/test/Transforms/InstCombine/ |
| store.ll | 9 ; CHECK-NEXT: store i32 123, i32* undef
10 ; CHECK-NEXT: store i32 undef, i32* null
11 ; CHECK-NEXT: ret void
20 ; CHECK-NEXT: ret void
44 ; CHECK-NEXT: %storemerge = phi i32 [ -987654321, %Cond ], [ 47, %Cond2 ]
45 ; CHECK-NEXT: ret i32 %storemerge
64 ; CHECK-NEXT: %storemerge = phi i32 [ -987654321, %Cond ], [ 47, %0 ]
65 ; CHECK-NEXT: ret i32 %storemerge
81 ; CHECK-NEXT: %storemerge = phi i32
82 ; CHECK-NEXT: store i32 %storemerge, i32* %P, align
[all...] |
| zext.ll | 6 ; CHECK-NEXT: [[C2:%.*]] = zext i16 %A to i64
7 ; CHECK-NEXT: ret i64 [[C2]]
16 ; CHECK-NEXT: [[TMP1:%.*]] = zext <2 x i1> %A to <2 x i64>
17 ; CHECK-NEXT: [[ZEXT:%.*]] = xor <2 x i64> [[TMP1]], <i64 1, i64 1>
18 ; CHECK-NEXT: ret <2 x i64> [[ZEXT]]
27 ; CHECK-NEXT: [[AND:%.*]] = and <2 x i64> %A, <i64 23, i64 42>
28 ; CHECK-NEXT: ret <2 x i64> [[AND]]
38 ; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i64> %A, <i64 4294967295, i64 4294967295>
39 ; CHECK-NEXT: [[XOR:%.*]] = and <2 x i64> [[TMP1]], <i64 23, i64 42>
40 ; CHECK-NEXT: ret <2 x i64> [[XOR]
[all...] |
| /external/llvm/test/Transforms/LoopStrengthReduce/ |
| uglygep.ll | 25 ; CHECK-NEXT: %t7 = icmp eq i64 %t4, 0
27 ; CHECK-NEXT: [[SCEVGEP:%[^ ]+]] = getelementptr i8, i8* undef, i64 %t4
28 ; CHECK-NEXT: br label %bb14
35 ; CHECK-NEXT: store i8 undef, i8* [[SCEVGEP]]
36 ; CHECK-NEXT: %t6 = load float*, float** undef
38 ; CHECK-NEXT: [[SCEVGEP1:%[^ ]+]] = getelementptr float, float* %t6, i64 4
39 ; CHECK-NEXT: [[SCEVGEP2:%[^ ]+]] = bitcast float* [[SCEVGEP1]] to i8*
41 ; CHECK-NEXT: [[ADDRESS:%[^ ]+]] = getelementptr i8, i8* [[SCEVGEP2]], i64 %t4
42 ; CHECK-NEXT: store i8 undef, i8* [[ADDRESS]]
43 ; CHECK-NEXT: br label %bb1
[all...] |
| /external/llvm/test/tools/gold/X86/ |
| thinlto.ll | 15 ; Next generate summary sections and test gold handling.
37 ; Next force multi-threaded mode
60 ; BACKEND1-NEXT: <ENTRY {{.*}} record string = '{{.*}}/test/tools/gold/X86/Output/thinlto.ll.tmp{{.*}}.o'
61 ; BACKEND1-NEXT: <ENTRY {{.*}} record string = '{{.*}}/test/tools/gold/X86/Output/thinlto.ll.tmp{{.*}}.o'
62 ; BACKEND1-NEXT: </MODULE_STRTAB_BLOCK
63 ; BACKEND1-NEXT: <GLOBALVAL_SUMMARY_BLOCK
64 ; BACKEND1-NEXT: <VERSION
65 ; BACKEND1-NEXT: <COMBINED
66 ; BACKEND1-NEXT: <COMBINED
67 ; BACKEND1-NEXT: </GLOBALVAL_SUMMARY_BLOC
[all...] |
| /external/clang/test/CodeGenCXX/ |
| microsoft-abi-dynamic-cast.cpp | 16 // CHECK-NEXT: [[CALL:%.*]] = tail call i8* @__RTDynamicCast(i8* [[CAST]], i32 0, i8* bitcast (%rtti.TypeDescriptor7* @"\01??_R0?AUV@@@8" to i8*), i8* bitcast (%rtti.TypeDescriptor7* @"\01??_R0?AUT@@@8" to i8*), i32 1)
17 // CHECK-NEXT: [[RET:%.*]] = bitcast i8* [[CALL]] to %struct.T*
18 // CHECK-NEXT: ret %struct.T* [[RET]]
23 // CHECK-NEXT: [[VBPTRPTR:%.*]] = getelementptr inbounds %struct.A, %struct.A* %x, i32 0, i32 0
24 // CHECK-NEXT: [[VBTBL:%.*]] = load i32*, i32** [[VBPTRPTR]], align 4
25 // CHECK-NEXT: [[VBOFFP:%.*]] = getelementptr inbounds i32, i32* [[VBTBL]], i32 1
26 // CHECK-NEXT: [[VBOFFS:%.*]] = load i32, i32* [[VBOFFP]], align 4
27 // CHECK-NEXT: [[ADJ:%.*]] = getelementptr inbounds i8, i8* [[CAST]], i32 [[VBOFFS]]
28 // CHECK-NEXT: [[CALL:%.*]] = tail call i8* @__RTDynamicCast(i8* [[ADJ]], i32 [[VBOFFS]], i8* bitcast (%rtti.TypeDescriptor7* @"\01??_R0?AUA@@@8" to i8*), i8* bitcast (%rtti.TypeDescriptor7* @"\01??_R0?AUT@@@8" to i8*), i32 1)
29 // CHECK-NEXT: [[RET:%.*]] = bitcast i8* [[CALL]] to %struct.T
[all...] |
| /external/clang/test/CodeGenObjC/ |
| arc-foreach.m | 27 // CHECK-LP64-NEXT: [[X:%.*]] = alloca i8*,
28 // CHECK-LP64-NEXT: [[STATE:%.*]] = alloca [[STATE_T:%.*]],
29 // CHECK-LP64-NEXT: [[BUFFER:%.*]] = alloca [16 x i8*], align 8
30 // CHECK-LP64-NEXT: [[BLOCK:%.*]] = alloca [[BLOCK_T:<{.*}>]],
33 // CHECK-LP64-NEXT: store [[ARRAY_T]]* null, [[ARRAY_T]]** [[ARRAY]]
34 // CHECK-LP64-NEXT: [[ZERO:%.*]] = bitcast [[ARRAY_T]]** [[ARRAY]] to i8**
35 // CHECK-LP64-NEXT: [[ONE:%.*]] = bitcast [[ARRAY_T]]* {{%.*}} to i8*
36 // CHECK-LP64-NEXT: call void @objc_storeStrong(i8** [[ZERO]], i8* [[ONE]]) [[NUW:#[0-9]+]]
39 // CHECK-LP64-NEXT: [[T0:%.*]] = bitcast [[STATE_T]]* [[STATE]] to i8*
40 // CHECK-LP64-NEXT: call void @llvm.memset.p0i8.i64(i8* [[T0]], i8 0, i64 64, i32 8, i1 false
[all...] |
| /external/clang/test/CoverageMapping/ |
| break.c | 4 int cnt = 0; // CHECK-NEXT: File 0, [[@LINE+1]]:9 -> [[@LINE+1]]:18 = #0
5 while(cnt < 100) { // CHECK-NEXT: File 0, [[@LINE]]:20 -> [[@LINE+3]]:4 = #1
7 ++cnt; // CHECK-NEXT: File 0, [[@LINE]]:5 -> [[@LINE+1]]:4 = 0
8 } // CHECK-NEXT: File 0, [[@LINE+1]]:9 -> [[@LINE+1]]:18 = #0
9 while(cnt < 100) { // CHECK-NEXT: File 0, [[@LINE]]:20 -> [[@LINE+6]]:4 = #2
12 ++cnt; // CHECK-NEXT: File 0, [[@LINE]]:7 -> [[@LINE+3]]:4 = 0
15 } // CHECK-NEXT: File 0, [[@LINE+1]]:9 -> [[@LINE+1]]:18 = ((#0 + #3) - #4)
16 while(cnt < 100) { // CHECK-NEXT: File 0, [[@LINE]]:20 -> [[@LINE+7]]:4 = #3
17 // CHECK-NEXT: File 0, [[@LINE+1]]:8 -> [[@LINE+1]]:16 = #3
18 if(cnt == 0) { // CHECK-NEXT: File 0, [[@LINE]]:18 -> [[@LINE+3]]:6 = #
[all...] |
| /external/expat/xmlwf/ |
| ct.c | 118 const char *next, *p; local
121 next = buf;
122 p = getTok(&next);
123 if (matchkey(p, next, "text"))
125 else if (!matchkey(p, next, "application"))
127 p = getTok(&next);
130 p = getTok(&next);
131 if (matchkey(p, next, "xml"))
133 p = getTok(&next);
136 p = getTok(&next);
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| ifcvt-iter-indbr.ll | 14 ; CHECK-NEXT: itt eq
15 ; CHECK-NEXT: streq.w
16 ; CHECK-NEXT: moveq pc
17 ; CHECK-NEXT: LBB{{[0-9_]+}}:
18 ; CHECK-NEXT: cmp {{.*}}, #42
19 ; CHECK-NEXT: itt ne
20 ; CHECK-NEXT: strne.w
21 ; CHECK-NEXT: movne pc
22 ; CHECK-NEXT: Ltmp
23 ; CHECK-NEXT: LBB0_2
[all...] |
| /external/skqp/fuzz/ |
| Fuzz.h | 30 // next() loads fuzzed bytes into the variable passed in by pointer.
31 // We use this approach instead of T next() because different compilers
32 // evaluate function parameters in different orders. If fuzz->next()
33 // returned 5 and then 7, foo(fuzz->next(), fuzz->next()) would be
36 // next() in a way that does not consume fuzzed bytes in a single
39 void next(T* t);
43 void next(Arg* first, Args... rest);
69 inline void Fuzz::next(bool* b) { function in class:Fuzz
71 this->next(&n)
76 inline void Fuzz::next(T* n) { function in class:Fuzz
88 inline void Fuzz::next(Arg* first, Args... rest) { function in class:Fuzz
[all...] |
