| /external/llvm/test/CodeGen/PowerPC/ |
| empty-functions.ll | 13 ; CHECK-MACHO-NEXT: .cfi_startproc
14 ; CHECK-MACHO-NEXT: {{^}};
15 ; CHECK-MACHO-NEXT: nop
16 ; CHECK-MACHO-NEXT: .cfi_endproc
20 ; LINUX-NO-FP-NEXT: {{^}}.L[[BEGIN:.*]]:{{$}}
21 ; LINUX-NO-FP-NEXT: .cfi_startproc
22 ; LINUX-NO-FP-NEXT: {{^}}#
23 ; LINUX-NO-FP-NEXT: {{^}}.L[[END:.*]]:{{$}}
24 ; LINUX-NO-FP-NEXT: .size func, .L[[END]]-.L[[BEGIN]]
25 ; LINUX-NO-FP-NEXT: .cfi_endpro
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| memset-2.ll | 7 ; CHECK-NEXT: subl $16, %esp
8 ; CHECK-NEXT: pushl $188
9 ; CHECK-NEXT: pushl $0
10 ; CHECK-NEXT: pushl $0
11 ; CHECK-NEXT: calll _memset
12 ; CHECK-NEXT: addl $16, %esp
22 ; CHECK-NEXT: subl $12, %esp
23 ; CHECK-NEXT: movl %ecx, {{[0-9]+}}(%esp)
24 ; CHECK-NEXT: movl $76, {{[0-9]+}}(%esp)
25 ; CHECK-NEXT: calll _memse
[all...] |
| vec_insert-2.ll | 8 ; X32-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
9 ; X32-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
10 ; X32-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
11 ; X32-NEXT: retl
15 ; X64-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[2,0]
16 ; X64-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
17 ; X64-NEXT: movaps %xmm1, %xmm0
18 ; X64-NEXT: retq
26 ; X32-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
27 ; X32-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0
[all...] |
| vector-tzcnt-512.ll | 10 ; AVX512CD-NEXT: vpxord %zmm1, %zmm1, %zmm1
11 ; AVX512CD-NEXT: vpsubq %zmm0, %zmm1, %zmm1
12 ; AVX512CD-NEXT: vpandq %zmm1, %zmm0, %zmm0
13 ; AVX512CD-NEXT: vpsubq {{.*}}(%rip){1to8}, %zmm0, %zmm0
14 ; AVX512CD-NEXT: vextracti64x4 $1, %zmm0, %ymm1
15 ; AVX512CD-NEXT: vmovdqa {{.*#+}} ymm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
16 ; AVX512CD-NEXT: vpand %ymm2, %ymm1, %ymm3
17 ; AVX512CD-NEXT: vmovdqa {{.*#+}} ymm4 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
18 ; AVX512CD-NEXT: vpshufb %ymm3, %ymm4, %ymm3
19 ; AVX512CD-NEXT: vpsrlw $4, %ymm1, %ymm
[all...] |
| emutls-pie.ll | 17 ; X32-NEXT: movl %eax, (%esp)
18 ; X32-NEXT: calll my_emutls_get_address@PLT
19 ; X32-NEXT: movl (%eax), %eax
20 ; X32-NEXT: addl $8, %esp
21 ; X32-NEXT: popl %ebx
22 ; X32-NEXT: retl
25 ; X64-NEXT: callq my_emutls_get_address@PLT
26 ; X64-NEXT: movl (%rax), %eax
27 ; X64-NEXT: popq %rcx
28 ; X64-NEXT: ret
[all...] |
| or-lea.ll | 12 ; CHECK-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
13 ; CHECK-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
14 ; CHECK-NEXT: andl $1, %esi
15 ; CHECK-NEXT: leal (%rsi,%rdi,2), %eax
16 ; CHECK-NEXT: retq
27 ; CHECK-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
28 ; CHECK-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
29 ; CHECK-NEXT: andl $1, %esi
30 ; CHECK-NEXT: leal (%rsi,%rdi,2), %eax
31 ; CHECK-NEXT: ret
[all...] |
| vec_ext_inreg.ll | 9 ; SSE-NEXT: pslld $16, %xmm0
10 ; SSE-NEXT: psrad $16, %xmm0
11 ; SSE-NEXT: pslld $16, %xmm1
12 ; SSE-NEXT: psrad $16, %xmm1
13 ; SSE-NEXT: retq
17 ; AVX1-NEXT: vpslld $16, %xmm0, %xmm1
18 ; AVX1-NEXT: vpsrad $16, %xmm1, %xmm1
19 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
20 ; AVX1-NEXT: vpslld $16, %xmm0, %xmm0
21 ; AVX1-NEXT: vpsrad $16, %xmm0, %xmm
[all...] |
| vector-shuffle-combining.ll | 22 ; ALL-NEXT: retq
32 ; ALL-NEXT: retq
45 ; ALL-NEXT: retq
58 ; SSE-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,7,6,5,4]
59 ; SSE-NEXT: retq
63 ; AVX-NEXT: vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,7,6,5,4]
64 ; AVX-NEXT: retq
77 ; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[3,2,1,0,4,5,6,7]
78 ; SSE-NEXT: retq
82 ; AVX-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[3,2,1,0,4,5,6,7
[all...] |
| clear_upper_vector_element_bits.ll | 13 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
14 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
15 ; SSE-NEXT: pand {{.*}}(%rip), %xmm0
16 ; SSE-NEXT: retq
20 ; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
21 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
22 ; AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
23 ; AVX-NEXT: retq
38 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
39 ; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1
[all...] |
| avx512-trunc.ll | 10 ; ALL-NEXT: vpmovdb %zmm0, %xmm0
11 ; ALL-NEXT: retq
19 ; ALL-NEXT: vpmovqw %zmm0, %xmm0
20 ; ALL-NEXT: retq
28 ; ALL-NEXT: vpmovdw %zmm0, %ymm0
29 ; ALL-NEXT: retq
37 ; ALL-NEXT: vpmovqw %zmm0, %xmm0
38 ; ALL-NEXT: retq
46 ; ALL-NEXT: vpmovqb %zmm0, (%rdi)
47 ; ALL-NEXT: ret
[all...] |
| emutls-pic.ll | 13 ; X32-NEXT: movl %eax, (%esp)
14 ; X32-NEXT: calll my_emutls_get_address@PLT
17 ; X64-NEXT: callq my_emutls_get_address@PLT
18 ; X64-NEXT: movl (%rax), %eax
39 ; X32-NEXT: movl %eax, (%esp)
40 ; X32-NEXT: calll __emutls_get_address@PLT
43 ; X64-NEXT: callq __emutls_get_address@PLT
44 ; X64-NEXT: movl (%rax), %eax
86 ; X32-NEXT: movl %eax, (%esp)
87 ; X32-NEXT: calll __emutls_get_address@PL
[all...] |
| sse42-intrinsics-x86.ll | 7 ; CHECK-NEXT: movl $7, %eax
8 ; CHECK-NEXT: movl $7, %edx
9 ; CHECK-NEXT: pcmpestri $7, %xmm1, %xmm0
10 ; CHECK-NEXT: movl %ecx, %eax
11 ; CHECK-NEXT: retl
21 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
22 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
23 ; CHECK-NEXT: movdqa (%eax), %xmm0
24 ; CHECK-NEXT: movl $7, %eax
25 ; CHECK-NEXT: movl $7, %ed
[all...] |
| avx-cvt-2.ll | 13 ; CHECK-NEXT: vcvttps2dq %ymm0, %ymm0
14 ; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm1
15 ; CHECK-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
16 ; CHECK-NEXT: vpshufb %xmm2, %xmm1, %xmm1
17 ; CHECK-NEXT: vpshufb %xmm2, %xmm0, %xmm0
18 ; CHECK-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
19 ; CHECK-NEXT: vmovdqa %xmm0, (%rdi)
20 ; CHECK-NEXT: vzeroupper
21 ; CHECK-NEXT: retq
30 ; CHECK-NEXT: vcvttps2dq %ymm0, %ymm
[all...] |
| /external/clang/test/CodeGen/ |
| ppc-varargs-struct.c | 24 // CHECK-PPC-NEXT: [[GPRPTR:%.+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* [[ARRAYDECAY]], i32 0, i32 0
25 // CHECK-PPC-NEXT: [[GPR:%.+]] = load i8, i8* [[GPRPTR]], align 4
26 // CHECK-PPC-NEXT: [[COND:%.+]] = icmp ult i8 [[GPR]], 8
27 // CHECK-PPC-NEXT: br i1 [[COND]], label %[[USING_REGS:[a-z_0-9]+]], label %[[USING_OVERFLOW:[a-z_0-9]+]]
30 // CHECK-PPC-NEXT: [[REGSAVE_AREA_P:%.+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* [[ARRAYDECAY]], i32 0, i32 4
31 // CHECK-PPC-NEXT: [[REGSAVE_AREA:%.+]] = load i8*, i8** [[REGSAVE_AREA_P]], align 4
32 // CHECK-PPC-NEXT: [[OFFSET:%.+]] = mul i8 [[GPR]], 4
33 // CHECK-PPC-NEXT: [[RAW_REGADDR:%.+]] = getelementptr inbounds i8, i8* [[REGSAVE_AREA]], i8 [[OFFSET]]
34 // CHECK-PPC-NEXT: [[REGADDR:%.+]] = bitcast i8* [[RAW_REGADDR]] to %struct.x**
35 // CHECK-PPC-NEXT: [[USED_GPR:%[0-9]+]] = add i8 [[GPR]],
[all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-patchpoint-webkit_jscc.ll | 18 ; CHECK-NEXT: mov x0, x{{.+}}
20 ; CHECK-NEXT: mov x16, #281470681743360
23 ; CHECK-NEXT: blr x16
28 ; FAST-NEXT: mov x16, #281470681743360
29 ; FAST-NEXT: movk x16, #57005, lsl #16
30 ; FAST-NEXT: movk x16, #48879
31 ; FAST-NEXT: blr x16
45 ; CHECK-NEXT: str x[[REG]], [sp, #24]
46 ; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x4
47 ; CHECK-NEXT: str w[[REG]], [sp, #16
[all...] |
| /external/clang/test/CoverageMapping/ |
| label.cpp | 4 void func() { // CHECK-NEXT: File 0, [[@LINE]]:13 -> {{[0-9]+}}:2 = #0
5 int i = 0; // CHECK-NEXT: File 0, [[@LINE+2]]:14 -> [[@LINE+2]]:20 = (#0 + #3)
6 // CHECK-NEXT: File 0, [[@LINE+1]]:22 -> [[@LINE+1]]:25 = #3
7 for(i = 0; i < 10; ++i) { // CHECK-NEXT: File 0, [[@LINE]]:27 -> [[@LINE+11]]:4 = #1
8 // CHECK-NEXT: File 0, [[@LINE+1]]:8 -> [[@LINE+1]]:13 = #1
9 if(i < 5) { // CHECK-NEXT: File 0, [[@LINE]]:15 -> [[@LINE+6]]:6 = #2
11 x: // CHECK-NEXT: File 0, [[@LINE]]:9 -> [[@LINE+4]]:6 = #3
16 goto x; // CHECK-NEXT: File 0, [[@LINE]]:7 -> [[@LINE]]:13 = (#1 - #2)
17 int k = 3; // CHECK-NEXT: File 0, [[@LINE]]:5 -> [[@LINE+1]]:4 = #3
19 static int j = 0; // CHECK-NEXT: File 0, [[@LINE]]:3 -> [[@LINE+4]]:2 = ((#0 + #3) - #1
[all...] |
| /external/llvm/test/Transforms/InstCombine/ |
| pow-4.ll | 13 ; CHECK-NEXT: %1 = fmul float %x, %x
14 ; CHECK-NEXT: %2 = fmul float %1, %1
15 ; CHECK-NEXT: ret float %2
24 ; CHECK-NEXT: %1 = fmul double %x, %x
25 ; CHECK-NEXT: %2 = fmul double %1, %x
26 ; CHECK-NEXT: ret double %2
35 ; CHECK-NEXT: %1 = fmul double %x, %x
36 ; CHECK-NEXT: %2 = fmul double %1, %1
37 ; CHECK-NEXT: ret double %2
46 ; CHECK-NEXT: %1 = fmul double %x, %
[all...] |
| /external/llvm/test/CodeGen/WebAssembly/ |
| comparisons_f32.ll | 10 ; CHECK-NEXT: .param f32, f32{{$}}
11 ; CHECK-NEXT: .result i32{{$}}
12 ; CHECK-NEXT: f32.eq $push[[NUM0:[0-9]+]]=, $0, $0{{$}}
13 ; CHECK-NEXT: f32.eq $push[[NUM1:[0-9]+]]=, $1, $1{{$}}
14 ; CHECK-NEXT: i32.and $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM1]]{{$}}
15 ; CHECK-NEXT: return $pop[[NUM2]]{{$}}
23 ; CHECK-NEXT: .param f32, f32{{$}}
24 ; CHECK-NEXT: .result i32{{$}}
25 ; CHECK-NEXT: f32.ne $push[[NUM0:[0-9]+]]=, $0, $0{{$}}
26 ; CHECK-NEXT: f32.ne $push[[NUM1:[0-9]+]]=, $1, $1{{$}
[all...] |
| comparisons_f64.ll | 10 ; CHECK-NEXT: .param f64, f64{{$}}
11 ; CHECK-NEXT: .result i32{{$}}
12 ; CHECK-NEXT: f64.eq $push[[NUM0:[0-9]+]]=, $0, $0{{$}}
13 ; CHECK-NEXT: f64.eq $push[[NUM1:[0-9]+]]=, $1, $1{{$}}
14 ; CHECK-NEXT: i32.and $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM1]]{{$}}
15 ; CHECK-NEXT: return $pop[[NUM2]]{{$}}
23 ; CHECK-NEXT: .param f64, f64{{$}}
24 ; CHECK-NEXT: .result i32{{$}}
25 ; CHECK-NEXT: f64.ne $push[[NUM0:[0-9]+]]=, $0, $0{{$}}
26 ; CHECK-NEXT: f64.ne $push[[NUM1:[0-9]+]]=, $1, $1{{$}
[all...] |
| /external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
| abi-isel.ll | 47 ; LINUX-32-STATIC-NEXT: movl [[EAX]], dst
48 ; LINUX-32-STATIC-NEXT: ret
52 ; LINUX-32-PIC-NEXT: movl [[EAX]], dst
53 ; LINUX-32-PIC-NEXT: ret
57 ; LINUX-64-PIC-NEXT: movl ([[RAX]]), [[EAX:%e..]]
58 ; LINUX-64-PIC-NEXT: movq dst@GOTPCREL(%rip), [[RCX:%r..]]
59 ; LINUX-64-PIC-NEXT: movl [[EAX]], ([[RCX]])
60 ; LINUX-64-PIC-NEXT: ret
64 ; DARWIN-32-STATIC-NEXT: movl [[EAX]], _dst
65 ; DARWIN-32-STATIC-NEXT: re
[all...] |
| /external/clang/test/CodeGenObjC/ |
| arc-exceptions.m | 16 // CHECK-NEXT: invoke void @test0_helper()
18 // CHECK-NEXT: [[T1:%.*]] = bitcast i8* [[T0]] to [[ETY]]*
19 // CHECK-NEXT: [[T2:%.*]] = bitcast [[ETY]]* [[T1]] to i8*
20 // CHECK-NEXT: [[T3:%.*]] = call i8* @objc_retain(i8* [[T2]]) [[NUW:#[0-9]+]]
21 // CHECK-NEXT: [[T4:%.*]] = bitcast i8* [[T3]] to [[ETY]]*
22 // CHECK-NEXT: store [[ETY]]* [[T4]], [[ETY]]** [[E]]
23 // CHECK-NEXT: [[T0:%.*]] = bitcast [[ETY]]** [[E]] to i8**
24 // CHECK-NEXT: call void @objc_storeStrong(i8** [[T0]], i8* null) [[NUW]]
25 // CHECK-NEXT: call void @objc_end_catch() [[NUW]]
36 // CHECK-NEXT: invoke void @test1_helper(
[all...] |
| reorder-synthesized-ivars.m | 42 // CHECK-NEXT: @{{.*}} = private global [10 x i8] c"_boolean2
43 // CHECK-NEXT: @{{.*}} = private global [10 x i8] c"_boolean3
44 // CHECK-NEXT: @{{.*}} = private global [10 x i8] c"_boolean4
45 // CHECK-NEXT: @{{.*}} = private global [10 x i8] c"_boolean5
46 // CHECK-NEXT: @{{.*}} = private global [10 x i8] c"_boolean6
47 // CHECK-NEXT: @{{.*}} = private global [10 x i8] c"_boolean7
48 // CHECK-NEXT: @{{.*}} = private global [10 x i8] c"_boolean8
49 // CHECK-NEXT: @{{.*}} = private global [10 x i8] c"_boolean9
50 // CHECK-NEXT: @{{.*}} = private global [9 x i8] c"_object1
51 // CHECK-NEXT: @{{.*}} = private global [9 x i8] c"_object
[all...] |
| /external/llvm/test/Bitcode/ |
| thinlto-alias.ll | 9 ; CHECK-NEXT: <VERSION
12 ; CHECK-NEXT: <PERMODULE {{.*}} op4=[[FUNCID:[0-9]+]] op5=1/>
13 ; CHECK-NEXT: </GLOBALVAL_SUMMARY_BLOCK>
14 ; CHECK-NEXT: <VALUE_SYMTAB
15 ; CHECK-NEXT: <FNENTRY {{.*}} record string = 'main'
17 ; CHECK-NEXT: <ENTRY {{.*}} op0=[[FUNCID]] {{.*}} record string = 'analias'
18 ; CHECK-NEXT: </VALUE_SYMTAB>
21 ; COMBINED-NEXT: <VERSION
24 ; COMBINED-NEXT: <COMBINED {{.*}} op5=[[ALIASID:[0-9]+]] op6=1/>
26 ; COMBINED-NEXT: <COMBINED {{.*}
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| build-attributes-encoding.s | 72 // CHECK-NEXT: Type: SHT_ARM_ATTRIBUTES
73 // CHECK-NEXT: Flags [ (0x0)
74 // CHECK-NEXT: ]
75 // CHECK-NEXT: Address: 0x0
76 // CHECK-NEXT: Offset: 0x34
77 // CHECK-NEXT: Size: 73
78 // CHECK-NEXT: Link: 0
79 // CHECK-NEXT: Info: 0
80 // CHECK-NEXT: AddressAlignment: 1
81 // CHECK-NEXT: EntrySize:
[all...] |
| /external/llvm/test/Transforms/SCCP/ |
| constant-struct.ll | 10 ; CHECK-NEXT: ret { i64 } { i64 24 }
11 ; CHECK-NEXT: }
19 ; CHECK-NEXT: ret { i64, i64 } { i64 24, i64 undef }
20 ; CHECK-NEXT: }
30 ; CHECK-NEXT: %c = insertvalue { i64, i64, i64 } { i64 24, i64 36, i64 undef }, i64 %x, 2
31 ; CHECK-NEXT: ret { i64, i64, i64 } %c
32 ; CHECK-NEXT: }
41 ; CHECK-NEXT: %a = insertvalue { i64, i32 } { i64 12, i32 24 }, i32 %x, 1
42 ; CHECK-NEXT: ret { i64, i32 } %a
43 ; CHECK-NEXT:
[all...] |
