1 ; NOTE: Assertions have been autogenerated by update_test_checks.py 2 ; RUN: llc -mtriple=i386-apple-darwin9 -mcpu=yonah < %s | FileCheck %s 3 4 define fastcc void @t1() nounwind { 5 ; CHECK-LABEL: t1: 6 ; CHECK: ## BB#0: ## %entry 7 ; CHECK-NEXT: subl $16, %esp 8 ; CHECK-NEXT: pushl $188 9 ; CHECK-NEXT: pushl $0 10 ; CHECK-NEXT: pushl $0 11 ; CHECK-NEXT: calll _memset 12 ; CHECK-NEXT: addl $16, %esp 13 ; 14 entry: 15 call void @llvm.memset.p0i8.i32(i8* null, i8 0, i32 188, i32 1, i1 false) 16 unreachable 17 } 18 19 define fastcc void @t2(i8 signext %c) nounwind { 20 ; CHECK-LABEL: t2: 21 ; CHECK: ## BB#0: ## %entry 22 ; CHECK-NEXT: subl $12, %esp 23 ; CHECK-NEXT: movl %ecx, {{[0-9]+}}(%esp) 24 ; CHECK-NEXT: movl $76, {{[0-9]+}}(%esp) 25 ; CHECK-NEXT: calll _memset 26 ; 27 entry: 28 call void @llvm.memset.p0i8.i32(i8* undef, i8 %c, i32 76, i32 1, i1 false) 29 unreachable 30 } 31 32 declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind 33 34 define void @t3(i8* nocapture %s, i8 %a) nounwind { 35 ; CHECK-LABEL: t3: 36 ; CHECK: ## BB#0: ## %entry 37 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 38 ; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %ecx 39 ; CHECK-NEXT: imull $16843009, %ecx, %ecx ## imm = 0x1010101 40 ; CHECK-NEXT: movl %ecx, 4(%eax) 41 ; CHECK-NEXT: movl %ecx, (%eax) 42 ; CHECK-NEXT: retl 43 ; 44 entry: 45 tail call void @llvm.memset.p0i8.i32(i8* %s, i8 %a, i32 8, i32 1, i1 false) 46 ret void 47 } 48 49 define void @t4(i8* nocapture %s, i8 %a) nounwind { 50 ; CHECK-LABEL: t4: 51 ; CHECK: ## BB#0: ## %entry 52 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 53 ; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %ecx 54 ; CHECK-NEXT: imull $16843009, %ecx, %ecx ## imm = 0x1010101 55 ; CHECK-NEXT: movl %ecx, 8(%eax) 56 ; CHECK-NEXT: movl %ecx, 4(%eax) 57 ; CHECK-NEXT: movl %ecx, (%eax) 58 ; CHECK-NEXT: movw %cx, 12(%eax) 59 ; CHECK-NEXT: movb %cl, 14(%eax) 60 ; CHECK-NEXT: retl 61 ; 62 entry: 63 tail call void @llvm.memset.p0i8.i32(i8* %s, i8 %a, i32 15, i32 1, i1 false) 64 ret void 65 } 66
