/external/llvm/test/CodeGen/Thumb2/ |
thumb2-orr.ll | 5 ; CHECK: orrs r0, r1
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thumb2-uxtb.ll | 127 ; ARMv7A: orrs r0, r1 134 ; ARMv7M: orrs r0, r1
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/external/llvm/test/CodeGen/ARM/ |
fast-isel-binary.ll | 52 ; THUMB: orrs r0, r1 64 ; THUMB: orrs r0, r1 76 ; THUMB: orrs r0, r1
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movcc-double.ll | 41 ; CHECK: orrs
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/external/valgrind/none/tests/arm/ |
v6intThumb.c | [all...] |
v6intThumb.stdout.exp | 140 ORRS-16 0x10C 141 orrs r1, r2 :: rd 0x37595f2f rm 0x27181728, c:v-in 0, cpsr 0x00000000 142 orrs r1, r2 :: rd 0x00000000 rm 0x00000000, c:v-in 0, cpsr 0x40000000 Z 143 orrs r1, r2 :: rd 0x00000001 rm 0x00000000, c:v-in 0, cpsr 0x00000000 144 orrs r1, r2 :: rd 0x00000001 rm 0x00000001, c:v-in 0, cpsr 0x00000000 145 orrs r1, r2 :: rd 0x80000000 rm 0x00000000, c:v-in 0, cpsr 0x80000000 N 146 orrs r1, r2 :: rd 0x80000000 rm 0x80000000, c:v-in 0, cpsr 0x80000000 N 147 orrs r1, r2 :: rd 0x80000000 rm 0x80000000, c:v-in 0, cpsr 0x80000000 N 148 orrs r1, r2 :: rd 0x37595f2f rm 0x27181728, c:v-in 1, cpsr 0x10000000 V 149 orrs r1, r2 :: rd 0x00000000 rm 0x00000000, c:v-in 1, cpsr 0x50000000 Z [all...] |
/external/llvm/test/MC/ARM/ |
thumb2-narrow-dp.ll | [all...] |
/external/capstone/suite/MC/ARM/ |
thumb2-narrow-dp.ll.cs | 299 0x52,0xea,0x01,0x07 = orrs.w r7, r2, r1 300 0x0a,0x43 = orrs r2, r1 301 0x0b,0x43 = orrs r3, r1 302 0x54,0xea,0x01,0x04 = orrs.w r4, r4, r1 303 0x51,0xea,0x05,0x05 = orrs.w r5, r1, r5 305 0x0f,0x43 = orrs r7, r1 306 0x0f,0x43 = orrs r7, r1 307 0x51,0xea,0x08,0x08 = orrs.w r8, r1, r8 308 0x58,0xea,0x01,0x08 = orrs.w r8, r8, r1 309 0x58,0xea,0x01,0x01 = orrs.w r1, r8, r [all...] |
/external/compiler-rt/lib/builtins/arm/ |
comparesf2.S | 55 orrs r12, r2, r3, lsr #1 76 // still clear from the shift argument in orrs; if a is positive and b 116 orrs r12, r2, r3, lsr #1
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/external/swiftshader/third_party/LLVM/test/CodeGen/Thumb2/ |
thumb2-uxtb.ll | 127 ; ARMv7A: orrs r0, r1 134 ; ARMv7M: orrs r0, r1
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/external/vixl/test/aarch32/config/ |
cond-rd-rn-operand-rm-a32.json | 51 "Orrs", // ORRS{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; A1
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cond-rd-rn-operand-rm-shift-amount-1to31-a32.json | 42 "Orrs", // ORRS{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; A1
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cond-rd-rn-operand-rm-shift-amount-1to31-t32.json | 48 "Orrs", // ORRS{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; T2
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cond-rd-rn-operand-rm-shift-amount-1to32-a32.json | 42 "Orrs", // ORRS{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; A1
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cond-rd-rn-operand-rm-shift-amount-1to32-t32.json | 48 "Orrs", // ORRS{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; T2
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cond-rd-rn-operand-rm-shift-rs-a32.json | 40 "Orrs", // ORRS{<c>}{<q>} {<Rd>}, <Rn>, <Rm>, <shift> <Rs> ; A1
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cond-rd-rn-operand-rm-t32.json | 88 "Orrs", // ORRS{<q>} {<Rdn>}, <Rdn>, <Rm> ; T1 89 // ORRS{<c>}{<q>} {<Rd>}, <Rn>, <Rm> {, <shift> #<amount> } ; T2
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/system/core/libpixelflinger/ |
t32cb16blend.S | 169 orrs r3, r4, r5 188 orrs r3, r4, r5
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/external/vixl/tools/ |
verify_assembler_traces.py | 290 ("orrs al {register} (\\1) (\\1)", "orrs.n {}, {}, {}"), 291 ("orrs al {register} {register} (\\1)", "orrs.w {}, {}, {}"),
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/toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
thumb2_it.d | 26 0+02c <[^>]+> 4310 orrs r0, r2
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thumb2_it_auto.d | 26 0+02c <[^>]+> 4310 orrs r0, r2
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/device/linaro/bootloader/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ |
uldiv.S | 34 orrs ip, r3, r2, lsr #31
93 orrs r0, r4, r5, lsr #30
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uldiv.asm | 33 orrs ip, r3, r2, lsr #31
92 orrs r0, r4, r5, lsr #30
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div.S | 53 orrs r12, r0, r1
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/bionic/libc/arch-arm/generic/bionic/ |
memcmp.S | 86 orrs r3, ip 97 orrs r3, ip
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