| /external/llvm/lib/Target/X86/ |
| X86InstrShiftRotate.td | 473 [(set GR8:$dst, (rotl GR8:$src1, CL))], IIC_SR>;
476 [(set GR16:$dst, (rotl GR16:$src1, CL))], IIC_SR>, OpSize16;
479 [(set GR32:$dst, (rotl GR32:$src1, CL))], IIC_SR>, OpSize32;
482 [(set GR64:$dst, (rotl GR64:$src1, CL))], IIC_SR>;
487 [(set GR8:$dst, (rotl GR8:$src1, (i8 imm:$src2)))], IIC_SR>;
490 [(set GR16:$dst, (rotl GR16:$src1, (i8 imm:$src2)))],
494 [(set GR32:$dst, (rotl GR32:$src1, (i8 imm:$src2)))],
499 [(set GR64:$dst, (rotl GR64:$src1, (i8 imm:$src2)))],
505 [(set GR8:$dst, (rotl GR8:$src1, (i8 1)))],
509 [(set GR16:$dst, (rotl GR16:$src1, (i8 1)))]
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMRegisterInfo.td | 276 (decimate (rotl SPR, 1), 4),
277 (decimate (rotl SPR, 1), 2))];
295 let AltOrders = [(rotl DPR, 16),
296 (add (decimate (rotl DPR, 16), 2), (rotl DPR, 16))];
316 let AltOrders = [(rotl QPR, 8)];
342 let AltOrders = [(add (rotl QPR, 8), (rotl DPair, 16))];
377 let AltOrders = [(rotl QQPR, 8)];
400 let AltOrders = [(rotl QQQQPR, 8)]
[all...] |
| ARMSelectionDAGInfo.h | 31 //case ISD::ROTL: // Only if imm -> turn into ROTR.
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86InstrShiftRotate.td | 419 [(set GR8:$dst, (rotl GR8:$src1, CL))]>;
422 [(set GR16:$dst, (rotl GR16:$src1, CL))]>, OpSize;
425 [(set GR32:$dst, (rotl GR32:$src1, CL))]>;
428 [(set GR64:$dst, (rotl GR64:$src1, CL))]>;
433 [(set GR8:$dst, (rotl GR8:$src1, (i8 imm:$src2)))]>;
436 [(set GR16:$dst, (rotl GR16:$src1, (i8 imm:$src2)))]>,
440 [(set GR32:$dst, (rotl GR32:$src1, (i8 imm:$src2)))]>;
444 [(set GR64:$dst, (rotl GR64:$src1, (i8 imm:$src2)))]>;
449 [(set GR8:$dst, (rotl GR8:$src1, (i8 1)))]>;
452 [(set GR16:$dst, (rotl GR16:$src1, (i8 1)))]>, OpSize
[all...] |
| /external/llvm/test/CodeGen/WebAssembly/ |
| i32.ll | 203 ; CHECK-LABEL: rotl:
206 ; CHECK-NEXT: i32.rotl $push0=, $0, $1
208 define i32 @rotl(i32 %x, i32 %y) {
219 ; CHECK-NEXT: i32.rotl $push0=, $0, $1
|
| i64.ll | 203 ; CHECK-LABEL: rotl:
206 ; CHECK-NEXT: i64.rotl $push0=, $0, $1
208 define i64 @rotl(i64 %x, i64 %y) {
219 ; CHECK-NEXT: i64.rotl $push0=, $0, $1
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| ARMSelectionDAGInfo.h | 30 //case ISD::ROTL: // Only if imm -> turn into ROTR.
|
| ARMRegisterInfo.td | 278 let AltOrders = [(rotl DPR, 16)];
301 let AltOrders = [(rotl QPR, 8)];
325 let AltOrders = [(rotl QQPR, 4)];
344 let AltOrders = [(rotl QQQQPR, 2)];
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/tilegx/ |
| t_insns.s | 227 { blbc r15, target ; rotl r5, r6, r7 }
308 { add r15, r16, r17 ; prefetch_l2 r25 ; rotl r5, r6, r7 }
347 { add r5, r6, r7 ; ld1u r25, r26 ; rotl r15, r16, r17 }
417 { addi r15, r16, 5 ; prefetch_l2 r25 ; rotl r5, r6, r7 }
456 { addi r5, r6, 5 ; ld1u r25, r26 ; rotl r15, r16, r17 }
[all...] |
| /external/boringssl/src/crypto/fipsmodule/md5/asm/ |
| md5-586.pl | 69 &rotl($a,$s);
94 &rotl($a,$s);
117 &rotl($a,$s);
140 &rotl($a,$s);
166 &rotl($a,$s);
|
| /external/llvm/unittests/ADT/ |
| APIntTest.cpp | 170 EXPECT_EQ(one, one.rotl(0));
171 EXPECT_EQ(one, one.rotl(1));
800 EXPECT_EQ(APInt(8, 1), APInt(8, 1).rotl(0));
801 EXPECT_EQ(APInt(8, 2), APInt(8, 1).rotl(1));
802 EXPECT_EQ(APInt(8, 4), APInt(8, 1).rotl(2));
803 EXPECT_EQ(APInt(8, 16), APInt(8, 1).rotl(4));
804 EXPECT_EQ(APInt(8, 1), APInt(8, 1).rotl(8));
806 EXPECT_EQ(APInt(8, 16), APInt(8, 16).rotl(0));
807 EXPECT_EQ(APInt(8, 32), APInt(8, 16).rotl(1));
808 EXPECT_EQ(APInt(8, 64), APInt(8, 16).rotl(2))
[all...] |
| /prebuilts/go/darwin-x86/src/cmd/internal/obj/ppc64/ |
| anames.go | 310 "ROTL",
|
| /prebuilts/go/linux-x86/src/cmd/internal/obj/ppc64/ |
| anames.go | 310 "ROTL",
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZSelectionDAGInfo.cpp | 178 SDValue ROTL = DAG.getNode(ISD::ROTL, DL, MVT::i32, SRL,
180 return ROTL;
|
| /external/llvm/include/llvm/TableGen/ |
| SetTheory.h | 34 // - (rotl S, N) Rotate left. Same as (add (shl S, N), (trunc S, N)).
|
| /external/swiftshader/third_party/LLVM/utils/TableGen/ |
| SetTheory.h | 34 // - (rotl S, N) Rotate left. Same as (add (shl S, N), (trunc S, N)).
|
| /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/TableGen/ |
| SetTheory.h | 34 // - (rotl S, N) Rotate left. Same as (add (shl S, N), (trunc S, N)).
|
| /prebuilts/clang/host/darwin-x86/clang-4393122/include/llvm/TableGen/ |
| SetTheory.h | 34 // - (rotl S, N) Rotate left. Same as (add (shl S, N), (trunc S, N)).
|
| /prebuilts/clang/host/darwin-x86/clang-4479392/include/llvm/TableGen/ |
| SetTheory.h | 34 // - (rotl S, N) Rotate left. Same as (add (shl S, N), (trunc S, N)).
|
| /prebuilts/clang/host/darwin-x86/clang-4579689/include/llvm/TableGen/ |
| SetTheory.h | 34 // - (rotl S, N) Rotate left. Same as (add (shl S, N), (trunc S, N)).
|
| /prebuilts/clang/host/darwin-x86/clang-4630689/include/llvm/TableGen/ |
| SetTheory.h | 34 // - (rotl S, N) Rotate left. Same as (add (shl S, N), (trunc S, N)).
|
| /prebuilts/clang/host/darwin-x86/clang-4639204/include/llvm/TableGen/ |
| SetTheory.h | 34 // - (rotl S, N) Rotate left. Same as (add (shl S, N), (trunc S, N)).
|
| /prebuilts/clang/host/darwin-x86/clang-4691093/include/llvm/TableGen/ |
| SetTheory.h | 34 // - (rotl S, N) Rotate left. Same as (add (shl S, N), (trunc S, N)).
|
| /prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/TableGen/ |
| SetTheory.h | 34 // - (rotl S, N) Rotate left. Same as (add (shl S, N), (trunc S, N)).
|
| /prebuilts/clang/host/linux-x86/clang-4393122/include/llvm/TableGen/ |
| SetTheory.h | 34 // - (rotl S, N) Rotate left. Same as (add (shl S, N), (trunc S, N)).
|
