| /external/llvm/test/MC/Disassembler/Mips/mips32/ |
| valid-mips32.txt | 54 0x00 0xa3 0x10 0x04 # CHECK: sllv $2, $3, $5
75 0x01 0x20 0x38 0x04 # CHECK: sllv $7, $zero, $9
76 0x01 0x20 0x38 0x04 # CHECK: sllv $7, $zero, $9
|
| /external/llvm/test/MC/Disassembler/Mips/mips32r2/ |
| valid-mips32r2.txt | 58 0x00 0xa3 0x10 0x04 # CHECK: sllv $2, $3, $5
80 0x01 0x20 0x38 0x04 # CHECK: sllv $7, $zero, $9
81 0x01 0x20 0x38 0x04 # CHECK: sllv $7, $zero, $9
|
| /external/llvm/test/MC/Disassembler/Mips/mips32r3/ |
| valid-mips32r3.txt | 55 0x00 0xa3 0x10 0x04 # CHECK: sllv $2, $3, $5
77 0x01 0x20 0x38 0x04 # CHECK: sllv $7, $zero, $9
78 0x01 0x20 0x38 0x04 # CHECK: sllv $7, $zero, $9
|
| /external/llvm/test/MC/Disassembler/Mips/mips32r5/ |
| valid-mips32r5.txt | 55 0x00 0xa3 0x10 0x04 # CHECK: sllv $2, $3, $5
77 0x01 0x20 0x38 0x04 # CHECK: sllv $7, $zero, $9
78 0x01 0x20 0x38 0x04 # CHECK: sllv $7, $zero, $9
|
| /external/llvm/test/MC/Disassembler/Mips/mips64/ |
| valid-mips64.txt | 74 0x00 0xa3 0x10 0x04 # CHECK: sllv $2, $3, $5
97 0x01 0x20 0x38 0x04 # CHECK: sllv $7, $zero, $9
98 0x01 0x20 0x38 0x04 # CHECK: sllv $7, $zero, $9
|
| /external/llvm/lib/Target/Mips/ |
| MipsScheduleP5600.td | 176 // add, addi, addiu, addu, andi, ori, rotr, se[bh], sllv?, sr[al]v?, slt, sltu,
|
| /external/llvm/test/MC/Mips/micromips32r6/ |
| valid.s | 322 sllv $2, $3, $5 # CHECK: sllv $2, $3, $5 # encoding: [0x00,0x65,0x10,0x10]
327 sll $2, $3, $5 # CHECK: sllv $2, $3, $5 # encoding: [0x00,0x65,0x10,0x10]
330 sll $2, $3 # CHECK: sllv $2, $2, $3 # encoding: [0x00,0x43,0x10,0x10]
[all...] |
| /external/llvm/test/MC/Mips/micromips64r6/ |
| valid.s | 242 sllv $2, $3, $5 # CHECK: sllv $2, $3, $5 # encoding: [0x00,0x65,0x10,0x10]
247 sll $2, $3, $5 # CHECK: sllv $2, $3, $5 # encoding: [0x00,0x65,0x10,0x10]
250 sll $2, $3 # CHECK: sllv $2, $2, $3 # encoding: [0x00,0x43,0x10,0x10]
|
| /external/pcre/dist2/src/sljit/ |
| sljitNativeMIPS_32.c | 328 EMIT_SHIFT(SLL, SLLV);
|
| /prebuilts/go/darwin-x86/src/runtime/ |
| sys_linux_mips64x.s | 244 SLLV $32, RSB
|
| /prebuilts/go/linux-x86/src/runtime/ |
| sys_linux_mips64x.s | 244 SLLV $32, RSB
|
| /external/llvm/test/MC/Disassembler/Mips/mips4/ |
| valid-mips4.txt | 66 0x01 0x20 0x38 0x04 # CHECK: sllv $7, $zero, $9
67 0x01 0x20 0x38 0x04 # CHECK: sllv $7, $zero, $9
|
| /external/valgrind/VEX/priv/ |
| host_mips_isel.c | [all...] |
| /external/llvm/test/MC/Disassembler/Mips/mips64r2/ |
| valid-mips64r2.txt | 84 0x00 0xa3 0x10 0x04 # CHECK: sllv $2, $3, $5
109 0x01 0x20 0x38 0x04 # CHECK: sllv $7, $zero, $9
110 0x01 0x20 0x38 0x04 # CHECK: sllv $7, $zero, $9
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r3/ |
| valid-mips64r3.txt | 81 0x00 0xa3 0x10 0x04 # CHECK: sllv $2, $3, $5
106 0x01 0x20 0x38 0x04 # CHECK: sllv $7, $zero, $9
107 0x01 0x20 0x38 0x04 # CHECK: sllv $7, $zero, $9
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r5/ |
| valid-mips64r5.txt | 81 0x00 0xa3 0x10 0x04 # CHECK: sllv $2, $3, $5
106 0x01 0x20 0x38 0x04 # CHECK: sllv $7, $zero, $9
107 0x01 0x20 0x38 0x04 # CHECK: sllv $7, $zero, $9
|
| /external/swiftshader/third_party/subzero/src/ |
| IceAssemblerMIPS32.cpp | 986 void AssemblerMIPS32::sllv(const Operand *OpRd, const Operand *OpRt, function in class:Ice::MIPS32::AssemblerMIPS32
989 emitRdRsRt(Opcode, OpRd, OpRs, OpRt, "sllv");
[all...] |
| IceInstMIPS32.cpp | 131 template <> const char *InstMIPS32Sllv::Opcode = "sllv";
[all...] |
| IceInstMIPS32.h | 262 Sllv,
[all...] |
| /external/v8/src/mips/ |
| constants-mips.h | 415 SLLV = ((0U << 3) + 4),
929 FunctionFieldToBitNumber(SLLV) | FunctionFieldToBitNumber(SRLV) |
[all...] |
| disasm-mips.cc | 1074 case SLLV:
1075 Format(instr, "sllv 'rd, 'rt, 'rs");
[all...] |
| /external/v8/src/mips64/ |
| constants-mips64.h | 398 SLLV = ((0U << 3) + 4),
968 FunctionFieldToBitNumber(SLLV) | FunctionFieldToBitNumber(DSLLV) |
[all...] |
| /prebuilts/go/darwin-x86/src/cmd/compile/internal/ssa/ |
| rewriteMIPS64.go | [all...] |
| /prebuilts/go/linux-x86/src/cmd/compile/internal/ssa/ |
| rewriteMIPS64.go | [all...] |
| /external/llvm/test/MC/Disassembler/Mips/micromips32r3/ |
| valid-el.txt | 83 0x65 0x00 0x10 0x10 # CHECK: sllv $2, $3, $5
|
