| /external/capstone/suite/MC/Mips/ |
| micromips-alu-instructions.s.cs | 16 0x63,0xb0,0x67,0x00 = sltiu $3, $3, 103
|
| mips-alu-instructions.s.cs | 21 0x67,0x00,0x63,0x2c = sltiu $3, $3, 103
|
| mips64-alu-instructions.s.cs | 19 0x67,0x00,0x63,0x2c = sltiu $3, $3, 103
|
| /external/llvm/test/MC/Mips/ |
| elf-gprel-32-64.s | 40 sltiu $1, $4, 4
|
| micromips-alu-instructions.s | 23 # CHECK-EL: sltiu $3, $3, 103 # encoding: [0x63,0xb0,0x67,0x00]
66 # CHECK-EB: sltiu $3, $3, 103 # encoding: [0xb0,0x63,0x00,0x67]
107 sltiu $3, $3, 103
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/mips/ |
| mips-abi32.d | 72 f8: 2c840001 sltiu a0,a0,1
|
| mips-abi32.s | 77 # 00f8 sltiu a0,a0,1
|
| mips-gp32-fp32.d | 72 f8: 2c840001 sltiu a0,a0,1
|
| mips-gp32-fp32.s | 77 # 00f8 sltiu a0,a0,1
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| mips-gp32-fp64.d | 71 f0: 2c840001 sltiu a0,a0,1
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| mips-gp32-fp64.s | 75 # 00f0 sltiu a0,a0,1
|
| mips-abi32-pic.d | 93 14c: 2c840001 sltiu a0,a0,1
|
| mips-abi32-pic.s | 119 # 0194 sltiu a0,a0,1
|
| mips-gp32-fp32-pic.d | 93 14c: 2c840001 sltiu a0,a0,1
|
| mips-gp32-fp32-pic.s | 119 # 0194 sltiu a0,a0,1
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| mips-gp32-fp64-pic.d | 93 148: 2c840001 sltiu a0,a0,1
|
| mips-gp32-fp64-pic.s | 118 # 0190 sltiu a0,a0,1
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| mips-gp64-fp32-pic.d | 93 148: 2c840001 sltiu a0,a0,1
|
| /external/llvm/test/CodeGen/Mips/ |
| octeon.ll | 35 ; MIPS64: sltiu $[[T1:[0-9]+]], $[[T0]], 1
51 ; MIPS64: sltiu $[[T2:[0-9]+]], $[[T1]], 1
|
| /external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/ |
| icmp.ll | 22 ; MIPS32: sltiu {{.*}}, {{.*}}, 1
122 ; MIPS32: sltiu {{.*}}, {{.*}}, 1
|
| /external/llvm/test/MC/Mips/mips1/ |
| valid.s | 96 sltiu $25,$25,-15531 # CHECK: sltiu $25, $25, -15531 # encoding: [0x2f,0x39,0xc3,0x55]
98 sltu $24,$25,-15531 # CHECK: sltiu $24, $25, -15531 # encoding: [0x2f,0x38,0xc3,0x55]
|
| /external/swiftshader/third_party/subzero/tests_lit/assembler/mips32/ |
| encoding_test_arith.ll | 93 ; ASM-NEXT: sltiu $a0, $a0, 1
101 ; DIS-NEXT: 28: 2c840001 sltiu a0,a0,1
|
| /external/llvm/lib/Target/Mips/ |
| Mips16InstrInfo.td | 440 // op2 can be cmpi or slti/sltiu
662 def BteqzT8SltiuX16: FEXT_T8I8I16_ins<"bteqz", "sltiu">,
689 def BtnezT8SltiuX16: FEXT_T8I8I16_ins<"btnez", "sltiu">,
1075 // Purpose: b = Sltiu rl, imm.
1079 def SelTBteqZSltiu: SeliT<"bteqz", "sltiu">;
1134 def SelTBtneZSltiu: SeliT<"btnez", "sltiu">;
1179 // Format: SLTIU rx, immediate MIPS16e
1184 def SltiuRxImm16: FRI16R_ins<0b01011, "sltiu", IIM16Alu> {
[all...] |
| /external/webp/src/dsp/ |
| cost_mips_dsp_r2.c | 52 "sltiu %[temp0], %[v_reg], 2 \n\t"
|
| /toolchain/binutils/binutils-2.27/binutils/testsuite/binutils-all/mips/ |
| mips16-undecoded.s | 53 sltiu $2, 0x4011
|
