| /external/python/cpython3/Modules/_ctypes/libffi/src/powerpc/ |
| sysv.S | 134 stfd %f1,0(%r30)
137 stfd %f2,8(%r30)
|
| /toolchain/binutils/binutils-2.27/ld/testsuite/ld-powerpc/ |
| tocopt7.s | 193 stfd 9,x4t@toc@l(9)
196 stfd 6,0(5)
|
| tocopt8.s | 167 stfd 9,x1@toc@l(9)
170 stfd 6,0(5)
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| group-reloc-ldc-parsing-bad.l | 57 [^:]*:40: Error: this group relocation is not allowed on this instruction -- `stfd f0,\[r0,#:pc_g0_nc:\(sym\)\]'
58 [^:]*:40: Error: this group relocation is not allowed on this instruction -- `stfd f0,\[r0,#:pc_g1_nc:\(sym\)\]'
59 [^:]*:40: Error: this group relocation is not allowed on this instruction -- `stfd f0,\[r0,#:sb_g0_nc:\(sym\)\]'
60 [^:]*:40: Error: this group relocation is not allowed on this instruction -- `stfd f0,\[r0,#:sb_g1_nc:\(sym\)\]'
61 [^:]*:40: Error: unknown group relocation -- `stfd f0,\[r0,#:foo:\(sym\)\]'
|
| group-reloc-ldc.d | 260 0[0-9a-f]+ <[^>]+> ed808185 stfd f0, \[r0, #532\].*
262 0[0-9a-f]+ <[^>]+> ed808185 stfd f0, \[r0, #532\].*
264 0[0-9a-f]+ <[^>]+> ed808185 stfd f0, \[r0, #532\].*
266 0[0-9a-f]+ <[^>]+> ed808185 stfd f0, \[r0, #532\].*
268 0[0-9a-f]+ <[^>]+> ed808185 stfd f0, \[r0, #532\].*
270 0[0-9a-f]+ <[^>]+> ed808185 stfd f0, \[r0, #532\].*
284 0[0-9a-f]+ <[^>]+> ed008185 stfd f0, \[r0, #-532\].*
286 0[0-9a-f]+ <[^>]+> ed008185 stfd f0, \[r0, #-532\].*
288 0[0-9a-f]+ <[^>]+> ed008185 stfd f0, \[r0, #-532\].*
290 0[0-9a-f]+ <[^>]+> ed008185 stfd f0, \[r0, #-532\].
[all...] |
| /external/llvm/test/CodeGen/PowerPC/ |
| stack-realign.ll | 187 ; CHECK: stfd 30, -16(30)
204 ; CHECK-FP: stfd 30, -16(30)
|
| unaligned.ll | 74 ; CHECK: stfd
|
| ppc64le-aggregates.ll | 5 ; instead of lfd, and stxsdx instead of stfd. That is a poor choice when we
308 ; CHECK: stfd 1, [[OFF:.*]](1)
|
| fast-isel-load-store.ll | 141 ; ELF64: stfd
|
| optcmp.ll | 122 ; CHECK: stfd 0, 0(5)
|
| s000-alias-misched.ll | 75 ; CHECK: stfd
|
| sjlj.ll | 68 ; CHECK-DAG: stfd
|
| /external/v8/src/ppc/ |
| deoptimizer-ppc.cc | 132 __ stfd(dreg, MemOperand(sp, offset));
201 __ stfd(d0, MemOperand(r4, dst_offset));
|
| macro-assembler-ppc.cc | 247 stfd(dreg, MemOperand(location, stack_offset));
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/ia64/ |
| psn.s | 243 stfd [ r60 ] = f90
244 stfd.d1 [ r60 ] = f90
245 stfd.nt1 [ r60 ] = f90
246 stfd.d2 [ r60 ] = f90
247 stfd.nt2 [ r60 ] = f90
248 stfd.nta [ r60 ] = f90
249 stfd.d3 [ r60 ] = f90
250 stfd.d4 [ r60 ] = f90
251 stfd.d5 [ r60 ] = f90
252 stfd.d6 [ r60 ] = f9
[all...] |
| dv-raw-err.s | 609 stfd [r6] = f14, 16
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/ppc/ |
| a2.s | 465 stfd 20,-8(10)
466 stfd 20,8(10)
|
| /external/llvm/test/MC/PowerPC/ |
| ppc64-encoding-fp.s | 54 # CHECK-BE: stfd 2, 128(4) # encoding: [0xd8,0x44,0x00,0x80]
55 # CHECK-LE: stfd 2, 128(4) # encoding: [0x80,0x00,0x44,0xd8]
56 stfd 2, 128(4)
|
| /external/capstone/suite/MC/PowerPC/ |
| ppc64-encoding-fp.s.cs | 16 0xd8,0x44,0x00,0x80 = stfd 2, 128(4)
|
| /external/llvm/test/MC/Disassembler/PowerPC/ |
| ppc64-encoding-fp.txt | 45 # CHECK: stfd 2, 128(4)
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| PPCSchedule.td | 318 // stfd LdStUX
|
| PPCHazardRecognizers.cpp | 272 case PPC::STFD:
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/PowerPC/ |
| ppc32-vaarg.ll | 118 ; CHECK-NEXT: stfd 0, var2@l(3)
|
| /external/v8/src/compiler/ppc/ |
| code-generator-ppc.cc | 612 __ stfd(value, operand); \
[all...] |
| /external/valgrind/auxprogs/ |
| ppcfround.c | 142 "stfd %%f4, 24(%0)\n\t" /* res */ \
|
