1 #objdump: -dr --prefix-addresses --show-raw-insn 2 #skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* *-*-vxworks 3 #name: Group relocation tests (ldc) 4 5 .*: +file format .*arm.* 6 7 Disassembly of section .text: 8 0[0-9a-f]+ <[^>]+> ed900085 ldc 0, cr0, \[r0, #532\].* 9 0: R_ARM_LDC_PC_G0 f 10 0[0-9a-f]+ <[^>]+> ed900085 ldc 0, cr0, \[r0, #532\].* 11 4: R_ARM_LDC_PC_G1 f 12 0[0-9a-f]+ <[^>]+> ed900085 ldc 0, cr0, \[r0, #532\].* 13 8: R_ARM_LDC_PC_G2 f 14 0[0-9a-f]+ <[^>]+> ed900085 ldc 0, cr0, \[r0, #532\].* 15 c: R_ARM_LDC_SB_G0 f 16 0[0-9a-f]+ <[^>]+> ed900085 ldc 0, cr0, \[r0, #532\].* 17 10: R_ARM_LDC_SB_G1 f 18 0[0-9a-f]+ <[^>]+> ed900085 ldc 0, cr0, \[r0, #532\].* 19 14: R_ARM_LDC_SB_G2 f 20 0[0-9a-f]+ <[^>]+> ed800085 stc 0, cr0, \[r0, #532\].* 21 18: R_ARM_LDC_PC_G0 f 22 0[0-9a-f]+ <[^>]+> ed800085 stc 0, cr0, \[r0, #532\].* 23 1c: R_ARM_LDC_PC_G1 f 24 0[0-9a-f]+ <[^>]+> ed800085 stc 0, cr0, \[r0, #532\].* 25 20: R_ARM_LDC_PC_G2 f 26 0[0-9a-f]+ <[^>]+> ed800085 stc 0, cr0, \[r0, #532\].* 27 24: R_ARM_LDC_SB_G0 f 28 0[0-9a-f]+ <[^>]+> ed800085 stc 0, cr0, \[r0, #532\].* 29 28: R_ARM_LDC_SB_G1 f 30 0[0-9a-f]+ <[^>]+> ed800085 stc 0, cr0, \[r0, #532\].* 31 2c: R_ARM_LDC_SB_G2 f 32 0[0-9a-f]+ <[^>]+> ed100085 ldc 0, cr0, \[r0, #-532\].* 33 30: R_ARM_LDC_PC_G0 f 34 0[0-9a-f]+ <[^>]+> ed100085 ldc 0, cr0, \[r0, #-532\].* 35 34: R_ARM_LDC_PC_G1 f 36 0[0-9a-f]+ <[^>]+> ed100085 ldc 0, cr0, \[r0, #-532\].* 37 38: R_ARM_LDC_PC_G2 f 38 0[0-9a-f]+ <[^>]+> ed100085 ldc 0, cr0, \[r0, #-532\].* 39 3c: R_ARM_LDC_SB_G0 f 40 0[0-9a-f]+ <[^>]+> ed100085 ldc 0, cr0, \[r0, #-532\].* 41 40: R_ARM_LDC_SB_G1 f 42 0[0-9a-f]+ <[^>]+> ed100085 ldc 0, cr0, \[r0, #-532\].* 43 44: R_ARM_LDC_SB_G2 f 44 0[0-9a-f]+ <[^>]+> ed000085 stc 0, cr0, \[r0, #-532\].* 45 48: R_ARM_LDC_PC_G0 f 46 0[0-9a-f]+ <[^>]+> ed000085 stc 0, cr0, \[r0, #-532\].* 47 4c: R_ARM_LDC_PC_G1 f 48 0[0-9a-f]+ <[^>]+> ed000085 stc 0, cr0, \[r0, #-532\].* 49 50: R_ARM_LDC_PC_G2 f 50 0[0-9a-f]+ <[^>]+> ed000085 stc 0, cr0, \[r0, #-532\].* 51 54: R_ARM_LDC_SB_G0 f 52 0[0-9a-f]+ <[^>]+> ed000085 stc 0, cr0, \[r0, #-532\].* 53 58: R_ARM_LDC_SB_G1 f 54 0[0-9a-f]+ <[^>]+> ed000085 stc 0, cr0, \[r0, #-532\].* 55 5c: R_ARM_LDC_SB_G2 f 56 0[0-9a-f]+ <[^>]+> edd00085 ldcl 0, cr0, \[r0, #532\].* 57 60: R_ARM_LDC_PC_G0 f 58 0[0-9a-f]+ <[^>]+> edd00085 ldcl 0, cr0, \[r0, #532\].* 59 64: R_ARM_LDC_PC_G1 f 60 0[0-9a-f]+ <[^>]+> edd00085 ldcl 0, cr0, \[r0, #532\].* 61 68: R_ARM_LDC_PC_G2 f 62 0[0-9a-f]+ <[^>]+> edd00085 ldcl 0, cr0, \[r0, #532\].* 63 6c: R_ARM_LDC_SB_G0 f 64 0[0-9a-f]+ <[^>]+> edd00085 ldcl 0, cr0, \[r0, #532\].* 65 70: R_ARM_LDC_SB_G1 f 66 0[0-9a-f]+ <[^>]+> edd00085 ldcl 0, cr0, \[r0, #532\].* 67 74: R_ARM_LDC_SB_G2 f 68 0[0-9a-f]+ <[^>]+> edc00085 stcl 0, cr0, \[r0, #532\].* 69 78: R_ARM_LDC_PC_G0 f 70 0[0-9a-f]+ <[^>]+> edc00085 stcl 0, cr0, \[r0, #532\].* 71 7c: R_ARM_LDC_PC_G1 f 72 0[0-9a-f]+ <[^>]+> edc00085 stcl 0, cr0, \[r0, #532\].* 73 80: R_ARM_LDC_PC_G2 f 74 0[0-9a-f]+ <[^>]+> edc00085 stcl 0, cr0, \[r0, #532\].* 75 84: R_ARM_LDC_SB_G0 f 76 0[0-9a-f]+ <[^>]+> edc00085 stcl 0, cr0, \[r0, #532\].* 77 88: R_ARM_LDC_SB_G1 f 78 0[0-9a-f]+ <[^>]+> edc00085 stcl 0, cr0, \[r0, #532\].* 79 8c: R_ARM_LDC_SB_G2 f 80 0[0-9a-f]+ <[^>]+> ed500085 ldcl 0, cr0, \[r0, #-532\].* 81 90: R_ARM_LDC_PC_G0 f 82 0[0-9a-f]+ <[^>]+> ed500085 ldcl 0, cr0, \[r0, #-532\].* 83 94: R_ARM_LDC_PC_G1 f 84 0[0-9a-f]+ <[^>]+> ed500085 ldcl 0, cr0, \[r0, #-532\].* 85 98: R_ARM_LDC_PC_G2 f 86 0[0-9a-f]+ <[^>]+> ed500085 ldcl 0, cr0, \[r0, #-532\].* 87 9c: R_ARM_LDC_SB_G0 f 88 0[0-9a-f]+ <[^>]+> ed500085 ldcl 0, cr0, \[r0, #-532\].* 89 a0: R_ARM_LDC_SB_G1 f 90 0[0-9a-f]+ <[^>]+> ed500085 ldcl 0, cr0, \[r0, #-532\].* 91 a4: R_ARM_LDC_SB_G2 f 92 0[0-9a-f]+ <[^>]+> ed400085 stcl 0, cr0, \[r0, #-532\].* 93 a8: R_ARM_LDC_PC_G0 f 94 0[0-9a-f]+ <[^>]+> ed400085 stcl 0, cr0, \[r0, #-532\].* 95 ac: R_ARM_LDC_PC_G1 f 96 0[0-9a-f]+ <[^>]+> ed400085 stcl 0, cr0, \[r0, #-532\].* 97 b0: R_ARM_LDC_PC_G2 f 98 0[0-9a-f]+ <[^>]+> ed400085 stcl 0, cr0, \[r0, #-532\].* 99 b4: R_ARM_LDC_SB_G0 f 100 0[0-9a-f]+ <[^>]+> ed400085 stcl 0, cr0, \[r0, #-532\].* 101 b8: R_ARM_LDC_SB_G1 f 102 0[0-9a-f]+ <[^>]+> ed400085 stcl 0, cr0, \[r0, #-532\].* 103 bc: R_ARM_LDC_SB_G2 f 104 0[0-9a-f]+ <[^>]+> fd900085 ldc2 0, cr0, \[r0, #532\].* 105 c0: R_ARM_LDC_PC_G0 f 106 0[0-9a-f]+ <[^>]+> fd900085 ldc2 0, cr0, \[r0, #532\].* 107 c4: R_ARM_LDC_PC_G1 f 108 0[0-9a-f]+ <[^>]+> fd900085 ldc2 0, cr0, \[r0, #532\].* 109 c8: R_ARM_LDC_PC_G2 f 110 0[0-9a-f]+ <[^>]+> fd900085 ldc2 0, cr0, \[r0, #532\].* 111 cc: R_ARM_LDC_SB_G0 f 112 0[0-9a-f]+ <[^>]+> fd900085 ldc2 0, cr0, \[r0, #532\].* 113 d0: R_ARM_LDC_SB_G1 f 114 0[0-9a-f]+ <[^>]+> fd900085 ldc2 0, cr0, \[r0, #532\].* 115 d4: R_ARM_LDC_SB_G2 f 116 0[0-9a-f]+ <[^>]+> fd800085 stc2 0, cr0, \[r0, #532\].* 117 d8: R_ARM_LDC_PC_G0 f 118 0[0-9a-f]+ <[^>]+> fd800085 stc2 0, cr0, \[r0, #532\].* 119 dc: R_ARM_LDC_PC_G1 f 120 0[0-9a-f]+ <[^>]+> fd800085 stc2 0, cr0, \[r0, #532\].* 121 e0: R_ARM_LDC_PC_G2 f 122 0[0-9a-f]+ <[^>]+> fd800085 stc2 0, cr0, \[r0, #532\].* 123 e4: R_ARM_LDC_SB_G0 f 124 0[0-9a-f]+ <[^>]+> fd800085 stc2 0, cr0, \[r0, #532\].* 125 e8: R_ARM_LDC_SB_G1 f 126 0[0-9a-f]+ <[^>]+> fd800085 stc2 0, cr0, \[r0, #532\].* 127 ec: R_ARM_LDC_SB_G2 f 128 0[0-9a-f]+ <[^>]+> fd100085 ldc2 0, cr0, \[r0, #-532\].* 129 f0: R_ARM_LDC_PC_G0 f 130 0[0-9a-f]+ <[^>]+> fd100085 ldc2 0, cr0, \[r0, #-532\].* 131 f4: R_ARM_LDC_PC_G1 f 132 0[0-9a-f]+ <[^>]+> fd100085 ldc2 0, cr0, \[r0, #-532\].* 133 f8: R_ARM_LDC_PC_G2 f 134 0[0-9a-f]+ <[^>]+> fd100085 ldc2 0, cr0, \[r0, #-532\].* 135 fc: R_ARM_LDC_SB_G0 f 136 0[0-9a-f]+ <[^>]+> fd100085 ldc2 0, cr0, \[r0, #-532\].* 137 100: R_ARM_LDC_SB_G1 f 138 0[0-9a-f]+ <[^>]+> fd100085 ldc2 0, cr0, \[r0, #-532\].* 139 104: R_ARM_LDC_SB_G2 f 140 0[0-9a-f]+ <[^>]+> fd000085 stc2 0, cr0, \[r0, #-532\].* 141 108: R_ARM_LDC_PC_G0 f 142 0[0-9a-f]+ <[^>]+> fd000085 stc2 0, cr0, \[r0, #-532\].* 143 10c: R_ARM_LDC_PC_G1 f 144 0[0-9a-f]+ <[^>]+> fd000085 stc2 0, cr0, \[r0, #-532\].* 145 110: R_ARM_LDC_PC_G2 f 146 0[0-9a-f]+ <[^>]+> fd000085 stc2 0, cr0, \[r0, #-532\].* 147 114: R_ARM_LDC_SB_G0 f 148 0[0-9a-f]+ <[^>]+> fd000085 stc2 0, cr0, \[r0, #-532\].* 149 118: R_ARM_LDC_SB_G1 f 150 0[0-9a-f]+ <[^>]+> fd000085 stc2 0, cr0, \[r0, #-532\].* 151 11c: R_ARM_LDC_SB_G2 f 152 0[0-9a-f]+ <[^>]+> fdd00085 ldc2l 0, cr0, \[r0, #532\].* 153 120: R_ARM_LDC_PC_G0 f 154 0[0-9a-f]+ <[^>]+> fdd00085 ldc2l 0, cr0, \[r0, #532\].* 155 124: R_ARM_LDC_PC_G1 f 156 0[0-9a-f]+ <[^>]+> fdd00085 ldc2l 0, cr0, \[r0, #532\].* 157 128: R_ARM_LDC_PC_G2 f 158 0[0-9a-f]+ <[^>]+> fdd00085 ldc2l 0, cr0, \[r0, #532\].* 159 12c: R_ARM_LDC_SB_G0 f 160 0[0-9a-f]+ <[^>]+> fdd00085 ldc2l 0, cr0, \[r0, #532\].* 161 130: R_ARM_LDC_SB_G1 f 162 0[0-9a-f]+ <[^>]+> fdd00085 ldc2l 0, cr0, \[r0, #532\].* 163 134: R_ARM_LDC_SB_G2 f 164 0[0-9a-f]+ <[^>]+> fdc00085 stc2l 0, cr0, \[r0, #532\].* 165 138: R_ARM_LDC_PC_G0 f 166 0[0-9a-f]+ <[^>]+> fdc00085 stc2l 0, cr0, \[r0, #532\].* 167 13c: R_ARM_LDC_PC_G1 f 168 0[0-9a-f]+ <[^>]+> fdc00085 stc2l 0, cr0, \[r0, #532\].* 169 140: R_ARM_LDC_PC_G2 f 170 0[0-9a-f]+ <[^>]+> fdc00085 stc2l 0, cr0, \[r0, #532\].* 171 144: R_ARM_LDC_SB_G0 f 172 0[0-9a-f]+ <[^>]+> fdc00085 stc2l 0, cr0, \[r0, #532\].* 173 148: R_ARM_LDC_SB_G1 f 174 0[0-9a-f]+ <[^>]+> fdc00085 stc2l 0, cr0, \[r0, #532\].* 175 14c: R_ARM_LDC_SB_G2 f 176 0[0-9a-f]+ <[^>]+> fd500085 ldc2l 0, cr0, \[r0, #-532\].* 177 150: R_ARM_LDC_PC_G0 f 178 0[0-9a-f]+ <[^>]+> fd500085 ldc2l 0, cr0, \[r0, #-532\].* 179 154: R_ARM_LDC_PC_G1 f 180 0[0-9a-f]+ <[^>]+> fd500085 ldc2l 0, cr0, \[r0, #-532\].* 181 158: R_ARM_LDC_PC_G2 f 182 0[0-9a-f]+ <[^>]+> fd500085 ldc2l 0, cr0, \[r0, #-532\].* 183 15c: R_ARM_LDC_SB_G0 f 184 0[0-9a-f]+ <[^>]+> fd500085 ldc2l 0, cr0, \[r0, #-532\].* 185 160: R_ARM_LDC_SB_G1 f 186 0[0-9a-f]+ <[^>]+> fd500085 ldc2l 0, cr0, \[r0, #-532\].* 187 164: R_ARM_LDC_SB_G2 f 188 0[0-9a-f]+ <[^>]+> fd400085 stc2l 0, cr0, \[r0, #-532\].* 189 168: R_ARM_LDC_PC_G0 f 190 0[0-9a-f]+ <[^>]+> fd400085 stc2l 0, cr0, \[r0, #-532\].* 191 16c: R_ARM_LDC_PC_G1 f 192 0[0-9a-f]+ <[^>]+> fd400085 stc2l 0, cr0, \[r0, #-532\].* 193 170: R_ARM_LDC_PC_G2 f 194 0[0-9a-f]+ <[^>]+> fd400085 stc2l 0, cr0, \[r0, #-532\].* 195 174: R_ARM_LDC_SB_G0 f 196 0[0-9a-f]+ <[^>]+> fd400085 stc2l 0, cr0, \[r0, #-532\].* 197 178: R_ARM_LDC_SB_G1 f 198 0[0-9a-f]+ <[^>]+> fd400085 stc2l 0, cr0, \[r0, #-532\].* 199 17c: R_ARM_LDC_SB_G2 f 200 0[0-9a-f]+ <[^>]+> ed900185 ldfs f0, \[r0, #532\].* 201 180: R_ARM_LDC_PC_G0 f 202 0[0-9a-f]+ <[^>]+> ed900185 ldfs f0, \[r0, #532\].* 203 184: R_ARM_LDC_PC_G1 f 204 0[0-9a-f]+ <[^>]+> ed900185 ldfs f0, \[r0, #532\].* 205 188: R_ARM_LDC_PC_G2 f 206 0[0-9a-f]+ <[^>]+> ed900185 ldfs f0, \[r0, #532\].* 207 18c: R_ARM_LDC_SB_G0 f 208 0[0-9a-f]+ <[^>]+> ed900185 ldfs f0, \[r0, #532\].* 209 190: R_ARM_LDC_SB_G1 f 210 0[0-9a-f]+ <[^>]+> ed900185 ldfs f0, \[r0, #532\].* 211 194: R_ARM_LDC_SB_G2 f 212 0[0-9a-f]+ <[^>]+> ed800185 stfs f0, \[r0, #532\].* 213 198: R_ARM_LDC_PC_G0 f 214 0[0-9a-f]+ <[^>]+> ed800185 stfs f0, \[r0, #532\].* 215 19c: R_ARM_LDC_PC_G1 f 216 0[0-9a-f]+ <[^>]+> ed800185 stfs f0, \[r0, #532\].* 217 1a0: R_ARM_LDC_PC_G2 f 218 0[0-9a-f]+ <[^>]+> ed800185 stfs f0, \[r0, #532\].* 219 1a4: R_ARM_LDC_SB_G0 f 220 0[0-9a-f]+ <[^>]+> ed800185 stfs f0, \[r0, #532\].* 221 1a8: R_ARM_LDC_SB_G1 f 222 0[0-9a-f]+ <[^>]+> ed800185 stfs f0, \[r0, #532\].* 223 1ac: R_ARM_LDC_SB_G2 f 224 0[0-9a-f]+ <[^>]+> ed100185 ldfs f0, \[r0, #-532\].* 225 1b0: R_ARM_LDC_PC_G0 f 226 0[0-9a-f]+ <[^>]+> ed100185 ldfs f0, \[r0, #-532\].* 227 1b4: R_ARM_LDC_PC_G1 f 228 0[0-9a-f]+ <[^>]+> ed100185 ldfs f0, \[r0, #-532\].* 229 1b8: R_ARM_LDC_PC_G2 f 230 0[0-9a-f]+ <[^>]+> ed100185 ldfs f0, \[r0, #-532\].* 231 1bc: R_ARM_LDC_SB_G0 f 232 0[0-9a-f]+ <[^>]+> ed100185 ldfs f0, \[r0, #-532\].* 233 1c0: R_ARM_LDC_SB_G1 f 234 0[0-9a-f]+ <[^>]+> ed100185 ldfs f0, \[r0, #-532\].* 235 1c4: R_ARM_LDC_SB_G2 f 236 0[0-9a-f]+ <[^>]+> ed000185 stfs f0, \[r0, #-532\].* 237 1c8: R_ARM_LDC_PC_G0 f 238 0[0-9a-f]+ <[^>]+> ed000185 stfs f0, \[r0, #-532\].* 239 1cc: R_ARM_LDC_PC_G1 f 240 0[0-9a-f]+ <[^>]+> ed000185 stfs f0, \[r0, #-532\].* 241 1d0: R_ARM_LDC_PC_G2 f 242 0[0-9a-f]+ <[^>]+> ed000185 stfs f0, \[r0, #-532\].* 243 1d4: R_ARM_LDC_SB_G0 f 244 0[0-9a-f]+ <[^>]+> ed000185 stfs f0, \[r0, #-532\].* 245 1d8: R_ARM_LDC_SB_G1 f 246 0[0-9a-f]+ <[^>]+> ed000185 stfs f0, \[r0, #-532\].* 247 1dc: R_ARM_LDC_SB_G2 f 248 0[0-9a-f]+ <[^>]+> ed908185 ldfd f0, \[r0, #532\].* 249 1e0: R_ARM_LDC_PC_G0 f 250 0[0-9a-f]+ <[^>]+> ed908185 ldfd f0, \[r0, #532\].* 251 1e4: R_ARM_LDC_PC_G1 f 252 0[0-9a-f]+ <[^>]+> ed908185 ldfd f0, \[r0, #532\].* 253 1e8: R_ARM_LDC_PC_G2 f 254 0[0-9a-f]+ <[^>]+> ed908185 ldfd f0, \[r0, #532\].* 255 1ec: R_ARM_LDC_SB_G0 f 256 0[0-9a-f]+ <[^>]+> ed908185 ldfd f0, \[r0, #532\].* 257 1f0: R_ARM_LDC_SB_G1 f 258 0[0-9a-f]+ <[^>]+> ed908185 ldfd f0, \[r0, #532\].* 259 1f4: R_ARM_LDC_SB_G2 f 260 0[0-9a-f]+ <[^>]+> ed808185 stfd f0, \[r0, #532\].* 261 1f8: R_ARM_LDC_PC_G0 f 262 0[0-9a-f]+ <[^>]+> ed808185 stfd f0, \[r0, #532\].* 263 1fc: R_ARM_LDC_PC_G1 f 264 0[0-9a-f]+ <[^>]+> ed808185 stfd f0, \[r0, #532\].* 265 200: R_ARM_LDC_PC_G2 f 266 0[0-9a-f]+ <[^>]+> ed808185 stfd f0, \[r0, #532\].* 267 204: R_ARM_LDC_SB_G0 f 268 0[0-9a-f]+ <[^>]+> ed808185 stfd f0, \[r0, #532\].* 269 208: R_ARM_LDC_SB_G1 f 270 0[0-9a-f]+ <[^>]+> ed808185 stfd f0, \[r0, #532\].* 271 20c: R_ARM_LDC_SB_G2 f 272 0[0-9a-f]+ <[^>]+> ed108185 ldfd f0, \[r0, #-532\].* 273 210: R_ARM_LDC_PC_G0 f 274 0[0-9a-f]+ <[^>]+> ed108185 ldfd f0, \[r0, #-532\].* 275 214: R_ARM_LDC_PC_G1 f 276 0[0-9a-f]+ <[^>]+> ed108185 ldfd f0, \[r0, #-532\].* 277 218: R_ARM_LDC_PC_G2 f 278 0[0-9a-f]+ <[^>]+> ed108185 ldfd f0, \[r0, #-532\].* 279 21c: R_ARM_LDC_SB_G0 f 280 0[0-9a-f]+ <[^>]+> ed108185 ldfd f0, \[r0, #-532\].* 281 220: R_ARM_LDC_SB_G1 f 282 0[0-9a-f]+ <[^>]+> ed108185 ldfd f0, \[r0, #-532\].* 283 224: R_ARM_LDC_SB_G2 f 284 0[0-9a-f]+ <[^>]+> ed008185 stfd f0, \[r0, #-532\].* 285 228: R_ARM_LDC_PC_G0 f 286 0[0-9a-f]+ <[^>]+> ed008185 stfd f0, \[r0, #-532\].* 287 22c: R_ARM_LDC_PC_G1 f 288 0[0-9a-f]+ <[^>]+> ed008185 stfd f0, \[r0, #-532\].* 289 230: R_ARM_LDC_PC_G2 f 290 0[0-9a-f]+ <[^>]+> ed008185 stfd f0, \[r0, #-532\].* 291 234: R_ARM_LDC_SB_G0 f 292 0[0-9a-f]+ <[^>]+> ed008185 stfd f0, \[r0, #-532\].* 293 238: R_ARM_LDC_SB_G1 f 294 0[0-9a-f]+ <[^>]+> ed008185 stfd f0, \[r0, #-532\].* 295 23c: R_ARM_LDC_SB_G2 f 296 0[0-9a-f]+ <[^>]+> edd00185 ldfe f0, \[r0, #532\].* 297 240: R_ARM_LDC_PC_G0 f 298 0[0-9a-f]+ <[^>]+> edd00185 ldfe f0, \[r0, #532\].* 299 244: R_ARM_LDC_PC_G1 f 300 0[0-9a-f]+ <[^>]+> edd00185 ldfe f0, \[r0, #532\].* 301 248: R_ARM_LDC_PC_G2 f 302 0[0-9a-f]+ <[^>]+> edd00185 ldfe f0, \[r0, #532\].* 303 24c: R_ARM_LDC_SB_G0 f 304 0[0-9a-f]+ <[^>]+> edd00185 ldfe f0, \[r0, #532\].* 305 250: R_ARM_LDC_SB_G1 f 306 0[0-9a-f]+ <[^>]+> edd00185 ldfe f0, \[r0, #532\].* 307 254: R_ARM_LDC_SB_G2 f 308 0[0-9a-f]+ <[^>]+> edc00185 stfe f0, \[r0, #532\].* 309 258: R_ARM_LDC_PC_G0 f 310 0[0-9a-f]+ <[^>]+> edc00185 stfe f0, \[r0, #532\].* 311 25c: R_ARM_LDC_PC_G1 f 312 0[0-9a-f]+ <[^>]+> edc00185 stfe f0, \[r0, #532\].* 313 260: R_ARM_LDC_PC_G2 f 314 0[0-9a-f]+ <[^>]+> edc00185 stfe f0, \[r0, #532\].* 315 264: R_ARM_LDC_SB_G0 f 316 0[0-9a-f]+ <[^>]+> edc00185 stfe f0, \[r0, #532\].* 317 268: R_ARM_LDC_SB_G1 f 318 0[0-9a-f]+ <[^>]+> edc00185 stfe f0, \[r0, #532\].* 319 26c: R_ARM_LDC_SB_G2 f 320 0[0-9a-f]+ <[^>]+> ed500185 ldfe f0, \[r0, #-532\].* 321 270: R_ARM_LDC_PC_G0 f 322 0[0-9a-f]+ <[^>]+> ed500185 ldfe f0, \[r0, #-532\].* 323 274: R_ARM_LDC_PC_G1 f 324 0[0-9a-f]+ <[^>]+> ed500185 ldfe f0, \[r0, #-532\].* 325 278: R_ARM_LDC_PC_G2 f 326 0[0-9a-f]+ <[^>]+> ed500185 ldfe f0, \[r0, #-532\].* 327 27c: R_ARM_LDC_SB_G0 f 328 0[0-9a-f]+ <[^>]+> ed500185 ldfe f0, \[r0, #-532\].* 329 280: R_ARM_LDC_SB_G1 f 330 0[0-9a-f]+ <[^>]+> ed500185 ldfe f0, \[r0, #-532\].* 331 284: R_ARM_LDC_SB_G2 f 332 0[0-9a-f]+ <[^>]+> ed400185 stfe f0, \[r0, #-532\].* 333 288: R_ARM_LDC_PC_G0 f 334 0[0-9a-f]+ <[^>]+> ed400185 stfe f0, \[r0, #-532\].* 335 28c: R_ARM_LDC_PC_G1 f 336 0[0-9a-f]+ <[^>]+> ed400185 stfe f0, \[r0, #-532\].* 337 290: R_ARM_LDC_PC_G2 f 338 0[0-9a-f]+ <[^>]+> ed400185 stfe f0, \[r0, #-532\].* 339 294: R_ARM_LDC_SB_G0 f 340 0[0-9a-f]+ <[^>]+> ed400185 stfe f0, \[r0, #-532\].* 341 298: R_ARM_LDC_SB_G1 f 342 0[0-9a-f]+ <[^>]+> ed400185 stfe f0, \[r0, #-532\].* 343 29c: R_ARM_LDC_SB_G2 f 344 0[0-9a-f]+ <[^>]+> edd08185 ldfp f0, \[r0, #532\].* 345 2a0: R_ARM_LDC_PC_G0 f 346 0[0-9a-f]+ <[^>]+> edd08185 ldfp f0, \[r0, #532\].* 347 2a4: R_ARM_LDC_PC_G1 f 348 0[0-9a-f]+ <[^>]+> edd08185 ldfp f0, \[r0, #532\].* 349 2a8: R_ARM_LDC_PC_G2 f 350 0[0-9a-f]+ <[^>]+> edd08185 ldfp f0, \[r0, #532\].* 351 2ac: R_ARM_LDC_SB_G0 f 352 0[0-9a-f]+ <[^>]+> edd08185 ldfp f0, \[r0, #532\].* 353 2b0: R_ARM_LDC_SB_G1 f 354 0[0-9a-f]+ <[^>]+> edd08185 ldfp f0, \[r0, #532\].* 355 2b4: R_ARM_LDC_SB_G2 f 356 0[0-9a-f]+ <[^>]+> edc08185 stfp f0, \[r0, #532\].* 357 2b8: R_ARM_LDC_PC_G0 f 358 0[0-9a-f]+ <[^>]+> edc08185 stfp f0, \[r0, #532\].* 359 2bc: R_ARM_LDC_PC_G1 f 360 0[0-9a-f]+ <[^>]+> edc08185 stfp f0, \[r0, #532\].* 361 2c0: R_ARM_LDC_PC_G2 f 362 0[0-9a-f]+ <[^>]+> edc08185 stfp f0, \[r0, #532\].* 363 2c4: R_ARM_LDC_SB_G0 f 364 0[0-9a-f]+ <[^>]+> edc08185 stfp f0, \[r0, #532\].* 365 2c8: R_ARM_LDC_SB_G1 f 366 0[0-9a-f]+ <[^>]+> edc08185 stfp f0, \[r0, #532\].* 367 2cc: R_ARM_LDC_SB_G2 f 368 0[0-9a-f]+ <[^>]+> ed508185 ldfp f0, \[r0, #-532\].* 369 2d0: R_ARM_LDC_PC_G0 f 370 0[0-9a-f]+ <[^>]+> ed508185 ldfp f0, \[r0, #-532\].* 371 2d4: R_ARM_LDC_PC_G1 f 372 0[0-9a-f]+ <[^>]+> ed508185 ldfp f0, \[r0, #-532\].* 373 2d8: R_ARM_LDC_PC_G2 f 374 0[0-9a-f]+ <[^>]+> ed508185 ldfp f0, \[r0, #-532\].* 375 2dc: R_ARM_LDC_SB_G0 f 376 0[0-9a-f]+ <[^>]+> ed508185 ldfp f0, \[r0, #-532\].* 377 2e0: R_ARM_LDC_SB_G1 f 378 0[0-9a-f]+ <[^>]+> ed508185 ldfp f0, \[r0, #-532\].* 379 2e4: R_ARM_LDC_SB_G2 f 380 0[0-9a-f]+ <[^>]+> ed408185 stfp f0, \[r0, #-532\].* 381 2e8: R_ARM_LDC_PC_G0 f 382 0[0-9a-f]+ <[^>]+> ed408185 stfp f0, \[r0, #-532\].* 383 2ec: R_ARM_LDC_PC_G1 f 384 0[0-9a-f]+ <[^>]+> ed408185 stfp f0, \[r0, #-532\].* 385 2f0: R_ARM_LDC_PC_G2 f 386 0[0-9a-f]+ <[^>]+> ed408185 stfp f0, \[r0, #-532\].* 387 2f4: R_ARM_LDC_SB_G0 f 388 0[0-9a-f]+ <[^>]+> ed408185 stfp f0, \[r0, #-532\].* 389 2f8: R_ARM_LDC_SB_G1 f 390 0[0-9a-f]+ <[^>]+> ed408185 stfp f0, \[r0, #-532\].* 391 2fc: R_ARM_LDC_SB_G2 f 392 0[0-9a-f]+ <[^>]+> ed900a85 (vldr|flds) s0, \[r0, #532\].* 393 300: R_ARM_LDC_PC_G0 f 394 0[0-9a-f]+ <[^>]+> ed900a85 (vldr|flds) s0, \[r0, #532\].* 395 304: R_ARM_LDC_PC_G1 f 396 0[0-9a-f]+ <[^>]+> ed900a85 (vldr|flds) s0, \[r0, #532\].* 397 308: R_ARM_LDC_PC_G2 f 398 0[0-9a-f]+ <[^>]+> ed900a85 (vldr|flds) s0, \[r0, #532\].* 399 30c: R_ARM_LDC_SB_G0 f 400 0[0-9a-f]+ <[^>]+> ed900a85 (vldr|flds) s0, \[r0, #532\].* 401 310: R_ARM_LDC_SB_G1 f 402 0[0-9a-f]+ <[^>]+> ed900a85 (vldr|flds) s0, \[r0, #532\].* 403 314: R_ARM_LDC_SB_G2 f 404 0[0-9a-f]+ <[^>]+> ed800a85 (vstr|fsts) s0, \[r0, #532\].* 405 318: R_ARM_LDC_PC_G0 f 406 0[0-9a-f]+ <[^>]+> ed800a85 (vstr|fsts) s0, \[r0, #532\].* 407 31c: R_ARM_LDC_PC_G1 f 408 0[0-9a-f]+ <[^>]+> ed800a85 (vstr|fsts) s0, \[r0, #532\].* 409 320: R_ARM_LDC_PC_G2 f 410 0[0-9a-f]+ <[^>]+> ed800a85 (vstr|fsts) s0, \[r0, #532\].* 411 324: R_ARM_LDC_SB_G0 f 412 0[0-9a-f]+ <[^>]+> ed800a85 (vstr|fsts) s0, \[r0, #532\].* 413 328: R_ARM_LDC_SB_G1 f 414 0[0-9a-f]+ <[^>]+> ed800a85 (vstr|fsts) s0, \[r0, #532\].* 415 32c: R_ARM_LDC_SB_G2 f 416 0[0-9a-f]+ <[^>]+> ed100a85 (vldr|flds) s0, \[r0, #-532\].* 417 330: R_ARM_LDC_PC_G0 f 418 0[0-9a-f]+ <[^>]+> ed100a85 (vldr|flds) s0, \[r0, #-532\].* 419 334: R_ARM_LDC_PC_G1 f 420 0[0-9a-f]+ <[^>]+> ed100a85 (vldr|flds) s0, \[r0, #-532\].* 421 338: R_ARM_LDC_PC_G2 f 422 0[0-9a-f]+ <[^>]+> ed100a85 (vldr|flds) s0, \[r0, #-532\].* 423 33c: R_ARM_LDC_SB_G0 f 424 0[0-9a-f]+ <[^>]+> ed100a85 (vldr|flds) s0, \[r0, #-532\].* 425 340: R_ARM_LDC_SB_G1 f 426 0[0-9a-f]+ <[^>]+> ed100a85 (vldr|flds) s0, \[r0, #-532\].* 427 344: R_ARM_LDC_SB_G2 f 428 0[0-9a-f]+ <[^>]+> ed000a85 (vstr|fsts) s0, \[r0, #-532\].* 429 348: R_ARM_LDC_PC_G0 f 430 0[0-9a-f]+ <[^>]+> ed000a85 (vstr|fsts) s0, \[r0, #-532\].* 431 34c: R_ARM_LDC_PC_G1 f 432 0[0-9a-f]+ <[^>]+> ed000a85 (vstr|fsts) s0, \[r0, #-532\].* 433 350: R_ARM_LDC_PC_G2 f 434 0[0-9a-f]+ <[^>]+> ed000a85 (vstr|fsts) s0, \[r0, #-532\].* 435 354: R_ARM_LDC_SB_G0 f 436 0[0-9a-f]+ <[^>]+> ed000a85 (vstr|fsts) s0, \[r0, #-532\].* 437 358: R_ARM_LDC_SB_G1 f 438 0[0-9a-f]+ <[^>]+> ed000a85 (vstr|fsts) s0, \[r0, #-532\].* 439 35c: R_ARM_LDC_SB_G2 f 440 0[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\].* 441 360: R_ARM_LDC_PC_G0 f 442 0[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\].* 443 364: R_ARM_LDC_PC_G1 f 444 0[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\].* 445 368: R_ARM_LDC_PC_G2 f 446 0[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\].* 447 36c: R_ARM_LDC_SB_G0 f 448 0[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\].* 449 370: R_ARM_LDC_SB_G1 f 450 0[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\].* 451 374: R_ARM_LDC_SB_G2 f 452 0[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\].* 453 378: R_ARM_LDC_PC_G0 f 454 0[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\].* 455 37c: R_ARM_LDC_PC_G1 f 456 0[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\].* 457 380: R_ARM_LDC_PC_G2 f 458 0[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\].* 459 384: R_ARM_LDC_SB_G0 f 460 0[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\].* 461 388: R_ARM_LDC_SB_G1 f 462 0[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\].* 463 38c: R_ARM_LDC_SB_G2 f 464 0[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\].* 465 390: R_ARM_LDC_PC_G0 f 466 0[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\].* 467 394: R_ARM_LDC_PC_G1 f 468 0[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\].* 469 398: R_ARM_LDC_PC_G2 f 470 0[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\].* 471 39c: R_ARM_LDC_SB_G0 f 472 0[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\].* 473 3a0: R_ARM_LDC_SB_G1 f 474 0[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\].* 475 3a4: R_ARM_LDC_SB_G2 f 476 0[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\].* 477 3a8: R_ARM_LDC_PC_G0 f 478 0[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\].* 479 3ac: R_ARM_LDC_PC_G1 f 480 0[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\].* 481 3b0: R_ARM_LDC_PC_G2 f 482 0[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\].* 483 3b4: R_ARM_LDC_SB_G0 f 484 0[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\].* 485 3b8: R_ARM_LDC_SB_G1 f 486 0[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\].* 487 3bc: R_ARM_LDC_SB_G2 f 488 0[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\].* 489 3c0: R_ARM_LDC_PC_G0 f 490 0[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\].* 491 3c4: R_ARM_LDC_PC_G1 f 492 0[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\].* 493 3c8: R_ARM_LDC_PC_G2 f 494 0[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\].* 495 3cc: R_ARM_LDC_SB_G0 f 496 0[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\].* 497 3d0: R_ARM_LDC_SB_G1 f 498 0[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\].* 499 3d4: R_ARM_LDC_SB_G2 f 500 0[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\].* 501 3d8: R_ARM_LDC_PC_G0 f 502 0[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\].* 503 3dc: R_ARM_LDC_PC_G1 f 504 0[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\].* 505 3e0: R_ARM_LDC_PC_G2 f 506 0[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\].* 507 3e4: R_ARM_LDC_SB_G0 f 508 0[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\].* 509 3e8: R_ARM_LDC_SB_G1 f 510 0[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\].* 511 3ec: R_ARM_LDC_SB_G2 f 512 0[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\].* 513 3f0: R_ARM_LDC_PC_G0 f 514 0[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\].* 515 3f4: R_ARM_LDC_PC_G1 f 516 0[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\].* 517 3f8: R_ARM_LDC_PC_G2 f 518 0[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\].* 519 3fc: R_ARM_LDC_SB_G0 f 520 0[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\].* 521 400: R_ARM_LDC_SB_G1 f 522 0[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\].* 523 404: R_ARM_LDC_SB_G2 f 524 0[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\].* 525 408: R_ARM_LDC_PC_G0 f 526 0[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\].* 527 40c: R_ARM_LDC_PC_G1 f 528 0[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\].* 529 410: R_ARM_LDC_PC_G2 f 530 0[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\].* 531 414: R_ARM_LDC_SB_G0 f 532 0[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\].* 533 418: R_ARM_LDC_SB_G1 f 534 0[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\].* 535 41c: R_ARM_LDC_SB_G2 f 536 0[0-9a-f]+ <[^>]+> ed900485 cfldrs mvf0, \[r0, #532\].* 537 420: R_ARM_LDC_PC_G0 f 538 0[0-9a-f]+ <[^>]+> ed900485 cfldrs mvf0, \[r0, #532\].* 539 424: R_ARM_LDC_PC_G1 f 540 0[0-9a-f]+ <[^>]+> ed900485 cfldrs mvf0, \[r0, #532\].* 541 428: R_ARM_LDC_PC_G2 f 542 0[0-9a-f]+ <[^>]+> ed900485 cfldrs mvf0, \[r0, #532\].* 543 42c: R_ARM_LDC_SB_G0 f 544 0[0-9a-f]+ <[^>]+> ed900485 cfldrs mvf0, \[r0, #532\].* 545 430: R_ARM_LDC_SB_G1 f 546 0[0-9a-f]+ <[^>]+> ed900485 cfldrs mvf0, \[r0, #532\].* 547 434: R_ARM_LDC_SB_G2 f 548 0[0-9a-f]+ <[^>]+> ed800485 cfstrs mvf0, \[r0, #532\].* 549 438: R_ARM_LDC_PC_G0 f 550 0[0-9a-f]+ <[^>]+> ed800485 cfstrs mvf0, \[r0, #532\].* 551 43c: R_ARM_LDC_PC_G1 f 552 0[0-9a-f]+ <[^>]+> ed800485 cfstrs mvf0, \[r0, #532\].* 553 440: R_ARM_LDC_PC_G2 f 554 0[0-9a-f]+ <[^>]+> ed800485 cfstrs mvf0, \[r0, #532\].* 555 444: R_ARM_LDC_SB_G0 f 556 0[0-9a-f]+ <[^>]+> ed800485 cfstrs mvf0, \[r0, #532\].* 557 448: R_ARM_LDC_SB_G1 f 558 0[0-9a-f]+ <[^>]+> ed800485 cfstrs mvf0, \[r0, #532\].* 559 44c: R_ARM_LDC_SB_G2 f 560 0[0-9a-f]+ <[^>]+> ed100485 cfldrs mvf0, \[r0, #-532\].* 561 450: R_ARM_LDC_PC_G0 f 562 0[0-9a-f]+ <[^>]+> ed100485 cfldrs mvf0, \[r0, #-532\].* 563 454: R_ARM_LDC_PC_G1 f 564 0[0-9a-f]+ <[^>]+> ed100485 cfldrs mvf0, \[r0, #-532\].* 565 458: R_ARM_LDC_PC_G2 f 566 0[0-9a-f]+ <[^>]+> ed100485 cfldrs mvf0, \[r0, #-532\].* 567 45c: R_ARM_LDC_SB_G0 f 568 0[0-9a-f]+ <[^>]+> ed100485 cfldrs mvf0, \[r0, #-532\].* 569 460: R_ARM_LDC_SB_G1 f 570 0[0-9a-f]+ <[^>]+> ed100485 cfldrs mvf0, \[r0, #-532\].* 571 464: R_ARM_LDC_SB_G2 f 572 0[0-9a-f]+ <[^>]+> ed000485 cfstrs mvf0, \[r0, #-532\].* 573 468: R_ARM_LDC_PC_G0 f 574 0[0-9a-f]+ <[^>]+> ed000485 cfstrs mvf0, \[r0, #-532\].* 575 46c: R_ARM_LDC_PC_G1 f 576 0[0-9a-f]+ <[^>]+> ed000485 cfstrs mvf0, \[r0, #-532\].* 577 470: R_ARM_LDC_PC_G2 f 578 0[0-9a-f]+ <[^>]+> ed000485 cfstrs mvf0, \[r0, #-532\].* 579 474: R_ARM_LDC_SB_G0 f 580 0[0-9a-f]+ <[^>]+> ed000485 cfstrs mvf0, \[r0, #-532\].* 581 478: R_ARM_LDC_SB_G1 f 582 0[0-9a-f]+ <[^>]+> ed000485 cfstrs mvf0, \[r0, #-532\].* 583 47c: R_ARM_LDC_SB_G2 f 584 0[0-9a-f]+ <[^>]+> edd00485 cfldrd mvd0, \[r0, #532\].* 585 480: R_ARM_LDC_PC_G0 f 586 0[0-9a-f]+ <[^>]+> edd00485 cfldrd mvd0, \[r0, #532\].* 587 484: R_ARM_LDC_PC_G1 f 588 0[0-9a-f]+ <[^>]+> edd00485 cfldrd mvd0, \[r0, #532\].* 589 488: R_ARM_LDC_PC_G2 f 590 0[0-9a-f]+ <[^>]+> edd00485 cfldrd mvd0, \[r0, #532\].* 591 48c: R_ARM_LDC_SB_G0 f 592 0[0-9a-f]+ <[^>]+> edd00485 cfldrd mvd0, \[r0, #532\].* 593 490: R_ARM_LDC_SB_G1 f 594 0[0-9a-f]+ <[^>]+> edd00485 cfldrd mvd0, \[r0, #532\].* 595 494: R_ARM_LDC_SB_G2 f 596 0[0-9a-f]+ <[^>]+> edc00485 cfstrd mvd0, \[r0, #532\].* 597 498: R_ARM_LDC_PC_G0 f 598 0[0-9a-f]+ <[^>]+> edc00485 cfstrd mvd0, \[r0, #532\].* 599 49c: R_ARM_LDC_PC_G1 f 600 0[0-9a-f]+ <[^>]+> edc00485 cfstrd mvd0, \[r0, #532\].* 601 4a0: R_ARM_LDC_PC_G2 f 602 0[0-9a-f]+ <[^>]+> edc00485 cfstrd mvd0, \[r0, #532\].* 603 4a4: R_ARM_LDC_SB_G0 f 604 0[0-9a-f]+ <[^>]+> edc00485 cfstrd mvd0, \[r0, #532\].* 605 4a8: R_ARM_LDC_SB_G1 f 606 0[0-9a-f]+ <[^>]+> edc00485 cfstrd mvd0, \[r0, #532\].* 607 4ac: R_ARM_LDC_SB_G2 f 608 0[0-9a-f]+ <[^>]+> ed500485 cfldrd mvd0, \[r0, #-532\].* 609 4b0: R_ARM_LDC_PC_G0 f 610 0[0-9a-f]+ <[^>]+> ed500485 cfldrd mvd0, \[r0, #-532\].* 611 4b4: R_ARM_LDC_PC_G1 f 612 0[0-9a-f]+ <[^>]+> ed500485 cfldrd mvd0, \[r0, #-532\].* 613 4b8: R_ARM_LDC_PC_G2 f 614 0[0-9a-f]+ <[^>]+> ed500485 cfldrd mvd0, \[r0, #-532\].* 615 4bc: R_ARM_LDC_SB_G0 f 616 0[0-9a-f]+ <[^>]+> ed500485 cfldrd mvd0, \[r0, #-532\].* 617 4c0: R_ARM_LDC_SB_G1 f 618 0[0-9a-f]+ <[^>]+> ed500485 cfldrd mvd0, \[r0, #-532\].* 619 4c4: R_ARM_LDC_SB_G2 f 620 0[0-9a-f]+ <[^>]+> ed400485 cfstrd mvd0, \[r0, #-532\].* 621 4c8: R_ARM_LDC_PC_G0 f 622 0[0-9a-f]+ <[^>]+> ed400485 cfstrd mvd0, \[r0, #-532\].* 623 4cc: R_ARM_LDC_PC_G1 f 624 0[0-9a-f]+ <[^>]+> ed400485 cfstrd mvd0, \[r0, #-532\].* 625 4d0: R_ARM_LDC_PC_G2 f 626 0[0-9a-f]+ <[^>]+> ed400485 cfstrd mvd0, \[r0, #-532\].* 627 4d4: R_ARM_LDC_SB_G0 f 628 0[0-9a-f]+ <[^>]+> ed400485 cfstrd mvd0, \[r0, #-532\].* 629 4d8: R_ARM_LDC_SB_G1 f 630 0[0-9a-f]+ <[^>]+> ed400485 cfstrd mvd0, \[r0, #-532\].* 631 4dc: R_ARM_LDC_SB_G2 f 632 0[0-9a-f]+ <[^>]+> ed900585 cfldr32 mvfx0, \[r0, #532\].* 633 4e0: R_ARM_LDC_PC_G0 f 634 0[0-9a-f]+ <[^>]+> ed900585 cfldr32 mvfx0, \[r0, #532\].* 635 4e4: R_ARM_LDC_PC_G1 f 636 0[0-9a-f]+ <[^>]+> ed900585 cfldr32 mvfx0, \[r0, #532\].* 637 4e8: R_ARM_LDC_PC_G2 f 638 0[0-9a-f]+ <[^>]+> ed900585 cfldr32 mvfx0, \[r0, #532\].* 639 4ec: R_ARM_LDC_SB_G0 f 640 0[0-9a-f]+ <[^>]+> ed900585 cfldr32 mvfx0, \[r0, #532\].* 641 4f0: R_ARM_LDC_SB_G1 f 642 0[0-9a-f]+ <[^>]+> ed900585 cfldr32 mvfx0, \[r0, #532\].* 643 4f4: R_ARM_LDC_SB_G2 f 644 0[0-9a-f]+ <[^>]+> ed800585 cfstr32 mvfx0, \[r0, #532\].* 645 4f8: R_ARM_LDC_PC_G0 f 646 0[0-9a-f]+ <[^>]+> ed800585 cfstr32 mvfx0, \[r0, #532\].* 647 4fc: R_ARM_LDC_PC_G1 f 648 0[0-9a-f]+ <[^>]+> ed800585 cfstr32 mvfx0, \[r0, #532\].* 649 500: R_ARM_LDC_PC_G2 f 650 0[0-9a-f]+ <[^>]+> ed800585 cfstr32 mvfx0, \[r0, #532\].* 651 504: R_ARM_LDC_SB_G0 f 652 0[0-9a-f]+ <[^>]+> ed800585 cfstr32 mvfx0, \[r0, #532\].* 653 508: R_ARM_LDC_SB_G1 f 654 0[0-9a-f]+ <[^>]+> ed800585 cfstr32 mvfx0, \[r0, #532\].* 655 50c: R_ARM_LDC_SB_G2 f 656 0[0-9a-f]+ <[^>]+> ed100585 cfldr32 mvfx0, \[r0, #-532\].* 657 510: R_ARM_LDC_PC_G0 f 658 0[0-9a-f]+ <[^>]+> ed100585 cfldr32 mvfx0, \[r0, #-532\].* 659 514: R_ARM_LDC_PC_G1 f 660 0[0-9a-f]+ <[^>]+> ed100585 cfldr32 mvfx0, \[r0, #-532\].* 661 518: R_ARM_LDC_PC_G2 f 662 0[0-9a-f]+ <[^>]+> ed100585 cfldr32 mvfx0, \[r0, #-532\].* 663 51c: R_ARM_LDC_SB_G0 f 664 0[0-9a-f]+ <[^>]+> ed100585 cfldr32 mvfx0, \[r0, #-532\].* 665 520: R_ARM_LDC_SB_G1 f 666 0[0-9a-f]+ <[^>]+> ed100585 cfldr32 mvfx0, \[r0, #-532\].* 667 524: R_ARM_LDC_SB_G2 f 668 0[0-9a-f]+ <[^>]+> ed000585 cfstr32 mvfx0, \[r0, #-532\].* 669 528: R_ARM_LDC_PC_G0 f 670 0[0-9a-f]+ <[^>]+> ed000585 cfstr32 mvfx0, \[r0, #-532\].* 671 52c: R_ARM_LDC_PC_G1 f 672 0[0-9a-f]+ <[^>]+> ed000585 cfstr32 mvfx0, \[r0, #-532\].* 673 530: R_ARM_LDC_PC_G2 f 674 0[0-9a-f]+ <[^>]+> ed000585 cfstr32 mvfx0, \[r0, #-532\].* 675 534: R_ARM_LDC_SB_G0 f 676 0[0-9a-f]+ <[^>]+> ed000585 cfstr32 mvfx0, \[r0, #-532\].* 677 538: R_ARM_LDC_SB_G1 f 678 0[0-9a-f]+ <[^>]+> ed000585 cfstr32 mvfx0, \[r0, #-532\].* 679 53c: R_ARM_LDC_SB_G2 f 680 0[0-9a-f]+ <[^>]+> edd00585 cfldr64 mvdx0, \[r0, #532\].* 681 540: R_ARM_LDC_PC_G0 f 682 0[0-9a-f]+ <[^>]+> edd00585 cfldr64 mvdx0, \[r0, #532\].* 683 544: R_ARM_LDC_PC_G1 f 684 0[0-9a-f]+ <[^>]+> edd00585 cfldr64 mvdx0, \[r0, #532\].* 685 548: R_ARM_LDC_PC_G2 f 686 0[0-9a-f]+ <[^>]+> edd00585 cfldr64 mvdx0, \[r0, #532\].* 687 54c: R_ARM_LDC_SB_G0 f 688 0[0-9a-f]+ <[^>]+> edd00585 cfldr64 mvdx0, \[r0, #532\].* 689 550: R_ARM_LDC_SB_G1 f 690 0[0-9a-f]+ <[^>]+> edd00585 cfldr64 mvdx0, \[r0, #532\].* 691 554: R_ARM_LDC_SB_G2 f 692 0[0-9a-f]+ <[^>]+> edc00585 cfstr64 mvdx0, \[r0, #532\].* 693 558: R_ARM_LDC_PC_G0 f 694 0[0-9a-f]+ <[^>]+> edc00585 cfstr64 mvdx0, \[r0, #532\].* 695 55c: R_ARM_LDC_PC_G1 f 696 0[0-9a-f]+ <[^>]+> edc00585 cfstr64 mvdx0, \[r0, #532\].* 697 560: R_ARM_LDC_PC_G2 f 698 0[0-9a-f]+ <[^>]+> edc00585 cfstr64 mvdx0, \[r0, #532\].* 699 564: R_ARM_LDC_SB_G0 f 700 0[0-9a-f]+ <[^>]+> edc00585 cfstr64 mvdx0, \[r0, #532\].* 701 568: R_ARM_LDC_SB_G1 f 702 0[0-9a-f]+ <[^>]+> edc00585 cfstr64 mvdx0, \[r0, #532\].* 703 56c: R_ARM_LDC_SB_G2 f 704 0[0-9a-f]+ <[^>]+> ed500585 cfldr64 mvdx0, \[r0, #-532\].* 705 570: R_ARM_LDC_PC_G0 f 706 0[0-9a-f]+ <[^>]+> ed500585 cfldr64 mvdx0, \[r0, #-532\].* 707 574: R_ARM_LDC_PC_G1 f 708 0[0-9a-f]+ <[^>]+> ed500585 cfldr64 mvdx0, \[r0, #-532\].* 709 578: R_ARM_LDC_PC_G2 f 710 0[0-9a-f]+ <[^>]+> ed500585 cfldr64 mvdx0, \[r0, #-532\].* 711 57c: R_ARM_LDC_SB_G0 f 712 0[0-9a-f]+ <[^>]+> ed500585 cfldr64 mvdx0, \[r0, #-532\].* 713 580: R_ARM_LDC_SB_G1 f 714 0[0-9a-f]+ <[^>]+> ed500585 cfldr64 mvdx0, \[r0, #-532\].* 715 584: R_ARM_LDC_SB_G2 f 716 0[0-9a-f]+ <[^>]+> ed400585 cfstr64 mvdx0, \[r0, #-532\].* 717 588: R_ARM_LDC_PC_G0 f 718 0[0-9a-f]+ <[^>]+> ed400585 cfstr64 mvdx0, \[r0, #-532\].* 719 58c: R_ARM_LDC_PC_G1 f 720 0[0-9a-f]+ <[^>]+> ed400585 cfstr64 mvdx0, \[r0, #-532\].* 721 590: R_ARM_LDC_PC_G2 f 722 0[0-9a-f]+ <[^>]+> ed400585 cfstr64 mvdx0, \[r0, #-532\].* 723 594: R_ARM_LDC_SB_G0 f 724 0[0-9a-f]+ <[^>]+> ed400585 cfstr64 mvdx0, \[r0, #-532\].* 725 598: R_ARM_LDC_SB_G1 f 726 0[0-9a-f]+ <[^>]+> ed400585 cfstr64 mvdx0, \[r0, #-532\].* 727 59c: R_ARM_LDC_SB_G2 f 728
