| /external/vixl/test/aarch32/ |
| test-simulator-cond-rd-rn-operand-rm-t32.cc | 136 M(Sxtab) \
[all...] |
| test-assembler-cond-rd-rn-operand-rm-ror-amount-a32.cc | 52 M(sxtab) \
[all...] |
| test-assembler-cond-rd-rn-operand-rm-ror-amount-t32.cc | 52 M(sxtab) \
[all...] |
| test-disasm-a32.cc | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMScheduleSwift.td | 205 "SXTAB", "SXTAB16", "SXTAH", "UHADD8", "UHADD16", "UHSUB8", "UHSUB16",
[all...] |
| ARMInstrInfo.td | [all...] |
| /external/llvm/test/MC/ARM/ |
| basic-arm-instructions.s | [all...] |
| basic-thumb2-instructions.s | [all...] |
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| basic-arm-instructions.s | [all...] |
| basic-thumb2-instructions.s | [all...] |
| /external/valgrind/none/tests/arm/ |
| v6intThumb.c | [all...] |
| /external/llvm/test/MC/Disassembler/ARM/ |
| basic-arm-instructions.txt | [all...] |
| thumb2.txt | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| ARMInstrInfo.td | [all...] |
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| basic-arm-instructions.txt | [all...] |
| thumb2.txt | [all...] |
| /external/vixl/src/aarch32/ |
| macro-assembler-aarch32.h | [all...] |
| assembler-aarch32.h | 3511 void sxtab(Register rd, Register rn, const Operand& operand) { function in class:vixl::aarch32::Assembler
[all...] |
| disasm-aarch32.h | [all...] |
| assembler-aarch32.cc | 12474 void Assembler::sxtab(Condition cond, function in class:vixl::aarch32::Assembler
[all...] |
| /external/v8/src/arm/ |
| assembler-arm.h | [all...] |
| /external/capstone/arch/ARM/ |
| ARMGenAsmWriter.inc | 477 30117U, // SXTAB
[all...] |
| /toolchain/binutils/binutils-2.27/opcodes/ |
| arm-dis.c | [all...] |
| /external/v8/src/compiler/arm/ |
| code-generator-arm.cc | [all...] |
| /prebuilts/go/darwin-x86/src/cmd/vendor/golang.org/x/arch/arm/armasm/testdata/ |
| decode.txt | [all...] |
